Zakaria ElQotbi / mbed-src

mbed library sources for airmote

Fork of mbed-src by mbed official

targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/dmac_iodefine.h@625:88d3fa07e462, 2015-11-24 (annotated)

Committer:
zskdan
Date:
Tue Nov 24 14:02:46 2015 +0000
Revision:
625:88d3fa07e462
Parent:
390:35c2c1cf29cd 
remove unused service

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 2 * DISCLAIMER
mbed_official 390:35c2c1cf29cd 3 * This software is supplied by Renesas Electronics Corporation and is only
mbed_official 390:35c2c1cf29cd 4 * intended for use with Renesas products. No other uses are authorized. This
mbed_official 390:35c2c1cf29cd 5 * software is owned by Renesas Electronics Corporation and is protected under
mbed_official 390:35c2c1cf29cd 6 * all applicable laws, including copyright laws.
mbed_official 390:35c2c1cf29cd 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
mbed_official 390:35c2c1cf29cd 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
mbed_official 390:35c2c1cf29cd 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
mbed_official 390:35c2c1cf29cd 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
mbed_official 390:35c2c1cf29cd 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
mbed_official 390:35c2c1cf29cd 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
mbed_official 390:35c2c1cf29cd 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
mbed_official 390:35c2c1cf29cd 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
mbed_official 390:35c2c1cf29cd 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
mbed_official 390:35c2c1cf29cd 16 * Renesas reserves the right, without notice, to make changes to this software
mbed_official 390:35c2c1cf29cd 17 * and to discontinue the availability of this software. By using this software,
mbed_official 390:35c2c1cf29cd 18 * you agree to the additional terms and conditions found by accessing the
mbed_official 390:35c2c1cf29cd 19 * following link:
mbed_official 390:35c2c1cf29cd 20 * http://www.renesas.com/disclaimer*
mbed_official 390:35c2c1cf29cd 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
mbed_official 390:35c2c1cf29cd 22 *******************************************************************************/
mbed_official 390:35c2c1cf29cd 23 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 24 * File Name : dmac_iodefine.h
mbed_official 390:35c2c1cf29cd 25 * $Rev: $
mbed_official 390:35c2c1cf29cd 26 * $Date:: $
mbed_official 390:35c2c1cf29cd 27 * Description : Definition of I/O Register (V1.00a)
mbed_official 390:35c2c1cf29cd 28 ******************************************************************************/
mbed_official 390:35c2c1cf29cd 29 #ifndef DMAC_IODEFINE_H
mbed_official 390:35c2c1cf29cd 30 #define DMAC_IODEFINE_H
mbed_official 390:35c2c1cf29cd 31 /* ->QAC 0639 : Over 127 members (C90) */
mbed_official 390:35c2c1cf29cd 32 /* ->SEC M1.10.1 : Not magic number */
mbed_official 390:35c2c1cf29cd 33
mbed_official 390:35c2c1cf29cd 34 struct st_dmac
mbed_official 390:35c2c1cf29cd 35 { /* DMAC */
mbed_official 390:35c2c1cf29cd 36 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 37 volatile uint32_t N0SA_0; /* N0SA_0 */
mbed_official 390:35c2c1cf29cd 38 volatile uint32_t N0DA_0; /* N0DA_0 */
mbed_official 390:35c2c1cf29cd 39 volatile uint32_t N0TB_0; /* N0TB_0 */
mbed_official 390:35c2c1cf29cd 40 volatile uint32_t N1SA_0; /* N1SA_0 */
mbed_official 390:35c2c1cf29cd 41 volatile uint32_t N1DA_0; /* N1DA_0 */
mbed_official 390:35c2c1cf29cd 42 volatile uint32_t N1TB_0; /* N1TB_0 */
mbed_official 390:35c2c1cf29cd 43 volatile uint32_t CRSA_0; /* CRSA_0 */
mbed_official 390:35c2c1cf29cd 44 volatile uint32_t CRDA_0; /* CRDA_0 */
mbed_official 390:35c2c1cf29cd 45 volatile uint32_t CRTB_0; /* CRTB_0 */
mbed_official 390:35c2c1cf29cd 46 volatile uint32_t CHSTAT_0; /* CHSTAT_0 */
mbed_official 390:35c2c1cf29cd 47 volatile uint32_t CHCTRL_0; /* CHCTRL_0 */
mbed_official 390:35c2c1cf29cd 48 volatile uint32_t CHCFG_0; /* CHCFG_0 */
mbed_official 390:35c2c1cf29cd 49 volatile uint32_t CHITVL_0; /* CHITVL_0 */
mbed_official 390:35c2c1cf29cd 50 volatile uint32_t CHEXT_0; /* CHEXT_0 */
mbed_official 390:35c2c1cf29cd 51 volatile uint32_t NXLA_0; /* NXLA_0 */
mbed_official 390:35c2c1cf29cd 52 volatile uint32_t CRLA_0; /* CRLA_0 */
mbed_official 390:35c2c1cf29cd 53 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 54 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 55 volatile uint32_t N0SA_1; /* N0SA_1 */
mbed_official 390:35c2c1cf29cd 56 volatile uint32_t N0DA_1; /* N0DA_1 */
mbed_official 390:35c2c1cf29cd 57 volatile uint32_t N0TB_1; /* N0TB_1 */
mbed_official 390:35c2c1cf29cd 58 volatile uint32_t N1SA_1; /* N1SA_1 */
mbed_official 390:35c2c1cf29cd 59 volatile uint32_t N1DA_1; /* N1DA_1 */
mbed_official 390:35c2c1cf29cd 60 volatile uint32_t N1TB_1; /* N1TB_1 */
mbed_official 390:35c2c1cf29cd 61 volatile uint32_t CRSA_1; /* CRSA_1 */
mbed_official 390:35c2c1cf29cd 62 volatile uint32_t CRDA_1; /* CRDA_1 */
mbed_official 390:35c2c1cf29cd 63 volatile uint32_t CRTB_1; /* CRTB_1 */
mbed_official 390:35c2c1cf29cd 64 volatile uint32_t CHSTAT_1; /* CHSTAT_1 */
mbed_official 390:35c2c1cf29cd 65 volatile uint32_t CHCTRL_1; /* CHCTRL_1 */
mbed_official 390:35c2c1cf29cd 66 volatile uint32_t CHCFG_1; /* CHCFG_1 */
mbed_official 390:35c2c1cf29cd 67 volatile uint32_t CHITVL_1; /* CHITVL_1 */
mbed_official 390:35c2c1cf29cd 68 volatile uint32_t CHEXT_1; /* CHEXT_1 */
mbed_official 390:35c2c1cf29cd 69 volatile uint32_t NXLA_1; /* NXLA_1 */
mbed_official 390:35c2c1cf29cd 70 volatile uint32_t CRLA_1; /* CRLA_1 */
mbed_official 390:35c2c1cf29cd 71 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 72 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 73 volatile uint32_t N0SA_2; /* N0SA_2 */
mbed_official 390:35c2c1cf29cd 74 volatile uint32_t N0DA_2; /* N0DA_2 */
mbed_official 390:35c2c1cf29cd 75 volatile uint32_t N0TB_2; /* N0TB_2 */
mbed_official 390:35c2c1cf29cd 76 volatile uint32_t N1SA_2; /* N1SA_2 */
mbed_official 390:35c2c1cf29cd 77 volatile uint32_t N1DA_2; /* N1DA_2 */
mbed_official 390:35c2c1cf29cd 78 volatile uint32_t N1TB_2; /* N1TB_2 */
mbed_official 390:35c2c1cf29cd 79 volatile uint32_t CRSA_2; /* CRSA_2 */
mbed_official 390:35c2c1cf29cd 80 volatile uint32_t CRDA_2; /* CRDA_2 */
mbed_official 390:35c2c1cf29cd 81 volatile uint32_t CRTB_2; /* CRTB_2 */
mbed_official 390:35c2c1cf29cd 82 volatile uint32_t CHSTAT_2; /* CHSTAT_2 */
mbed_official 390:35c2c1cf29cd 83 volatile uint32_t CHCTRL_2; /* CHCTRL_2 */
mbed_official 390:35c2c1cf29cd 84 volatile uint32_t CHCFG_2; /* CHCFG_2 */
mbed_official 390:35c2c1cf29cd 85 volatile uint32_t CHITVL_2; /* CHITVL_2 */
mbed_official 390:35c2c1cf29cd 86 volatile uint32_t CHEXT_2; /* CHEXT_2 */
mbed_official 390:35c2c1cf29cd 87 volatile uint32_t NXLA_2; /* NXLA_2 */
mbed_official 390:35c2c1cf29cd 88 volatile uint32_t CRLA_2; /* CRLA_2 */
mbed_official 390:35c2c1cf29cd 89 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 90 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 91 volatile uint32_t N0SA_3; /* N0SA_3 */
mbed_official 390:35c2c1cf29cd 92 volatile uint32_t N0DA_3; /* N0DA_3 */
mbed_official 390:35c2c1cf29cd 93 volatile uint32_t N0TB_3; /* N0TB_3 */
mbed_official 390:35c2c1cf29cd 94 volatile uint32_t N1SA_3; /* N1SA_3 */
mbed_official 390:35c2c1cf29cd 95 volatile uint32_t N1DA_3; /* N1DA_3 */
mbed_official 390:35c2c1cf29cd 96 volatile uint32_t N1TB_3; /* N1TB_3 */
mbed_official 390:35c2c1cf29cd 97 volatile uint32_t CRSA_3; /* CRSA_3 */
mbed_official 390:35c2c1cf29cd 98 volatile uint32_t CRDA_3; /* CRDA_3 */
mbed_official 390:35c2c1cf29cd 99 volatile uint32_t CRTB_3; /* CRTB_3 */
mbed_official 390:35c2c1cf29cd 100 volatile uint32_t CHSTAT_3; /* CHSTAT_3 */
mbed_official 390:35c2c1cf29cd 101 volatile uint32_t CHCTRL_3; /* CHCTRL_3 */
mbed_official 390:35c2c1cf29cd 102 volatile uint32_t CHCFG_3; /* CHCFG_3 */
mbed_official 390:35c2c1cf29cd 103 volatile uint32_t CHITVL_3; /* CHITVL_3 */
mbed_official 390:35c2c1cf29cd 104 volatile uint32_t CHEXT_3; /* CHEXT_3 */
mbed_official 390:35c2c1cf29cd 105 volatile uint32_t NXLA_3; /* NXLA_3 */
mbed_official 390:35c2c1cf29cd 106 volatile uint32_t CRLA_3; /* CRLA_3 */
mbed_official 390:35c2c1cf29cd 107 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 108 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 109 volatile uint32_t N0SA_4; /* N0SA_4 */
mbed_official 390:35c2c1cf29cd 110 volatile uint32_t N0DA_4; /* N0DA_4 */
mbed_official 390:35c2c1cf29cd 111 volatile uint32_t N0TB_4; /* N0TB_4 */
mbed_official 390:35c2c1cf29cd 112 volatile uint32_t N1SA_4; /* N1SA_4 */
mbed_official 390:35c2c1cf29cd 113 volatile uint32_t N1DA_4; /* N1DA_4 */
mbed_official 390:35c2c1cf29cd 114 volatile uint32_t N1TB_4; /* N1TB_4 */
mbed_official 390:35c2c1cf29cd 115 volatile uint32_t CRSA_4; /* CRSA_4 */
mbed_official 390:35c2c1cf29cd 116 volatile uint32_t CRDA_4; /* CRDA_4 */
mbed_official 390:35c2c1cf29cd 117 volatile uint32_t CRTB_4; /* CRTB_4 */
mbed_official 390:35c2c1cf29cd 118 volatile uint32_t CHSTAT_4; /* CHSTAT_4 */
mbed_official 390:35c2c1cf29cd 119 volatile uint32_t CHCTRL_4; /* CHCTRL_4 */
mbed_official 390:35c2c1cf29cd 120 volatile uint32_t CHCFG_4; /* CHCFG_4 */
mbed_official 390:35c2c1cf29cd 121 volatile uint32_t CHITVL_4; /* CHITVL_4 */
mbed_official 390:35c2c1cf29cd 122 volatile uint32_t CHEXT_4; /* CHEXT_4 */
mbed_official 390:35c2c1cf29cd 123 volatile uint32_t NXLA_4; /* NXLA_4 */
mbed_official 390:35c2c1cf29cd 124 volatile uint32_t CRLA_4; /* CRLA_4 */
mbed_official 390:35c2c1cf29cd 125 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 126 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 127 volatile uint32_t N0SA_5; /* N0SA_5 */
mbed_official 390:35c2c1cf29cd 128 volatile uint32_t N0DA_5; /* N0DA_5 */
mbed_official 390:35c2c1cf29cd 129 volatile uint32_t N0TB_5; /* N0TB_5 */
mbed_official 390:35c2c1cf29cd 130 volatile uint32_t N1SA_5; /* N1SA_5 */
mbed_official 390:35c2c1cf29cd 131 volatile uint32_t N1DA_5; /* N1DA_5 */
mbed_official 390:35c2c1cf29cd 132 volatile uint32_t N1TB_5; /* N1TB_5 */
mbed_official 390:35c2c1cf29cd 133 volatile uint32_t CRSA_5; /* CRSA_5 */
mbed_official 390:35c2c1cf29cd 134 volatile uint32_t CRDA_5; /* CRDA_5 */
mbed_official 390:35c2c1cf29cd 135 volatile uint32_t CRTB_5; /* CRTB_5 */
mbed_official 390:35c2c1cf29cd 136 volatile uint32_t CHSTAT_5; /* CHSTAT_5 */
mbed_official 390:35c2c1cf29cd 137 volatile uint32_t CHCTRL_5; /* CHCTRL_5 */
mbed_official 390:35c2c1cf29cd 138 volatile uint32_t CHCFG_5; /* CHCFG_5 */
mbed_official 390:35c2c1cf29cd 139 volatile uint32_t CHITVL_5; /* CHITVL_5 */
mbed_official 390:35c2c1cf29cd 140 volatile uint32_t CHEXT_5; /* CHEXT_5 */
mbed_official 390:35c2c1cf29cd 141 volatile uint32_t NXLA_5; /* NXLA_5 */
mbed_official 390:35c2c1cf29cd 142 volatile uint32_t CRLA_5; /* CRLA_5 */
mbed_official 390:35c2c1cf29cd 143 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 144 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 145 volatile uint32_t N0SA_6; /* N0SA_6 */
mbed_official 390:35c2c1cf29cd 146 volatile uint32_t N0DA_6; /* N0DA_6 */
mbed_official 390:35c2c1cf29cd 147 volatile uint32_t N0TB_6; /* N0TB_6 */
mbed_official 390:35c2c1cf29cd 148 volatile uint32_t N1SA_6; /* N1SA_6 */
mbed_official 390:35c2c1cf29cd 149 volatile uint32_t N1DA_6; /* N1DA_6 */
mbed_official 390:35c2c1cf29cd 150 volatile uint32_t N1TB_6; /* N1TB_6 */
mbed_official 390:35c2c1cf29cd 151 volatile uint32_t CRSA_6; /* CRSA_6 */
mbed_official 390:35c2c1cf29cd 152 volatile uint32_t CRDA_6; /* CRDA_6 */
mbed_official 390:35c2c1cf29cd 153 volatile uint32_t CRTB_6; /* CRTB_6 */
mbed_official 390:35c2c1cf29cd 154 volatile uint32_t CHSTAT_6; /* CHSTAT_6 */
mbed_official 390:35c2c1cf29cd 155 volatile uint32_t CHCTRL_6; /* CHCTRL_6 */
mbed_official 390:35c2c1cf29cd 156 volatile uint32_t CHCFG_6; /* CHCFG_6 */
mbed_official 390:35c2c1cf29cd 157 volatile uint32_t CHITVL_6; /* CHITVL_6 */
mbed_official 390:35c2c1cf29cd 158 volatile uint32_t CHEXT_6; /* CHEXT_6 */
mbed_official 390:35c2c1cf29cd 159 volatile uint32_t NXLA_6; /* NXLA_6 */
mbed_official 390:35c2c1cf29cd 160 volatile uint32_t CRLA_6; /* CRLA_6 */
mbed_official 390:35c2c1cf29cd 161 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 162 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 163 volatile uint32_t N0SA_7; /* N0SA_7 */
mbed_official 390:35c2c1cf29cd 164 volatile uint32_t N0DA_7; /* N0DA_7 */
mbed_official 390:35c2c1cf29cd 165 volatile uint32_t N0TB_7; /* N0TB_7 */
mbed_official 390:35c2c1cf29cd 166 volatile uint32_t N1SA_7; /* N1SA_7 */
mbed_official 390:35c2c1cf29cd 167 volatile uint32_t N1DA_7; /* N1DA_7 */
mbed_official 390:35c2c1cf29cd 168 volatile uint32_t N1TB_7; /* N1TB_7 */
mbed_official 390:35c2c1cf29cd 169 volatile uint32_t CRSA_7; /* CRSA_7 */
mbed_official 390:35c2c1cf29cd 170 volatile uint32_t CRDA_7; /* CRDA_7 */
mbed_official 390:35c2c1cf29cd 171 volatile uint32_t CRTB_7; /* CRTB_7 */
mbed_official 390:35c2c1cf29cd 172 volatile uint32_t CHSTAT_7; /* CHSTAT_7 */
mbed_official 390:35c2c1cf29cd 173 volatile uint32_t CHCTRL_7; /* CHCTRL_7 */
mbed_official 390:35c2c1cf29cd 174 volatile uint32_t CHCFG_7; /* CHCFG_7 */
mbed_official 390:35c2c1cf29cd 175 volatile uint32_t CHITVL_7; /* CHITVL_7 */
mbed_official 390:35c2c1cf29cd 176 volatile uint32_t CHEXT_7; /* CHEXT_7 */
mbed_official 390:35c2c1cf29cd 177 volatile uint32_t NXLA_7; /* NXLA_7 */
mbed_official 390:35c2c1cf29cd 178 volatile uint32_t CRLA_7; /* CRLA_7 */
mbed_official 390:35c2c1cf29cd 179 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 180 volatile uint8_t dummy187[256]; /* */
mbed_official 390:35c2c1cf29cd 181 /* start of struct st_dmaccommon_n */
mbed_official 390:35c2c1cf29cd 182 volatile uint32_t DCTRL_0_7; /* DCTRL_0_7 */
mbed_official 390:35c2c1cf29cd 183 volatile uint8_t dummy188[12]; /* */
mbed_official 390:35c2c1cf29cd 184 volatile uint32_t DSTAT_EN_0_7; /* DSTAT_EN_0_7 */
mbed_official 390:35c2c1cf29cd 185 volatile uint32_t DSTAT_ER_0_7; /* DSTAT_ER_0_7 */
mbed_official 390:35c2c1cf29cd 186 volatile uint32_t DSTAT_END_0_7; /* DSTAT_END_0_7 */
mbed_official 390:35c2c1cf29cd 187 volatile uint32_t DSTAT_TC_0_7; /* DSTAT_TC_0_7 */
mbed_official 390:35c2c1cf29cd 188 volatile uint32_t DSTAT_SUS_0_7; /* DSTAT_SUS_0_7 */
mbed_official 390:35c2c1cf29cd 189 /* end of struct st_dmaccommon_n */
mbed_official 390:35c2c1cf29cd 190 volatile uint8_t dummy189[220]; /* */
mbed_official 390:35c2c1cf29cd 191 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 192 volatile uint32_t N0SA_8; /* N0SA_8 */
mbed_official 390:35c2c1cf29cd 193 volatile uint32_t N0DA_8; /* N0DA_8 */
mbed_official 390:35c2c1cf29cd 194 volatile uint32_t N0TB_8; /* N0TB_8 */
mbed_official 390:35c2c1cf29cd 195 volatile uint32_t N1SA_8; /* N1SA_8 */
mbed_official 390:35c2c1cf29cd 196 volatile uint32_t N1DA_8; /* N1DA_8 */
mbed_official 390:35c2c1cf29cd 197 volatile uint32_t N1TB_8; /* N1TB_8 */
mbed_official 390:35c2c1cf29cd 198 volatile uint32_t CRSA_8; /* CRSA_8 */
mbed_official 390:35c2c1cf29cd 199 volatile uint32_t CRDA_8; /* CRDA_8 */
mbed_official 390:35c2c1cf29cd 200 volatile uint32_t CRTB_8; /* CRTB_8 */
mbed_official 390:35c2c1cf29cd 201 volatile uint32_t CHSTAT_8; /* CHSTAT_8 */
mbed_official 390:35c2c1cf29cd 202 volatile uint32_t CHCTRL_8; /* CHCTRL_8 */
mbed_official 390:35c2c1cf29cd 203 volatile uint32_t CHCFG_8; /* CHCFG_8 */
mbed_official 390:35c2c1cf29cd 204 volatile uint32_t CHITVL_8; /* CHITVL_8 */
mbed_official 390:35c2c1cf29cd 205 volatile uint32_t CHEXT_8; /* CHEXT_8 */
mbed_official 390:35c2c1cf29cd 206 volatile uint32_t NXLA_8; /* NXLA_8 */
mbed_official 390:35c2c1cf29cd 207 volatile uint32_t CRLA_8; /* CRLA_8 */
mbed_official 390:35c2c1cf29cd 208 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 209 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 210 volatile uint32_t N0SA_9; /* N0SA_9 */
mbed_official 390:35c2c1cf29cd 211 volatile uint32_t N0DA_9; /* N0DA_9 */
mbed_official 390:35c2c1cf29cd 212 volatile uint32_t N0TB_9; /* N0TB_9 */
mbed_official 390:35c2c1cf29cd 213 volatile uint32_t N1SA_9; /* N1SA_9 */
mbed_official 390:35c2c1cf29cd 214 volatile uint32_t N1DA_9; /* N1DA_9 */
mbed_official 390:35c2c1cf29cd 215 volatile uint32_t N1TB_9; /* N1TB_9 */
mbed_official 390:35c2c1cf29cd 216 volatile uint32_t CRSA_9; /* CRSA_9 */
mbed_official 390:35c2c1cf29cd 217 volatile uint32_t CRDA_9; /* CRDA_9 */
mbed_official 390:35c2c1cf29cd 218 volatile uint32_t CRTB_9; /* CRTB_9 */
mbed_official 390:35c2c1cf29cd 219 volatile uint32_t CHSTAT_9; /* CHSTAT_9 */
mbed_official 390:35c2c1cf29cd 220 volatile uint32_t CHCTRL_9; /* CHCTRL_9 */
mbed_official 390:35c2c1cf29cd 221 volatile uint32_t CHCFG_9; /* CHCFG_9 */
mbed_official 390:35c2c1cf29cd 222 volatile uint32_t CHITVL_9; /* CHITVL_9 */
mbed_official 390:35c2c1cf29cd 223 volatile uint32_t CHEXT_9; /* CHEXT_9 */
mbed_official 390:35c2c1cf29cd 224 volatile uint32_t NXLA_9; /* NXLA_9 */
mbed_official 390:35c2c1cf29cd 225 volatile uint32_t CRLA_9; /* CRLA_9 */
mbed_official 390:35c2c1cf29cd 226 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 227 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 228 volatile uint32_t N0SA_10; /* N0SA_10 */
mbed_official 390:35c2c1cf29cd 229 volatile uint32_t N0DA_10; /* N0DA_10 */
mbed_official 390:35c2c1cf29cd 230 volatile uint32_t N0TB_10; /* N0TB_10 */
mbed_official 390:35c2c1cf29cd 231 volatile uint32_t N1SA_10; /* N1SA_10 */
mbed_official 390:35c2c1cf29cd 232 volatile uint32_t N1DA_10; /* N1DA_10 */
mbed_official 390:35c2c1cf29cd 233 volatile uint32_t N1TB_10; /* N1TB_10 */
mbed_official 390:35c2c1cf29cd 234 volatile uint32_t CRSA_10; /* CRSA_10 */
mbed_official 390:35c2c1cf29cd 235 volatile uint32_t CRDA_10; /* CRDA_10 */
mbed_official 390:35c2c1cf29cd 236 volatile uint32_t CRTB_10; /* CRTB_10 */
mbed_official 390:35c2c1cf29cd 237 volatile uint32_t CHSTAT_10; /* CHSTAT_10 */
mbed_official 390:35c2c1cf29cd 238 volatile uint32_t CHCTRL_10; /* CHCTRL_10 */
mbed_official 390:35c2c1cf29cd 239 volatile uint32_t CHCFG_10; /* CHCFG_10 */
mbed_official 390:35c2c1cf29cd 240 volatile uint32_t CHITVL_10; /* CHITVL_10 */
mbed_official 390:35c2c1cf29cd 241 volatile uint32_t CHEXT_10; /* CHEXT_10 */
mbed_official 390:35c2c1cf29cd 242 volatile uint32_t NXLA_10; /* NXLA_10 */
mbed_official 390:35c2c1cf29cd 243 volatile uint32_t CRLA_10; /* CRLA_10 */
mbed_official 390:35c2c1cf29cd 244 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 245 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 246 volatile uint32_t N0SA_11; /* N0SA_11 */
mbed_official 390:35c2c1cf29cd 247 volatile uint32_t N0DA_11; /* N0DA_11 */
mbed_official 390:35c2c1cf29cd 248 volatile uint32_t N0TB_11; /* N0TB_11 */
mbed_official 390:35c2c1cf29cd 249 volatile uint32_t N1SA_11; /* N1SA_11 */
mbed_official 390:35c2c1cf29cd 250 volatile uint32_t N1DA_11; /* N1DA_11 */
mbed_official 390:35c2c1cf29cd 251 volatile uint32_t N1TB_11; /* N1TB_11 */
mbed_official 390:35c2c1cf29cd 252 volatile uint32_t CRSA_11; /* CRSA_11 */
mbed_official 390:35c2c1cf29cd 253 volatile uint32_t CRDA_11; /* CRDA_11 */
mbed_official 390:35c2c1cf29cd 254 volatile uint32_t CRTB_11; /* CRTB_11 */
mbed_official 390:35c2c1cf29cd 255 volatile uint32_t CHSTAT_11; /* CHSTAT_11 */
mbed_official 390:35c2c1cf29cd 256 volatile uint32_t CHCTRL_11; /* CHCTRL_11 */
mbed_official 390:35c2c1cf29cd 257 volatile uint32_t CHCFG_11; /* CHCFG_11 */
mbed_official 390:35c2c1cf29cd 258 volatile uint32_t CHITVL_11; /* CHITVL_11 */
mbed_official 390:35c2c1cf29cd 259 volatile uint32_t CHEXT_11; /* CHEXT_11 */
mbed_official 390:35c2c1cf29cd 260 volatile uint32_t NXLA_11; /* NXLA_11 */
mbed_official 390:35c2c1cf29cd 261 volatile uint32_t CRLA_11; /* CRLA_11 */
mbed_official 390:35c2c1cf29cd 262 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 263 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 264 volatile uint32_t N0SA_12; /* N0SA_12 */
mbed_official 390:35c2c1cf29cd 265 volatile uint32_t N0DA_12; /* N0DA_12 */
mbed_official 390:35c2c1cf29cd 266 volatile uint32_t N0TB_12; /* N0TB_12 */
mbed_official 390:35c2c1cf29cd 267 volatile uint32_t N1SA_12; /* N1SA_12 */
mbed_official 390:35c2c1cf29cd 268 volatile uint32_t N1DA_12; /* N1DA_12 */
mbed_official 390:35c2c1cf29cd 269 volatile uint32_t N1TB_12; /* N1TB_12 */
mbed_official 390:35c2c1cf29cd 270 volatile uint32_t CRSA_12; /* CRSA_12 */
mbed_official 390:35c2c1cf29cd 271 volatile uint32_t CRDA_12; /* CRDA_12 */
mbed_official 390:35c2c1cf29cd 272 volatile uint32_t CRTB_12; /* CRTB_12 */
mbed_official 390:35c2c1cf29cd 273 volatile uint32_t CHSTAT_12; /* CHSTAT_12 */
mbed_official 390:35c2c1cf29cd 274 volatile uint32_t CHCTRL_12; /* CHCTRL_12 */
mbed_official 390:35c2c1cf29cd 275 volatile uint32_t CHCFG_12; /* CHCFG_12 */
mbed_official 390:35c2c1cf29cd 276 volatile uint32_t CHITVL_12; /* CHITVL_12 */
mbed_official 390:35c2c1cf29cd 277 volatile uint32_t CHEXT_12; /* CHEXT_12 */
mbed_official 390:35c2c1cf29cd 278 volatile uint32_t NXLA_12; /* NXLA_12 */
mbed_official 390:35c2c1cf29cd 279 volatile uint32_t CRLA_12; /* CRLA_12 */
mbed_official 390:35c2c1cf29cd 280 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 281 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 282 volatile uint32_t N0SA_13; /* N0SA_13 */
mbed_official 390:35c2c1cf29cd 283 volatile uint32_t N0DA_13; /* N0DA_13 */
mbed_official 390:35c2c1cf29cd 284 volatile uint32_t N0TB_13; /* N0TB_13 */
mbed_official 390:35c2c1cf29cd 285 volatile uint32_t N1SA_13; /* N1SA_13 */
mbed_official 390:35c2c1cf29cd 286 volatile uint32_t N1DA_13; /* N1DA_13 */
mbed_official 390:35c2c1cf29cd 287 volatile uint32_t N1TB_13; /* N1TB_13 */
mbed_official 390:35c2c1cf29cd 288 volatile uint32_t CRSA_13; /* CRSA_13 */
mbed_official 390:35c2c1cf29cd 289 volatile uint32_t CRDA_13; /* CRDA_13 */
mbed_official 390:35c2c1cf29cd 290 volatile uint32_t CRTB_13; /* CRTB_13 */
mbed_official 390:35c2c1cf29cd 291 volatile uint32_t CHSTAT_13; /* CHSTAT_13 */
mbed_official 390:35c2c1cf29cd 292 volatile uint32_t CHCTRL_13; /* CHCTRL_13 */
mbed_official 390:35c2c1cf29cd 293 volatile uint32_t CHCFG_13; /* CHCFG_13 */
mbed_official 390:35c2c1cf29cd 294 volatile uint32_t CHITVL_13; /* CHITVL_13 */
mbed_official 390:35c2c1cf29cd 295 volatile uint32_t CHEXT_13; /* CHEXT_13 */
mbed_official 390:35c2c1cf29cd 296 volatile uint32_t NXLA_13; /* NXLA_13 */
mbed_official 390:35c2c1cf29cd 297 volatile uint32_t CRLA_13; /* CRLA_13 */
mbed_official 390:35c2c1cf29cd 298 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 299 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 300 volatile uint32_t N0SA_14; /* N0SA_14 */
mbed_official 390:35c2c1cf29cd 301 volatile uint32_t N0DA_14; /* N0DA_14 */
mbed_official 390:35c2c1cf29cd 302 volatile uint32_t N0TB_14; /* N0TB_14 */
mbed_official 390:35c2c1cf29cd 303 volatile uint32_t N1SA_14; /* N1SA_14 */
mbed_official 390:35c2c1cf29cd 304 volatile uint32_t N1DA_14; /* N1DA_14 */
mbed_official 390:35c2c1cf29cd 305 volatile uint32_t N1TB_14; /* N1TB_14 */
mbed_official 390:35c2c1cf29cd 306 volatile uint32_t CRSA_14; /* CRSA_14 */
mbed_official 390:35c2c1cf29cd 307 volatile uint32_t CRDA_14; /* CRDA_14 */
mbed_official 390:35c2c1cf29cd 308 volatile uint32_t CRTB_14; /* CRTB_14 */
mbed_official 390:35c2c1cf29cd 309 volatile uint32_t CHSTAT_14; /* CHSTAT_14 */
mbed_official 390:35c2c1cf29cd 310 volatile uint32_t CHCTRL_14; /* CHCTRL_14 */
mbed_official 390:35c2c1cf29cd 311 volatile uint32_t CHCFG_14; /* CHCFG_14 */
mbed_official 390:35c2c1cf29cd 312 volatile uint32_t CHITVL_14; /* CHITVL_14 */
mbed_official 390:35c2c1cf29cd 313 volatile uint32_t CHEXT_14; /* CHEXT_14 */
mbed_official 390:35c2c1cf29cd 314 volatile uint32_t NXLA_14; /* NXLA_14 */
mbed_official 390:35c2c1cf29cd 315 volatile uint32_t CRLA_14; /* CRLA_14 */
mbed_official 390:35c2c1cf29cd 316 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 317 /* start of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 318 volatile uint32_t N0SA_15; /* N0SA_15 */
mbed_official 390:35c2c1cf29cd 319 volatile uint32_t N0DA_15; /* N0DA_15 */
mbed_official 390:35c2c1cf29cd 320 volatile uint32_t N0TB_15; /* N0TB_15 */
mbed_official 390:35c2c1cf29cd 321 volatile uint32_t N1SA_15; /* N1SA_15 */
mbed_official 390:35c2c1cf29cd 322 volatile uint32_t N1DA_15; /* N1DA_15 */
mbed_official 390:35c2c1cf29cd 323 volatile uint32_t N1TB_15; /* N1TB_15 */
mbed_official 390:35c2c1cf29cd 324 volatile uint32_t CRSA_15; /* CRSA_15 */
mbed_official 390:35c2c1cf29cd 325 volatile uint32_t CRDA_15; /* CRDA_15 */
mbed_official 390:35c2c1cf29cd 326 volatile uint32_t CRTB_15; /* CRTB_15 */
mbed_official 390:35c2c1cf29cd 327 volatile uint32_t CHSTAT_15; /* CHSTAT_15 */
mbed_official 390:35c2c1cf29cd 328 volatile uint32_t CHCTRL_15; /* CHCTRL_15 */
mbed_official 390:35c2c1cf29cd 329 volatile uint32_t CHCFG_15; /* CHCFG_15 */
mbed_official 390:35c2c1cf29cd 330 volatile uint32_t CHITVL_15; /* CHITVL_15 */
mbed_official 390:35c2c1cf29cd 331 volatile uint32_t CHEXT_15; /* CHEXT_15 */
mbed_official 390:35c2c1cf29cd 332 volatile uint32_t NXLA_15; /* NXLA_15 */
mbed_official 390:35c2c1cf29cd 333 volatile uint32_t CRLA_15; /* CRLA_15 */
mbed_official 390:35c2c1cf29cd 334 /* end of struct st_dmac_n */
mbed_official 390:35c2c1cf29cd 335 volatile uint8_t dummy190[256]; /* */
mbed_official 390:35c2c1cf29cd 336 /* start of struct st_dmaccommon_n */
mbed_official 390:35c2c1cf29cd 337 volatile uint32_t DCTRL_8_15; /* DCTRL_8_15 */
mbed_official 390:35c2c1cf29cd 338 volatile uint8_t dummy191[12]; /* */
mbed_official 390:35c2c1cf29cd 339 volatile uint32_t DSTAT_EN_8_15; /* DSTAT_EN_8_15 */
mbed_official 390:35c2c1cf29cd 340 volatile uint32_t DSTAT_ER_8_15; /* DSTAT_ER_8_15 */
mbed_official 390:35c2c1cf29cd 341 volatile uint32_t DSTAT_END_8_15; /* DSTAT_END_8_15 */
mbed_official 390:35c2c1cf29cd 342 volatile uint32_t DSTAT_TC_8_15; /* DSTAT_TC_8_15 */
mbed_official 390:35c2c1cf29cd 343 volatile uint32_t DSTAT_SUS_8_15; /* DSTAT_SUS_8_15 */
mbed_official 390:35c2c1cf29cd 344 /* end of struct st_dmaccommon_n */
mbed_official 390:35c2c1cf29cd 345 volatile uint8_t dummy192[350095580]; /* */
mbed_official 390:35c2c1cf29cd 346 volatile uint32_t DMARS0; /* DMARS0 */
mbed_official 390:35c2c1cf29cd 347 volatile uint32_t DMARS1; /* DMARS1 */
mbed_official 390:35c2c1cf29cd 348 volatile uint32_t DMARS2; /* DMARS2 */
mbed_official 390:35c2c1cf29cd 349 volatile uint32_t DMARS3; /* DMARS3 */
mbed_official 390:35c2c1cf29cd 350 volatile uint32_t DMARS4; /* DMARS4 */
mbed_official 390:35c2c1cf29cd 351 volatile uint32_t DMARS5; /* DMARS5 */
mbed_official 390:35c2c1cf29cd 352 volatile uint32_t DMARS6; /* DMARS6 */
mbed_official 390:35c2c1cf29cd 353 volatile uint32_t DMARS7; /* DMARS7 */
mbed_official 390:35c2c1cf29cd 354 };
mbed_official 390:35c2c1cf29cd 355
mbed_official 390:35c2c1cf29cd 356
mbed_official 390:35c2c1cf29cd 357 struct st_dmaccommon_n
mbed_official 390:35c2c1cf29cd 358 {
mbed_official 390:35c2c1cf29cd 359 volatile uint32_t DCTRL_0_7; /* DCTRL_0_7 */
mbed_official 390:35c2c1cf29cd 360 volatile uint8_t dummy1[12]; /* */
mbed_official 390:35c2c1cf29cd 361 volatile uint32_t DSTAT_EN_0_7; /* DSTAT_EN_0_7 */
mbed_official 390:35c2c1cf29cd 362 volatile uint32_t DSTAT_ER_0_7; /* DSTAT_ER_0_7 */
mbed_official 390:35c2c1cf29cd 363 volatile uint32_t DSTAT_END_0_7; /* DSTAT_END_0_7 */
mbed_official 390:35c2c1cf29cd 364 volatile uint32_t DSTAT_TC_0_7; /* DSTAT_TC_0_7 */
mbed_official 390:35c2c1cf29cd 365 volatile uint32_t DSTAT_SUS_0_7; /* DSTAT_SUS_0_7 */
mbed_official 390:35c2c1cf29cd 366 };
mbed_official 390:35c2c1cf29cd 367
mbed_official 390:35c2c1cf29cd 368
mbed_official 390:35c2c1cf29cd 369 struct st_dmac_n
mbed_official 390:35c2c1cf29cd 370 {
mbed_official 390:35c2c1cf29cd 371 volatile uint32_t N0SA_n; /* N0SA_n */
mbed_official 390:35c2c1cf29cd 372 volatile uint32_t N0DA_n; /* N0DA_n */
mbed_official 390:35c2c1cf29cd 373 volatile uint32_t N0TB_n; /* N0TB_n */
mbed_official 390:35c2c1cf29cd 374 volatile uint32_t N1SA_n; /* N1SA_n */
mbed_official 390:35c2c1cf29cd 375 volatile uint32_t N1DA_n; /* N1DA_n */
mbed_official 390:35c2c1cf29cd 376 volatile uint32_t N1TB_n; /* N1TB_n */
mbed_official 390:35c2c1cf29cd 377 volatile uint32_t CRSA_n; /* CRSA_n */
mbed_official 390:35c2c1cf29cd 378 volatile uint32_t CRDA_n; /* CRDA_n */
mbed_official 390:35c2c1cf29cd 379 volatile uint32_t CRTB_n; /* CRTB_n */
mbed_official 390:35c2c1cf29cd 380 volatile uint32_t CHSTAT_n; /* CHSTAT_n */
mbed_official 390:35c2c1cf29cd 381 volatile uint32_t CHCTRL_n; /* CHCTRL_n */
mbed_official 390:35c2c1cf29cd 382 volatile uint32_t CHCFG_n; /* CHCFG_n */
mbed_official 390:35c2c1cf29cd 383 volatile uint32_t CHITVL_n; /* CHITVL_n */
mbed_official 390:35c2c1cf29cd 384 volatile uint32_t CHEXT_n; /* CHEXT_n */
mbed_official 390:35c2c1cf29cd 385 volatile uint32_t NXLA_n; /* NXLA_n */
mbed_official 390:35c2c1cf29cd 386 volatile uint32_t CRLA_n; /* CRLA_n */
mbed_official 390:35c2c1cf29cd 387 };
mbed_official 390:35c2c1cf29cd 388
mbed_official 390:35c2c1cf29cd 389
mbed_official 390:35c2c1cf29cd 390 #define DMAC (*(struct st_dmac *)0xE8200000uL) /* DMAC */
mbed_official 390:35c2c1cf29cd 391
mbed_official 390:35c2c1cf29cd 392
mbed_official 390:35c2c1cf29cd 393 /* Start of channnel array defines of DMAC */
mbed_official 390:35c2c1cf29cd 394
mbed_official 390:35c2c1cf29cd 395 /* Channnel array defines of DMACn */
mbed_official 390:35c2c1cf29cd 396 /*(Sample) value = DMACn[ channel ]->N0SA_n; */
mbed_official 390:35c2c1cf29cd 397 #define DMACn_COUNT 16
mbed_official 390:35c2c1cf29cd 398 #define DMACn_ADDRESS_LIST \
mbed_official 390:35c2c1cf29cd 399 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
mbed_official 390:35c2c1cf29cd 400 &DMAC0, &DMAC1, &DMAC2, &DMAC3, &DMAC4, &DMAC5, &DMAC6, &DMAC7, \
mbed_official 390:35c2c1cf29cd 401 &DMAC8, &DMAC9, &DMAC10, &DMAC11, &DMAC12, &DMAC13, &DMAC14, &DMAC15 \
mbed_official 390:35c2c1cf29cd 402 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
mbed_official 390:35c2c1cf29cd 403 #define DMAC0 (*(struct st_dmac_n *)&DMAC.N0SA_0) /* DMAC0 */
mbed_official 390:35c2c1cf29cd 404 #define DMAC1 (*(struct st_dmac_n *)&DMAC.N0SA_1) /* DMAC1 */
mbed_official 390:35c2c1cf29cd 405 #define DMAC2 (*(struct st_dmac_n *)&DMAC.N0SA_2) /* DMAC2 */
mbed_official 390:35c2c1cf29cd 406 #define DMAC3 (*(struct st_dmac_n *)&DMAC.N0SA_3) /* DMAC3 */
mbed_official 390:35c2c1cf29cd 407 #define DMAC4 (*(struct st_dmac_n *)&DMAC.N0SA_4) /* DMAC4 */
mbed_official 390:35c2c1cf29cd 408 #define DMAC5 (*(struct st_dmac_n *)&DMAC.N0SA_5) /* DMAC5 */
mbed_official 390:35c2c1cf29cd 409 #define DMAC6 (*(struct st_dmac_n *)&DMAC.N0SA_6) /* DMAC6 */
mbed_official 390:35c2c1cf29cd 410 #define DMAC7 (*(struct st_dmac_n *)&DMAC.N0SA_7) /* DMAC7 */
mbed_official 390:35c2c1cf29cd 411 #define DMAC8 (*(struct st_dmac_n *)&DMAC.N0SA_8) /* DMAC8 */
mbed_official 390:35c2c1cf29cd 412 #define DMAC9 (*(struct st_dmac_n *)&DMAC.N0SA_9) /* DMAC9 */
mbed_official 390:35c2c1cf29cd 413 #define DMAC10 (*(struct st_dmac_n *)&DMAC.N0SA_10) /* DMAC10 */
mbed_official 390:35c2c1cf29cd 414 #define DMAC11 (*(struct st_dmac_n *)&DMAC.N0SA_11) /* DMAC11 */
mbed_official 390:35c2c1cf29cd 415 #define DMAC12 (*(struct st_dmac_n *)&DMAC.N0SA_12) /* DMAC12 */
mbed_official 390:35c2c1cf29cd 416 #define DMAC13 (*(struct st_dmac_n *)&DMAC.N0SA_13) /* DMAC13 */
mbed_official 390:35c2c1cf29cd 417 #define DMAC14 (*(struct st_dmac_n *)&DMAC.N0SA_14) /* DMAC14 */
mbed_official 390:35c2c1cf29cd 418 #define DMAC15 (*(struct st_dmac_n *)&DMAC.N0SA_15) /* DMAC15 */
mbed_official 390:35c2c1cf29cd 419
mbed_official 390:35c2c1cf29cd 420
mbed_official 390:35c2c1cf29cd 421 /* Channnel array defines of DMACnn */
mbed_official 390:35c2c1cf29cd 422 /*(Sample) value = DMACnn[ channel / 8 ]->DCTRL_0_7; */
mbed_official 390:35c2c1cf29cd 423 #define DMACnn_COUNT 2
mbed_official 390:35c2c1cf29cd 424 #define DMACnn_ADDRESS_LIST \
mbed_official 390:35c2c1cf29cd 425 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
mbed_official 390:35c2c1cf29cd 426 &DMAC07, &DMAC815 \
mbed_official 390:35c2c1cf29cd 427 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
mbed_official 390:35c2c1cf29cd 428 #define DMAC07 (*(struct st_dmaccommon_n *)&DMAC.DCTRL_0_7) /* DMAC07 */
mbed_official 390:35c2c1cf29cd 429 #define DMAC815 (*(struct st_dmaccommon_n *)&DMAC.DCTRL_8_15) /* DMAC815 */
mbed_official 390:35c2c1cf29cd 430
mbed_official 390:35c2c1cf29cd 431
mbed_official 390:35c2c1cf29cd 432 /* Channnel array defines of DMACmm */
mbed_official 390:35c2c1cf29cd 433 /*(Sample) value = DMACmm[ channel / 2 ]->DMARS; */
mbed_official 390:35c2c1cf29cd 434 struct st_dmars_mm
mbed_official 390:35c2c1cf29cd 435 {
mbed_official 390:35c2c1cf29cd 436 uint32_t DMARS; /* DMARS */
mbed_official 390:35c2c1cf29cd 437 };
mbed_official 390:35c2c1cf29cd 438 #define DMACmm_COUNT 8
mbed_official 390:35c2c1cf29cd 439 #define DMACmm_ADDRESS_LIST \
mbed_official 390:35c2c1cf29cd 440 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
mbed_official 390:35c2c1cf29cd 441 &DMAC01, &DMAC23, &DMAC45, &DMAC67, &DMAC89, &DMAC1011, &DMAC1213, &DMAC1415 \
mbed_official 390:35c2c1cf29cd 442 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
mbed_official 390:35c2c1cf29cd 443 #define DMAC01 (*(struct st_dmars_mm *)&DMAC.DMARS0) /* DMAC0-1 */
mbed_official 390:35c2c1cf29cd 444 #define DMAC23 (*(struct st_dmars_mm *)&DMAC.DMARS1) /* DMAC2-3 */
mbed_official 390:35c2c1cf29cd 445 #define DMAC45 (*(struct st_dmars_mm *)&DMAC.DMARS2) /* DMAC4-5 */
mbed_official 390:35c2c1cf29cd 446 #define DMAC67 (*(struct st_dmars_mm *)&DMAC.DMARS3) /* DMAC6-7 */
mbed_official 390:35c2c1cf29cd 447 #define DMAC89 (*(struct st_dmars_mm *)&DMAC.DMARS4) /* DMAC8-9 */
mbed_official 390:35c2c1cf29cd 448 #define DMAC1011 (*(struct st_dmars_mm *)&DMAC.DMARS5) /* DMAC10-11 */
mbed_official 390:35c2c1cf29cd 449 #define DMAC1213 (*(struct st_dmars_mm *)&DMAC.DMARS6) /* DMAC12-13 */
mbed_official 390:35c2c1cf29cd 450 #define DMAC1415 (*(struct st_dmars_mm *)&DMAC.DMARS7) /* DMAC14-15 */
mbed_official 390:35c2c1cf29cd 451
mbed_official 390:35c2c1cf29cd 452 /* End of channnel array defines of DMAC */
mbed_official 390:35c2c1cf29cd 453
mbed_official 390:35c2c1cf29cd 454
mbed_official 390:35c2c1cf29cd 455 #define DMACN0SA_0 DMAC.N0SA_0
mbed_official 390:35c2c1cf29cd 456 #define DMACN0DA_0 DMAC.N0DA_0
mbed_official 390:35c2c1cf29cd 457 #define DMACN0TB_0 DMAC.N0TB_0
mbed_official 390:35c2c1cf29cd 458 #define DMACN1SA_0 DMAC.N1SA_0
mbed_official 390:35c2c1cf29cd 459 #define DMACN1DA_0 DMAC.N1DA_0
mbed_official 390:35c2c1cf29cd 460 #define DMACN1TB_0 DMAC.N1TB_0
mbed_official 390:35c2c1cf29cd 461 #define DMACCRSA_0 DMAC.CRSA_0
mbed_official 390:35c2c1cf29cd 462 #define DMACCRDA_0 DMAC.CRDA_0
mbed_official 390:35c2c1cf29cd 463 #define DMACCRTB_0 DMAC.CRTB_0
mbed_official 390:35c2c1cf29cd 464 #define DMACCHSTAT_0 DMAC.CHSTAT_0
mbed_official 390:35c2c1cf29cd 465 #define DMACCHCTRL_0 DMAC.CHCTRL_0
mbed_official 390:35c2c1cf29cd 466 #define DMACCHCFG_0 DMAC.CHCFG_0
mbed_official 390:35c2c1cf29cd 467 #define DMACCHITVL_0 DMAC.CHITVL_0
mbed_official 390:35c2c1cf29cd 468 #define DMACCHEXT_0 DMAC.CHEXT_0
mbed_official 390:35c2c1cf29cd 469 #define DMACNXLA_0 DMAC.NXLA_0
mbed_official 390:35c2c1cf29cd 470 #define DMACCRLA_0 DMAC.CRLA_0
mbed_official 390:35c2c1cf29cd 471 #define DMACN0SA_1 DMAC.N0SA_1
mbed_official 390:35c2c1cf29cd 472 #define DMACN0DA_1 DMAC.N0DA_1
mbed_official 390:35c2c1cf29cd 473 #define DMACN0TB_1 DMAC.N0TB_1
mbed_official 390:35c2c1cf29cd 474 #define DMACN1SA_1 DMAC.N1SA_1
mbed_official 390:35c2c1cf29cd 475 #define DMACN1DA_1 DMAC.N1DA_1
mbed_official 390:35c2c1cf29cd 476 #define DMACN1TB_1 DMAC.N1TB_1
mbed_official 390:35c2c1cf29cd 477 #define DMACCRSA_1 DMAC.CRSA_1
mbed_official 390:35c2c1cf29cd 478 #define DMACCRDA_1 DMAC.CRDA_1
mbed_official 390:35c2c1cf29cd 479 #define DMACCRTB_1 DMAC.CRTB_1
mbed_official 390:35c2c1cf29cd 480 #define DMACCHSTAT_1 DMAC.CHSTAT_1
mbed_official 390:35c2c1cf29cd 481 #define DMACCHCTRL_1 DMAC.CHCTRL_1
mbed_official 390:35c2c1cf29cd 482 #define DMACCHCFG_1 DMAC.CHCFG_1
mbed_official 390:35c2c1cf29cd 483 #define DMACCHITVL_1 DMAC.CHITVL_1
mbed_official 390:35c2c1cf29cd 484 #define DMACCHEXT_1 DMAC.CHEXT_1
mbed_official 390:35c2c1cf29cd 485 #define DMACNXLA_1 DMAC.NXLA_1
mbed_official 390:35c2c1cf29cd 486 #define DMACCRLA_1 DMAC.CRLA_1
mbed_official 390:35c2c1cf29cd 487 #define DMACN0SA_2 DMAC.N0SA_2
mbed_official 390:35c2c1cf29cd 488 #define DMACN0DA_2 DMAC.N0DA_2
mbed_official 390:35c2c1cf29cd 489 #define DMACN0TB_2 DMAC.N0TB_2
mbed_official 390:35c2c1cf29cd 490 #define DMACN1SA_2 DMAC.N1SA_2
mbed_official 390:35c2c1cf29cd 491 #define DMACN1DA_2 DMAC.N1DA_2
mbed_official 390:35c2c1cf29cd 492 #define DMACN1TB_2 DMAC.N1TB_2
mbed_official 390:35c2c1cf29cd 493 #define DMACCRSA_2 DMAC.CRSA_2
mbed_official 390:35c2c1cf29cd 494 #define DMACCRDA_2 DMAC.CRDA_2
mbed_official 390:35c2c1cf29cd 495 #define DMACCRTB_2 DMAC.CRTB_2
mbed_official 390:35c2c1cf29cd 496 #define DMACCHSTAT_2 DMAC.CHSTAT_2
mbed_official 390:35c2c1cf29cd 497 #define DMACCHCTRL_2 DMAC.CHCTRL_2
mbed_official 390:35c2c1cf29cd 498 #define DMACCHCFG_2 DMAC.CHCFG_2
mbed_official 390:35c2c1cf29cd 499 #define DMACCHITVL_2 DMAC.CHITVL_2
mbed_official 390:35c2c1cf29cd 500 #define DMACCHEXT_2 DMAC.CHEXT_2
mbed_official 390:35c2c1cf29cd 501 #define DMACNXLA_2 DMAC.NXLA_2
mbed_official 390:35c2c1cf29cd 502 #define DMACCRLA_2 DMAC.CRLA_2
mbed_official 390:35c2c1cf29cd 503 #define DMACN0SA_3 DMAC.N0SA_3
mbed_official 390:35c2c1cf29cd 504 #define DMACN0DA_3 DMAC.N0DA_3
mbed_official 390:35c2c1cf29cd 505 #define DMACN0TB_3 DMAC.N0TB_3
mbed_official 390:35c2c1cf29cd 506 #define DMACN1SA_3 DMAC.N1SA_3
mbed_official 390:35c2c1cf29cd 507 #define DMACN1DA_3 DMAC.N1DA_3
mbed_official 390:35c2c1cf29cd 508 #define DMACN1TB_3 DMAC.N1TB_3
mbed_official 390:35c2c1cf29cd 509 #define DMACCRSA_3 DMAC.CRSA_3
mbed_official 390:35c2c1cf29cd 510 #define DMACCRDA_3 DMAC.CRDA_3
mbed_official 390:35c2c1cf29cd 511 #define DMACCRTB_3 DMAC.CRTB_3
mbed_official 390:35c2c1cf29cd 512 #define DMACCHSTAT_3 DMAC.CHSTAT_3
mbed_official 390:35c2c1cf29cd 513 #define DMACCHCTRL_3 DMAC.CHCTRL_3
mbed_official 390:35c2c1cf29cd 514 #define DMACCHCFG_3 DMAC.CHCFG_3
mbed_official 390:35c2c1cf29cd 515 #define DMACCHITVL_3 DMAC.CHITVL_3
mbed_official 390:35c2c1cf29cd 516 #define DMACCHEXT_3 DMAC.CHEXT_3
mbed_official 390:35c2c1cf29cd 517 #define DMACNXLA_3 DMAC.NXLA_3
mbed_official 390:35c2c1cf29cd 518 #define DMACCRLA_3 DMAC.CRLA_3
mbed_official 390:35c2c1cf29cd 519 #define DMACN0SA_4 DMAC.N0SA_4
mbed_official 390:35c2c1cf29cd 520 #define DMACN0DA_4 DMAC.N0DA_4
mbed_official 390:35c2c1cf29cd 521 #define DMACN0TB_4 DMAC.N0TB_4
mbed_official 390:35c2c1cf29cd 522 #define DMACN1SA_4 DMAC.N1SA_4
mbed_official 390:35c2c1cf29cd 523 #define DMACN1DA_4 DMAC.N1DA_4
mbed_official 390:35c2c1cf29cd 524 #define DMACN1TB_4 DMAC.N1TB_4
mbed_official 390:35c2c1cf29cd 525 #define DMACCRSA_4 DMAC.CRSA_4
mbed_official 390:35c2c1cf29cd 526 #define DMACCRDA_4 DMAC.CRDA_4
mbed_official 390:35c2c1cf29cd 527 #define DMACCRTB_4 DMAC.CRTB_4
mbed_official 390:35c2c1cf29cd 528 #define DMACCHSTAT_4 DMAC.CHSTAT_4
mbed_official 390:35c2c1cf29cd 529 #define DMACCHCTRL_4 DMAC.CHCTRL_4
mbed_official 390:35c2c1cf29cd 530 #define DMACCHCFG_4 DMAC.CHCFG_4
mbed_official 390:35c2c1cf29cd 531 #define DMACCHITVL_4 DMAC.CHITVL_4
mbed_official 390:35c2c1cf29cd 532 #define DMACCHEXT_4 DMAC.CHEXT_4
mbed_official 390:35c2c1cf29cd 533 #define DMACNXLA_4 DMAC.NXLA_4
mbed_official 390:35c2c1cf29cd 534 #define DMACCRLA_4 DMAC.CRLA_4
mbed_official 390:35c2c1cf29cd 535 #define DMACN0SA_5 DMAC.N0SA_5
mbed_official 390:35c2c1cf29cd 536 #define DMACN0DA_5 DMAC.N0DA_5
mbed_official 390:35c2c1cf29cd 537 #define DMACN0TB_5 DMAC.N0TB_5
mbed_official 390:35c2c1cf29cd 538 #define DMACN1SA_5 DMAC.N1SA_5
mbed_official 390:35c2c1cf29cd 539 #define DMACN1DA_5 DMAC.N1DA_5
mbed_official 390:35c2c1cf29cd 540 #define DMACN1TB_5 DMAC.N1TB_5
mbed_official 390:35c2c1cf29cd 541 #define DMACCRSA_5 DMAC.CRSA_5
mbed_official 390:35c2c1cf29cd 542 #define DMACCRDA_5 DMAC.CRDA_5
mbed_official 390:35c2c1cf29cd 543 #define DMACCRTB_5 DMAC.CRTB_5
mbed_official 390:35c2c1cf29cd 544 #define DMACCHSTAT_5 DMAC.CHSTAT_5
mbed_official 390:35c2c1cf29cd 545 #define DMACCHCTRL_5 DMAC.CHCTRL_5
mbed_official 390:35c2c1cf29cd 546 #define DMACCHCFG_5 DMAC.CHCFG_5
mbed_official 390:35c2c1cf29cd 547 #define DMACCHITVL_5 DMAC.CHITVL_5
mbed_official 390:35c2c1cf29cd 548 #define DMACCHEXT_5 DMAC.CHEXT_5
mbed_official 390:35c2c1cf29cd 549 #define DMACNXLA_5 DMAC.NXLA_5
mbed_official 390:35c2c1cf29cd 550 #define DMACCRLA_5 DMAC.CRLA_5
mbed_official 390:35c2c1cf29cd 551 #define DMACN0SA_6 DMAC.N0SA_6
mbed_official 390:35c2c1cf29cd 552 #define DMACN0DA_6 DMAC.N0DA_6
mbed_official 390:35c2c1cf29cd 553 #define DMACN0TB_6 DMAC.N0TB_6
mbed_official 390:35c2c1cf29cd 554 #define DMACN1SA_6 DMAC.N1SA_6
mbed_official 390:35c2c1cf29cd 555 #define DMACN1DA_6 DMAC.N1DA_6
mbed_official 390:35c2c1cf29cd 556 #define DMACN1TB_6 DMAC.N1TB_6
mbed_official 390:35c2c1cf29cd 557 #define DMACCRSA_6 DMAC.CRSA_6
mbed_official 390:35c2c1cf29cd 558 #define DMACCRDA_6 DMAC.CRDA_6
mbed_official 390:35c2c1cf29cd 559 #define DMACCRTB_6 DMAC.CRTB_6
mbed_official 390:35c2c1cf29cd 560 #define DMACCHSTAT_6 DMAC.CHSTAT_6
mbed_official 390:35c2c1cf29cd 561 #define DMACCHCTRL_6 DMAC.CHCTRL_6
mbed_official 390:35c2c1cf29cd 562 #define DMACCHCFG_6 DMAC.CHCFG_6
mbed_official 390:35c2c1cf29cd 563 #define DMACCHITVL_6 DMAC.CHITVL_6
mbed_official 390:35c2c1cf29cd 564 #define DMACCHEXT_6 DMAC.CHEXT_6
mbed_official 390:35c2c1cf29cd 565 #define DMACNXLA_6 DMAC.NXLA_6
mbed_official 390:35c2c1cf29cd 566 #define DMACCRLA_6 DMAC.CRLA_6
mbed_official 390:35c2c1cf29cd 567 #define DMACN0SA_7 DMAC.N0SA_7
mbed_official 390:35c2c1cf29cd 568 #define DMACN0DA_7 DMAC.N0DA_7
mbed_official 390:35c2c1cf29cd 569 #define DMACN0TB_7 DMAC.N0TB_7
mbed_official 390:35c2c1cf29cd 570 #define DMACN1SA_7 DMAC.N1SA_7
mbed_official 390:35c2c1cf29cd 571 #define DMACN1DA_7 DMAC.N1DA_7
mbed_official 390:35c2c1cf29cd 572 #define DMACN1TB_7 DMAC.N1TB_7
mbed_official 390:35c2c1cf29cd 573 #define DMACCRSA_7 DMAC.CRSA_7
mbed_official 390:35c2c1cf29cd 574 #define DMACCRDA_7 DMAC.CRDA_7
mbed_official 390:35c2c1cf29cd 575 #define DMACCRTB_7 DMAC.CRTB_7
mbed_official 390:35c2c1cf29cd 576 #define DMACCHSTAT_7 DMAC.CHSTAT_7
mbed_official 390:35c2c1cf29cd 577 #define DMACCHCTRL_7 DMAC.CHCTRL_7
mbed_official 390:35c2c1cf29cd 578 #define DMACCHCFG_7 DMAC.CHCFG_7
mbed_official 390:35c2c1cf29cd 579 #define DMACCHITVL_7 DMAC.CHITVL_7
mbed_official 390:35c2c1cf29cd 580 #define DMACCHEXT_7 DMAC.CHEXT_7
mbed_official 390:35c2c1cf29cd 581 #define DMACNXLA_7 DMAC.NXLA_7
mbed_official 390:35c2c1cf29cd 582 #define DMACCRLA_7 DMAC.CRLA_7
mbed_official 390:35c2c1cf29cd 583 #define DMACDCTRL_0_7 DMAC.DCTRL_0_7
mbed_official 390:35c2c1cf29cd 584 #define DMACDSTAT_EN_0_7 DMAC.DSTAT_EN_0_7
mbed_official 390:35c2c1cf29cd 585 #define DMACDSTAT_ER_0_7 DMAC.DSTAT_ER_0_7
mbed_official 390:35c2c1cf29cd 586 #define DMACDSTAT_END_0_7 DMAC.DSTAT_END_0_7
mbed_official 390:35c2c1cf29cd 587 #define DMACDSTAT_TC_0_7 DMAC.DSTAT_TC_0_7
mbed_official 390:35c2c1cf29cd 588 #define DMACDSTAT_SUS_0_7 DMAC.DSTAT_SUS_0_7
mbed_official 390:35c2c1cf29cd 589 #define DMACN0SA_8 DMAC.N0SA_8
mbed_official 390:35c2c1cf29cd 590 #define DMACN0DA_8 DMAC.N0DA_8
mbed_official 390:35c2c1cf29cd 591 #define DMACN0TB_8 DMAC.N0TB_8
mbed_official 390:35c2c1cf29cd 592 #define DMACN1SA_8 DMAC.N1SA_8
mbed_official 390:35c2c1cf29cd 593 #define DMACN1DA_8 DMAC.N1DA_8
mbed_official 390:35c2c1cf29cd 594 #define DMACN1TB_8 DMAC.N1TB_8
mbed_official 390:35c2c1cf29cd 595 #define DMACCRSA_8 DMAC.CRSA_8
mbed_official 390:35c2c1cf29cd 596 #define DMACCRDA_8 DMAC.CRDA_8
mbed_official 390:35c2c1cf29cd 597 #define DMACCRTB_8 DMAC.CRTB_8
mbed_official 390:35c2c1cf29cd 598 #define DMACCHSTAT_8 DMAC.CHSTAT_8
mbed_official 390:35c2c1cf29cd 599 #define DMACCHCTRL_8 DMAC.CHCTRL_8
mbed_official 390:35c2c1cf29cd 600 #define DMACCHCFG_8 DMAC.CHCFG_8
mbed_official 390:35c2c1cf29cd 601 #define DMACCHITVL_8 DMAC.CHITVL_8
mbed_official 390:35c2c1cf29cd 602 #define DMACCHEXT_8 DMAC.CHEXT_8
mbed_official 390:35c2c1cf29cd 603 #define DMACNXLA_8 DMAC.NXLA_8
mbed_official 390:35c2c1cf29cd 604 #define DMACCRLA_8 DMAC.CRLA_8
mbed_official 390:35c2c1cf29cd 605 #define DMACN0SA_9 DMAC.N0SA_9
mbed_official 390:35c2c1cf29cd 606 #define DMACN0DA_9 DMAC.N0DA_9
mbed_official 390:35c2c1cf29cd 607 #define DMACN0TB_9 DMAC.N0TB_9
mbed_official 390:35c2c1cf29cd 608 #define DMACN1SA_9 DMAC.N1SA_9
mbed_official 390:35c2c1cf29cd 609 #define DMACN1DA_9 DMAC.N1DA_9
mbed_official 390:35c2c1cf29cd 610 #define DMACN1TB_9 DMAC.N1TB_9
mbed_official 390:35c2c1cf29cd 611 #define DMACCRSA_9 DMAC.CRSA_9
mbed_official 390:35c2c1cf29cd 612 #define DMACCRDA_9 DMAC.CRDA_9
mbed_official 390:35c2c1cf29cd 613 #define DMACCRTB_9 DMAC.CRTB_9
mbed_official 390:35c2c1cf29cd 614 #define DMACCHSTAT_9 DMAC.CHSTAT_9
mbed_official 390:35c2c1cf29cd 615 #define DMACCHCTRL_9 DMAC.CHCTRL_9
mbed_official 390:35c2c1cf29cd 616 #define DMACCHCFG_9 DMAC.CHCFG_9
mbed_official 390:35c2c1cf29cd 617 #define DMACCHITVL_9 DMAC.CHITVL_9
mbed_official 390:35c2c1cf29cd 618 #define DMACCHEXT_9 DMAC.CHEXT_9
mbed_official 390:35c2c1cf29cd 619 #define DMACNXLA_9 DMAC.NXLA_9
mbed_official 390:35c2c1cf29cd 620 #define DMACCRLA_9 DMAC.CRLA_9
mbed_official 390:35c2c1cf29cd 621 #define DMACN0SA_10 DMAC.N0SA_10
mbed_official 390:35c2c1cf29cd 622 #define DMACN0DA_10 DMAC.N0DA_10
mbed_official 390:35c2c1cf29cd 623 #define DMACN0TB_10 DMAC.N0TB_10
mbed_official 390:35c2c1cf29cd 624 #define DMACN1SA_10 DMAC.N1SA_10
mbed_official 390:35c2c1cf29cd 625 #define DMACN1DA_10 DMAC.N1DA_10
mbed_official 390:35c2c1cf29cd 626 #define DMACN1TB_10 DMAC.N1TB_10
mbed_official 390:35c2c1cf29cd 627 #define DMACCRSA_10 DMAC.CRSA_10
mbed_official 390:35c2c1cf29cd 628 #define DMACCRDA_10 DMAC.CRDA_10
mbed_official 390:35c2c1cf29cd 629 #define DMACCRTB_10 DMAC.CRTB_10
mbed_official 390:35c2c1cf29cd 630 #define DMACCHSTAT_10 DMAC.CHSTAT_10
mbed_official 390:35c2c1cf29cd 631 #define DMACCHCTRL_10 DMAC.CHCTRL_10
mbed_official 390:35c2c1cf29cd 632 #define DMACCHCFG_10 DMAC.CHCFG_10
mbed_official 390:35c2c1cf29cd 633 #define DMACCHITVL_10 DMAC.CHITVL_10
mbed_official 390:35c2c1cf29cd 634 #define DMACCHEXT_10 DMAC.CHEXT_10
mbed_official 390:35c2c1cf29cd 635 #define DMACNXLA_10 DMAC.NXLA_10
mbed_official 390:35c2c1cf29cd 636 #define DMACCRLA_10 DMAC.CRLA_10
mbed_official 390:35c2c1cf29cd 637 #define DMACN0SA_11 DMAC.N0SA_11
mbed_official 390:35c2c1cf29cd 638 #define DMACN0DA_11 DMAC.N0DA_11
mbed_official 390:35c2c1cf29cd 639 #define DMACN0TB_11 DMAC.N0TB_11
mbed_official 390:35c2c1cf29cd 640 #define DMACN1SA_11 DMAC.N1SA_11
mbed_official 390:35c2c1cf29cd 641 #define DMACN1DA_11 DMAC.N1DA_11
mbed_official 390:35c2c1cf29cd 642 #define DMACN1TB_11 DMAC.N1TB_11
mbed_official 390:35c2c1cf29cd 643 #define DMACCRSA_11 DMAC.CRSA_11
mbed_official 390:35c2c1cf29cd 644 #define DMACCRDA_11 DMAC.CRDA_11
mbed_official 390:35c2c1cf29cd 645 #define DMACCRTB_11 DMAC.CRTB_11
mbed_official 390:35c2c1cf29cd 646 #define DMACCHSTAT_11 DMAC.CHSTAT_11
mbed_official 390:35c2c1cf29cd 647 #define DMACCHCTRL_11 DMAC.CHCTRL_11
mbed_official 390:35c2c1cf29cd 648 #define DMACCHCFG_11 DMAC.CHCFG_11
mbed_official 390:35c2c1cf29cd 649 #define DMACCHITVL_11 DMAC.CHITVL_11
mbed_official 390:35c2c1cf29cd 650 #define DMACCHEXT_11 DMAC.CHEXT_11
mbed_official 390:35c2c1cf29cd 651 #define DMACNXLA_11 DMAC.NXLA_11
mbed_official 390:35c2c1cf29cd 652 #define DMACCRLA_11 DMAC.CRLA_11
mbed_official 390:35c2c1cf29cd 653 #define DMACN0SA_12 DMAC.N0SA_12
mbed_official 390:35c2c1cf29cd 654 #define DMACN0DA_12 DMAC.N0DA_12
mbed_official 390:35c2c1cf29cd 655 #define DMACN0TB_12 DMAC.N0TB_12
mbed_official 390:35c2c1cf29cd 656 #define DMACN1SA_12 DMAC.N1SA_12
mbed_official 390:35c2c1cf29cd 657 #define DMACN1DA_12 DMAC.N1DA_12
mbed_official 390:35c2c1cf29cd 658 #define DMACN1TB_12 DMAC.N1TB_12
mbed_official 390:35c2c1cf29cd 659 #define DMACCRSA_12 DMAC.CRSA_12
mbed_official 390:35c2c1cf29cd 660 #define DMACCRDA_12 DMAC.CRDA_12
mbed_official 390:35c2c1cf29cd 661 #define DMACCRTB_12 DMAC.CRTB_12
mbed_official 390:35c2c1cf29cd 662 #define DMACCHSTAT_12 DMAC.CHSTAT_12
mbed_official 390:35c2c1cf29cd 663 #define DMACCHCTRL_12 DMAC.CHCTRL_12
mbed_official 390:35c2c1cf29cd 664 #define DMACCHCFG_12 DMAC.CHCFG_12
mbed_official 390:35c2c1cf29cd 665 #define DMACCHITVL_12 DMAC.CHITVL_12
mbed_official 390:35c2c1cf29cd 666 #define DMACCHEXT_12 DMAC.CHEXT_12
mbed_official 390:35c2c1cf29cd 667 #define DMACNXLA_12 DMAC.NXLA_12
mbed_official 390:35c2c1cf29cd 668 #define DMACCRLA_12 DMAC.CRLA_12
mbed_official 390:35c2c1cf29cd 669 #define DMACN0SA_13 DMAC.N0SA_13
mbed_official 390:35c2c1cf29cd 670 #define DMACN0DA_13 DMAC.N0DA_13
mbed_official 390:35c2c1cf29cd 671 #define DMACN0TB_13 DMAC.N0TB_13
mbed_official 390:35c2c1cf29cd 672 #define DMACN1SA_13 DMAC.N1SA_13
mbed_official 390:35c2c1cf29cd 673 #define DMACN1DA_13 DMAC.N1DA_13
mbed_official 390:35c2c1cf29cd 674 #define DMACN1TB_13 DMAC.N1TB_13
mbed_official 390:35c2c1cf29cd 675 #define DMACCRSA_13 DMAC.CRSA_13
mbed_official 390:35c2c1cf29cd 676 #define DMACCRDA_13 DMAC.CRDA_13
mbed_official 390:35c2c1cf29cd 677 #define DMACCRTB_13 DMAC.CRTB_13
mbed_official 390:35c2c1cf29cd 678 #define DMACCHSTAT_13 DMAC.CHSTAT_13
mbed_official 390:35c2c1cf29cd 679 #define DMACCHCTRL_13 DMAC.CHCTRL_13
mbed_official 390:35c2c1cf29cd 680 #define DMACCHCFG_13 DMAC.CHCFG_13
mbed_official 390:35c2c1cf29cd 681 #define DMACCHITVL_13 DMAC.CHITVL_13
mbed_official 390:35c2c1cf29cd 682 #define DMACCHEXT_13 DMAC.CHEXT_13
mbed_official 390:35c2c1cf29cd 683 #define DMACNXLA_13 DMAC.NXLA_13
mbed_official 390:35c2c1cf29cd 684 #define DMACCRLA_13 DMAC.CRLA_13
mbed_official 390:35c2c1cf29cd 685 #define DMACN0SA_14 DMAC.N0SA_14
mbed_official 390:35c2c1cf29cd 686 #define DMACN0DA_14 DMAC.N0DA_14
mbed_official 390:35c2c1cf29cd 687 #define DMACN0TB_14 DMAC.N0TB_14
mbed_official 390:35c2c1cf29cd 688 #define DMACN1SA_14 DMAC.N1SA_14
mbed_official 390:35c2c1cf29cd 689 #define DMACN1DA_14 DMAC.N1DA_14
mbed_official 390:35c2c1cf29cd 690 #define DMACN1TB_14 DMAC.N1TB_14
mbed_official 390:35c2c1cf29cd 691 #define DMACCRSA_14 DMAC.CRSA_14
mbed_official 390:35c2c1cf29cd 692 #define DMACCRDA_14 DMAC.CRDA_14
mbed_official 390:35c2c1cf29cd 693 #define DMACCRTB_14 DMAC.CRTB_14
mbed_official 390:35c2c1cf29cd 694 #define DMACCHSTAT_14 DMAC.CHSTAT_14
mbed_official 390:35c2c1cf29cd 695 #define DMACCHCTRL_14 DMAC.CHCTRL_14
mbed_official 390:35c2c1cf29cd 696 #define DMACCHCFG_14 DMAC.CHCFG_14
mbed_official 390:35c2c1cf29cd 697 #define DMACCHITVL_14 DMAC.CHITVL_14
mbed_official 390:35c2c1cf29cd 698 #define DMACCHEXT_14 DMAC.CHEXT_14
mbed_official 390:35c2c1cf29cd 699 #define DMACNXLA_14 DMAC.NXLA_14
mbed_official 390:35c2c1cf29cd 700 #define DMACCRLA_14 DMAC.CRLA_14
mbed_official 390:35c2c1cf29cd 701 #define DMACN0SA_15 DMAC.N0SA_15
mbed_official 390:35c2c1cf29cd 702 #define DMACN0DA_15 DMAC.N0DA_15
mbed_official 390:35c2c1cf29cd 703 #define DMACN0TB_15 DMAC.N0TB_15
mbed_official 390:35c2c1cf29cd 704 #define DMACN1SA_15 DMAC.N1SA_15
mbed_official 390:35c2c1cf29cd 705 #define DMACN1DA_15 DMAC.N1DA_15
mbed_official 390:35c2c1cf29cd 706 #define DMACN1TB_15 DMAC.N1TB_15
mbed_official 390:35c2c1cf29cd 707 #define DMACCRSA_15 DMAC.CRSA_15
mbed_official 390:35c2c1cf29cd 708 #define DMACCRDA_15 DMAC.CRDA_15
mbed_official 390:35c2c1cf29cd 709 #define DMACCRTB_15 DMAC.CRTB_15
mbed_official 390:35c2c1cf29cd 710 #define DMACCHSTAT_15 DMAC.CHSTAT_15
mbed_official 390:35c2c1cf29cd 711 #define DMACCHCTRL_15 DMAC.CHCTRL_15
mbed_official 390:35c2c1cf29cd 712 #define DMACCHCFG_15 DMAC.CHCFG_15
mbed_official 390:35c2c1cf29cd 713 #define DMACCHITVL_15 DMAC.CHITVL_15
mbed_official 390:35c2c1cf29cd 714 #define DMACCHEXT_15 DMAC.CHEXT_15
mbed_official 390:35c2c1cf29cd 715 #define DMACNXLA_15 DMAC.NXLA_15
mbed_official 390:35c2c1cf29cd 716 #define DMACCRLA_15 DMAC.CRLA_15
mbed_official 390:35c2c1cf29cd 717 #define DMACDCTRL_8_15 DMAC.DCTRL_8_15
mbed_official 390:35c2c1cf29cd 718 #define DMACDSTAT_EN_8_15 DMAC.DSTAT_EN_8_15
mbed_official 390:35c2c1cf29cd 719 #define DMACDSTAT_ER_8_15 DMAC.DSTAT_ER_8_15
mbed_official 390:35c2c1cf29cd 720 #define DMACDSTAT_END_8_15 DMAC.DSTAT_END_8_15
mbed_official 390:35c2c1cf29cd 721 #define DMACDSTAT_TC_8_15 DMAC.DSTAT_TC_8_15
mbed_official 390:35c2c1cf29cd 722 #define DMACDSTAT_SUS_8_15 DMAC.DSTAT_SUS_8_15
mbed_official 390:35c2c1cf29cd 723 #define DMACDMARS0 DMAC.DMARS0
mbed_official 390:35c2c1cf29cd 724 #define DMACDMARS1 DMAC.DMARS1
mbed_official 390:35c2c1cf29cd 725 #define DMACDMARS2 DMAC.DMARS2
mbed_official 390:35c2c1cf29cd 726 #define DMACDMARS3 DMAC.DMARS3
mbed_official 390:35c2c1cf29cd 727 #define DMACDMARS4 DMAC.DMARS4
mbed_official 390:35c2c1cf29cd 728 #define DMACDMARS5 DMAC.DMARS5
mbed_official 390:35c2c1cf29cd 729 #define DMACDMARS6 DMAC.DMARS6
mbed_official 390:35c2c1cf29cd 730 #define DMACDMARS7 DMAC.DMARS7
mbed_official 390:35c2c1cf29cd 731 /* <-SEC M1.10.1 */
mbed_official 390:35c2c1cf29cd 732 /* <-QAC 0639 */
mbed_official 390:35c2c1cf29cd 733 #endif