Zakaria ElQotbi / mbed-src

mbed library sources for airmote

Fork of mbed-src by mbed official

targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iobitmasks/rspi_iobitmask.h@625:88d3fa07e462, 2015-11-24 (annotated)

Committer:
zskdan
Date:
Tue Nov 24 14:02:46 2015 +0000
Revision:
625:88d3fa07e462
Parent:
390:35c2c1cf29cd 
remove unused service

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 2 * DISCLAIMER
mbed_official 390:35c2c1cf29cd 3 * This software is supplied by Renesas Electronics Corporation and is only
mbed_official 390:35c2c1cf29cd 4 * intended for use with Renesas products. No other uses are authorized. This
mbed_official 390:35c2c1cf29cd 5 * software is owned by Renesas Electronics Corporation and is protected under
mbed_official 390:35c2c1cf29cd 6 * all applicable laws, including copyright laws.
mbed_official 390:35c2c1cf29cd 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
mbed_official 390:35c2c1cf29cd 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
mbed_official 390:35c2c1cf29cd 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
mbed_official 390:35c2c1cf29cd 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
mbed_official 390:35c2c1cf29cd 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
mbed_official 390:35c2c1cf29cd 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
mbed_official 390:35c2c1cf29cd 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
mbed_official 390:35c2c1cf29cd 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
mbed_official 390:35c2c1cf29cd 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
mbed_official 390:35c2c1cf29cd 16 * Renesas reserves the right, without notice, to make changes to this software
mbed_official 390:35c2c1cf29cd 17 * and to discontinue the availability of this software. By using this software,
mbed_official 390:35c2c1cf29cd 18 * you agree to the additional terms and conditions found by accessing the
mbed_official 390:35c2c1cf29cd 19 * following link:
mbed_official 390:35c2c1cf29cd 20 * http://www.renesas.com/disclaimer
mbed_official 390:35c2c1cf29cd 21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
mbed_official 390:35c2c1cf29cd 22 *******************************************************************************/
mbed_official 390:35c2c1cf29cd 23 /*******************************************************************************
mbed_official 390:35c2c1cf29cd 24 * File Name : rspi_iobitmask.h
mbed_official 390:35c2c1cf29cd 25 * $Rev: 1114 $
mbed_official 390:35c2c1cf29cd 26 * $Date:: 2014-07-09 14:56:39 +0900#$
mbed_official 390:35c2c1cf29cd 27 * Description : Renesas Serial Peripheral Interface register define header
mbed_official 390:35c2c1cf29cd 28 *******************************************************************************/
mbed_official 390:35c2c1cf29cd 29 #ifndef RSPI_IOBITMASK_H
mbed_official 390:35c2c1cf29cd 30 #define RSPI_IOBITMASK_H
mbed_official 390:35c2c1cf29cd 31
mbed_official 390:35c2c1cf29cd 32
mbed_official 390:35c2c1cf29cd 33 /* ==== Mask values for IO registers ==== */
mbed_official 390:35c2c1cf29cd 34 #define RSPIn_SPCR_MODFEN (0x04u)
mbed_official 390:35c2c1cf29cd 35 #define RSPIn_SPCR_MSTR (0x08u)
mbed_official 390:35c2c1cf29cd 36 #define RSPIn_SPCR_SPEIE (0x10u)
mbed_official 390:35c2c1cf29cd 37 #define RSPIn_SPCR_SPTIE (0x20u)
mbed_official 390:35c2c1cf29cd 38 #define RSPIn_SPCR_SPE (0x40u)
mbed_official 390:35c2c1cf29cd 39 #define RSPIn_SPCR_SPRIE (0x80u)
mbed_official 390:35c2c1cf29cd 40
mbed_official 390:35c2c1cf29cd 41 #define RSPIn_SSLP_SSL0P (0x01u)
mbed_official 390:35c2c1cf29cd 42
mbed_official 390:35c2c1cf29cd 43 #define RSPIn_SPPCR_SPLP (0x01u)
mbed_official 390:35c2c1cf29cd 44 #define RSPIn_SPPCR_MOIFV (0x10u)
mbed_official 390:35c2c1cf29cd 45 #define RSPIn_SPPCR_MOIFE (0x20u)
mbed_official 390:35c2c1cf29cd 46
mbed_official 390:35c2c1cf29cd 47 #define RSPIn_SPSR_OVRF (0x01u)
mbed_official 390:35c2c1cf29cd 48 #define RSPIn_SPSR_MODF (0x04u)
mbed_official 390:35c2c1cf29cd 49 #define RSPIn_SPSR_SPTEF (0x20u)
mbed_official 390:35c2c1cf29cd 50 #define RSPIn_SPSR_TEND (0x40u)
mbed_official 390:35c2c1cf29cd 51 #define RSPIn_SPSR_SPRF (0x80u)
mbed_official 390:35c2c1cf29cd 52
mbed_official 390:35c2c1cf29cd 53 #define RSPIn_SPDR_UINT32 (0xFFFFFFFFuL)
mbed_official 390:35c2c1cf29cd 54
mbed_official 390:35c2c1cf29cd 55 #define RSPIn_SPDR_UINT16 (0xFFFFu)
mbed_official 390:35c2c1cf29cd 56
mbed_official 390:35c2c1cf29cd 57 #define RSPIn_SPDR_UINT8 (0xFFu)
mbed_official 390:35c2c1cf29cd 58
mbed_official 390:35c2c1cf29cd 59 #define RSPIn_SPSCR_SPSLN (0x03u)
mbed_official 390:35c2c1cf29cd 60
mbed_official 390:35c2c1cf29cd 61 #define RSPIn_SPSSR_SPCP (0x03u)
mbed_official 390:35c2c1cf29cd 62
mbed_official 390:35c2c1cf29cd 63 #define RSPIn_SPBR_SPR (0xFFu)
mbed_official 390:35c2c1cf29cd 64
mbed_official 390:35c2c1cf29cd 65 #define RSPIn_SPDCR_SPLW (0x60u)
mbed_official 390:35c2c1cf29cd 66 #define RSPIn_SPDCR_TXDMY (0x80u)
mbed_official 390:35c2c1cf29cd 67
mbed_official 390:35c2c1cf29cd 68 #define RSPIn_SPCKD_SCKDL (0x07u)
mbed_official 390:35c2c1cf29cd 69
mbed_official 390:35c2c1cf29cd 70 #define RSPIn_SSLND_SLNDL (0x07u)
mbed_official 390:35c2c1cf29cd 71
mbed_official 390:35c2c1cf29cd 72 #define RSPIn_SPND_SPNDL (0x07u)
mbed_official 390:35c2c1cf29cd 73
mbed_official 390:35c2c1cf29cd 74 #define RSPIn_SPCMD0_CPHA (0x0001u)
mbed_official 390:35c2c1cf29cd 75 #define RSPIn_SPCMD0_CPOL (0x0002u)
mbed_official 390:35c2c1cf29cd 76 #define RSPIn_SPCMD0_BRDV (0x000Cu)
mbed_official 390:35c2c1cf29cd 77 #define RSPIn_SPCMD0_SSLKP (0x0080u)
mbed_official 390:35c2c1cf29cd 78 #define RSPIn_SPCMD0_SPB (0x0F00u)
mbed_official 390:35c2c1cf29cd 79 #define RSPIn_SPCMD0_LSBF (0x1000u)
mbed_official 390:35c2c1cf29cd 80 #define RSPIn_SPCMD0_SPNDEN (0x2000u)
mbed_official 390:35c2c1cf29cd 81 #define RSPIn_SPCMD0_SLNDEN (0x4000u)
mbed_official 390:35c2c1cf29cd 82 #define RSPIn_SPCMD0_SCKDEN (0x8000u)
mbed_official 390:35c2c1cf29cd 83
mbed_official 390:35c2c1cf29cd 84 #define RSPIn_SPCMD1_CPHA (0x0001u)
mbed_official 390:35c2c1cf29cd 85 #define RSPIn_SPCMD1_CPOL (0x0002u)
mbed_official 390:35c2c1cf29cd 86 #define RSPIn_SPCMD1_BRDV (0x000Cu)
mbed_official 390:35c2c1cf29cd 87 #define RSPIn_SPCMD1_SSLKP (0x0080u)
mbed_official 390:35c2c1cf29cd 88 #define RSPIn_SPCMD1_SPB (0x0F00u)
mbed_official 390:35c2c1cf29cd 89 #define RSPIn_SPCMD1_LSBF (0x1000u)
mbed_official 390:35c2c1cf29cd 90 #define RSPIn_SPCMD1_SPNDEN (0x2000u)
mbed_official 390:35c2c1cf29cd 91 #define RSPIn_SPCMD1_SLNDEN (0x4000u)
mbed_official 390:35c2c1cf29cd 92 #define RSPIn_SPCMD1_SCKDEN (0x8000u)
mbed_official 390:35c2c1cf29cd 93
mbed_official 390:35c2c1cf29cd 94 #define RSPIn_SPCMD2_CPHA (0x0001u)
mbed_official 390:35c2c1cf29cd 95 #define RSPIn_SPCMD2_CPOL (0x0002u)
mbed_official 390:35c2c1cf29cd 96 #define RSPIn_SPCMD2_BRDV (0x000Cu)
mbed_official 390:35c2c1cf29cd 97 #define RSPIn_SPCMD2_SSLKP (0x0080u)
mbed_official 390:35c2c1cf29cd 98 #define RSPIn_SPCMD2_SPB (0x0F00u)
mbed_official 390:35c2c1cf29cd 99 #define RSPIn_SPCMD2_LSBF (0x1000u)
mbed_official 390:35c2c1cf29cd 100 #define RSPIn_SPCMD2_SPNDEN (0x2000u)
mbed_official 390:35c2c1cf29cd 101 #define RSPIn_SPCMD2_SLNDEN (0x4000u)
mbed_official 390:35c2c1cf29cd 102 #define RSPIn_SPCMD2_SCKDEN (0x8000u)
mbed_official 390:35c2c1cf29cd 103
mbed_official 390:35c2c1cf29cd 104 #define RSPIn_SPCMD3_CPHA (0x0001u)
mbed_official 390:35c2c1cf29cd 105 #define RSPIn_SPCMD3_CPOL (0x0002u)
mbed_official 390:35c2c1cf29cd 106 #define RSPIn_SPCMD3_BRDV (0x000Cu)
mbed_official 390:35c2c1cf29cd 107 #define RSPIn_SPCMD3_SSLKP (0x0080u)
mbed_official 390:35c2c1cf29cd 108 #define RSPIn_SPCMD3_SPB (0x0F00u)
mbed_official 390:35c2c1cf29cd 109 #define RSPIn_SPCMD3_LSBF (0x1000u)
mbed_official 390:35c2c1cf29cd 110 #define RSPIn_SPCMD3_SPNDEN (0x2000u)
mbed_official 390:35c2c1cf29cd 111 #define RSPIn_SPCMD3_SLNDEN (0x4000u)
mbed_official 390:35c2c1cf29cd 112 #define RSPIn_SPCMD3_SCKDEN (0x8000u)
mbed_official 390:35c2c1cf29cd 113
mbed_official 390:35c2c1cf29cd 114 #define RSPIn_SPBFCR_RXTRG (0x07u)
mbed_official 390:35c2c1cf29cd 115 #define RSPIn_SPBFCR_TXTRG (0x30u)
mbed_official 390:35c2c1cf29cd 116 #define RSPIn_SPBFCR_RXRST (0x40u)
mbed_official 390:35c2c1cf29cd 117 #define RSPIn_SPBFCR_TXRST (0x80u)
mbed_official 390:35c2c1cf29cd 118
mbed_official 390:35c2c1cf29cd 119 #define RSPIn_SPBFDR_R (0x003Fu)
mbed_official 390:35c2c1cf29cd 120 #define RSPIn_SPBFDR_T (0x0F00u)
mbed_official 390:35c2c1cf29cd 121
mbed_official 390:35c2c1cf29cd 122
mbed_official 390:35c2c1cf29cd 123 /* ==== Shift values for IO registers ==== */
mbed_official 390:35c2c1cf29cd 124 #define RSPIn_SPCR_MODFEN_SHIFT (2u)
mbed_official 390:35c2c1cf29cd 125 #define RSPIn_SPCR_MSTR_SHIFT (3u)
mbed_official 390:35c2c1cf29cd 126 #define RSPIn_SPCR_SPEIE_SHIFT (4u)
mbed_official 390:35c2c1cf29cd 127 #define RSPIn_SPCR_SPTIE_SHIFT (5u)
mbed_official 390:35c2c1cf29cd 128 #define RSPIn_SPCR_SPE_SHIFT (6u)
mbed_official 390:35c2c1cf29cd 129 #define RSPIn_SPCR_SPRIE_SHIFT (7u)
mbed_official 390:35c2c1cf29cd 130
mbed_official 390:35c2c1cf29cd 131 #define RSPIn_SSLP_SSL0P_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 132
mbed_official 390:35c2c1cf29cd 133 #define RSPIn_SPPCR_SPLP_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 134 #define RSPIn_SPPCR_MOIFV_SHIFT (4u)
mbed_official 390:35c2c1cf29cd 135 #define RSPIn_SPPCR_MOIFE_SHIFT (5u)
mbed_official 390:35c2c1cf29cd 136
mbed_official 390:35c2c1cf29cd 137 #define RSPIn_SPSR_OVRF_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 138 #define RSPIn_SPSR_MODF_SHIFT (2u)
mbed_official 390:35c2c1cf29cd 139 #define RSPIn_SPSR_SPTEF_SHIFT (5u)
mbed_official 390:35c2c1cf29cd 140 #define RSPIn_SPSR_TEND_SHIFT (6u)
mbed_official 390:35c2c1cf29cd 141 #define RSPIn_SPSR_SPRF_SHIFT (7u)
mbed_official 390:35c2c1cf29cd 142
mbed_official 390:35c2c1cf29cd 143 #define RSPIn_SPDR_UINT32_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 144
mbed_official 390:35c2c1cf29cd 145 #define RSPIn_SPDR_UINT16_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 146
mbed_official 390:35c2c1cf29cd 147 #define RSPIn_SPDR_UINT8_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 148
mbed_official 390:35c2c1cf29cd 149 #define RSPIn_SPSCR_SPSLN_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 150
mbed_official 390:35c2c1cf29cd 151 #define RSPIn_SPSSR_SPCP_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 152
mbed_official 390:35c2c1cf29cd 153 #define RSPIn_SPBR_SPR_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 154
mbed_official 390:35c2c1cf29cd 155 #define RSPIn_SPDCR_SPLW_SHIFT (5u)
mbed_official 390:35c2c1cf29cd 156 #define RSPIn_SPDCR_TXDMY_SHIFT (7u)
mbed_official 390:35c2c1cf29cd 157
mbed_official 390:35c2c1cf29cd 158 #define RSPIn_SPCKD_SCKDL_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 159
mbed_official 390:35c2c1cf29cd 160 #define RSPIn_SSLND_SLNDL_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 161
mbed_official 390:35c2c1cf29cd 162 #define RSPIn_SPND_SPNDL_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 163
mbed_official 390:35c2c1cf29cd 164 #define RSPIn_SPCMD0_CPHA_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 165 #define RSPIn_SPCMD0_CPOL_SHIFT (1u)
mbed_official 390:35c2c1cf29cd 166 #define RSPIn_SPCMD0_BRDV_SHIFT (2u)
mbed_official 390:35c2c1cf29cd 167 #define RSPIn_SPCMD0_SSLKP_SHIFT (7u)
mbed_official 390:35c2c1cf29cd 168 #define RSPIn_SPCMD0_SPB_SHIFT (8u)
mbed_official 390:35c2c1cf29cd 169 #define RSPIn_SPCMD0_LSBF_SHIFT (12u)
mbed_official 390:35c2c1cf29cd 170 #define RSPIn_SPCMD0_SPNDEN_SHIFT (13u)
mbed_official 390:35c2c1cf29cd 171 #define RSPIn_SPCMD0_SLNDEN_SHIFT (14u)
mbed_official 390:35c2c1cf29cd 172 #define RSPIn_SPCMD0_SCKDEN_SHIFT (15u)
mbed_official 390:35c2c1cf29cd 173
mbed_official 390:35c2c1cf29cd 174 #define RSPIn_SPCMD1_CPHA_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 175 #define RSPIn_SPCMD1_CPOL_SHIFT (1u)
mbed_official 390:35c2c1cf29cd 176 #define RSPIn_SPCMD1_BRDV_SHIFT (2u)
mbed_official 390:35c2c1cf29cd 177 #define RSPIn_SPCMD1_SSLKP_SHIFT (7u)
mbed_official 390:35c2c1cf29cd 178 #define RSPIn_SPCMD1_SPB_SHIFT (8u)
mbed_official 390:35c2c1cf29cd 179 #define RSPIn_SPCMD1_LSBF_SHIFT (12u)
mbed_official 390:35c2c1cf29cd 180 #define RSPIn_SPCMD1_SPNDEN_SHIFT (13u)
mbed_official 390:35c2c1cf29cd 181 #define RSPIn_SPCMD1_SLNDEN_SHIFT (14u)
mbed_official 390:35c2c1cf29cd 182 #define RSPIn_SPCMD1_SCKDEN_SHIFT (15u)
mbed_official 390:35c2c1cf29cd 183
mbed_official 390:35c2c1cf29cd 184 #define RSPIn_SPCMD2_CPHA_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 185 #define RSPIn_SPCMD2_CPOL_SHIFT (1u)
mbed_official 390:35c2c1cf29cd 186 #define RSPIn_SPCMD2_BRDV_SHIFT (2u)
mbed_official 390:35c2c1cf29cd 187 #define RSPIn_SPCMD2_SSLKP_SHIFT (7u)
mbed_official 390:35c2c1cf29cd 188 #define RSPIn_SPCMD2_SPB_SHIFT (8u)
mbed_official 390:35c2c1cf29cd 189 #define RSPIn_SPCMD2_LSBF_SHIFT (12u)
mbed_official 390:35c2c1cf29cd 190 #define RSPIn_SPCMD2_SPNDEN_SHIFT (13u)
mbed_official 390:35c2c1cf29cd 191 #define RSPIn_SPCMD2_SLNDEN_SHIFT (14u)
mbed_official 390:35c2c1cf29cd 192 #define RSPIn_SPCMD2_SCKDEN_SHIFT (15u)
mbed_official 390:35c2c1cf29cd 193
mbed_official 390:35c2c1cf29cd 194 #define RSPIn_SPCMD3_CPHA_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 195 #define RSPIn_SPCMD3_CPOL_SHIFT (1u)
mbed_official 390:35c2c1cf29cd 196 #define RSPIn_SPCMD3_BRDV_SHIFT (2u)
mbed_official 390:35c2c1cf29cd 197 #define RSPIn_SPCMD3_SSLKP_SHIFT (7u)
mbed_official 390:35c2c1cf29cd 198 #define RSPIn_SPCMD3_SPB_SHIFT (8u)
mbed_official 390:35c2c1cf29cd 199 #define RSPIn_SPCMD3_LSBF_SHIFT (12u)
mbed_official 390:35c2c1cf29cd 200 #define RSPIn_SPCMD3_SPNDEN_SHIFT (13u)
mbed_official 390:35c2c1cf29cd 201 #define RSPIn_SPCMD3_SLNDEN_SHIFT (14u)
mbed_official 390:35c2c1cf29cd 202 #define RSPIn_SPCMD3_SCKDEN_SHIFT (15u)
mbed_official 390:35c2c1cf29cd 203
mbed_official 390:35c2c1cf29cd 204 #define RSPIn_SPBFCR_RXTRG_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 205 #define RSPIn_SPBFCR_TXTRG_SHIFT (4u)
mbed_official 390:35c2c1cf29cd 206 #define RSPIn_SPBFCR_RXRST_SHIFT (6u)
mbed_official 390:35c2c1cf29cd 207 #define RSPIn_SPBFCR_TXRST_SHIFT (7u)
mbed_official 390:35c2c1cf29cd 208
mbed_official 390:35c2c1cf29cd 209 #define RSPIn_SPBFDR_R_SHIFT (0u)
mbed_official 390:35c2c1cf29cd 210 #define RSPIn_SPBFDR_T_SHIFT (8u)
mbed_official 390:35c2c1cf29cd 211
mbed_official 390:35c2c1cf29cd 212
mbed_official 390:35c2c1cf29cd 213 #endif /* RSPI_IOBITMASK_H */
mbed_official 390:35c2c1cf29cd 214
mbed_official 390:35c2c1cf29cd 215 /* End of File */