ADS1298.h

00001 // Copyright 2013, Zainul Charbiwala
00002 
00003 #ifndef _ADS1298_h_
00004 #define _ADS1298_h_
00005 
00006 #include "mbed.h"
00007 
00008 #define TCSSC   1 // 6 ns
00009 #define TSCCS   2 // 4 TCLKs
00010 #define TPOR    32768 // 2^16 TCLKs
00011 #define TRST    1 // 2 TCLKs 
00012 #define TRST2   9 // 18 TCLKs
00013 #define TINTREF 150000 // 150ms
00014 #define TCMD    2 // 4 TCLKs
00015 #define TCSH    1 // 2 TCLKs
00016 
00017 #define RDATA   0x12
00018 #define RDATAC  0x10
00019 #define SDATAC  0x11
00020 #define WREG    0x40
00021 #define RREG    0x20
00022 
00023 #define ID      0x00
00024 #define CONFIG1 0x01
00025 #define CONFIG2 0x02
00026 #define CONFIG3 0x03
00027 #define LOFF    0x04
00028 #define CH1SET  0x05
00029 #define CH2SET  0x06
00030 #define CH3SET  0x07
00031 #define CH4SET  0x08
00032 #define CH5SET  0x09
00033 #define CH6SET  0x0A
00034 #define CH7SET  0x0B
00035 #define CH8SET  0x0C
00036 #define RLD_SENSP 0x0D
00037 #define RLD_SENSN 0x0E
00038 #define LOFF_SENSP 0x0F
00039 #define LOFF_SENSN 0x10
00040 #define LOFF_FLIP 0x11
00041 #define LOFF_STATP 0x12
00042 #define LOFF_STATN 0x13
00043 #define GPIO    0x14
00044 #define PACE    0x15
00045 #define RESP    0x16
00046 #define CONFIG4 0x17
00047 #define WCT1    0x18
00048 #define WCT2    0x19
00049 
00050 
00051 #define CONFIG1_HR          0x80
00052 #define CONFIG1_DAISYEN     0x40
00053 #define CONFIG1_CLKEN       0x20
00054 #define CONFIG1_DR2         0x04
00055 #define CONFIG1_DR1         0x02
00056 #define CONFIG1_DR0         0x01
00057 
00058 #define CONFIG2_WCTCHOP     0x20
00059 #define CONFIG2_INTTEST     0x10
00060 #define CONFIG2_TESTAMP     0x04
00061 #define CONFIG2_TESTFREQ1   0x02
00062 #define CONFIG2_TESTFREQ0   0x01
00063 #define CONFIG2_DEFAULT     0x00
00064 
00065 #define CONFIG3_PD_REFBUF   0x80
00066 #define CONFIG3_VREF_4V     0x20
00067 #define CONFIG3_RLD_MEAS    0x10
00068 #define CONFIG3_RLDREF_INT  0x08
00069 #define CONFIG3_PD_RLD      0x04
00070 #define CONFIG3_RLD_LOFF_SENS 0x02
00071 #define CONFIG3_RLD_STAT    0x01
00072 #define CONFIG3_DEFAULT     0x40
00073 
00074 #define LOFF_COMP_TH2       0x80      
00075 #define LOFF_COMP_TH1       0x40
00076 #define LOFF_COMP_TH0       0x20
00077 #define LOFF_VLEAD_OFF_EN   0x10
00078 #define LOFF_ILEAD_OFF1     0x08
00079 #define LOFF_ILEAD_OFF0     0x04
00080 #define LOFF_FLEAD_OFF1     0x02
00081 #define LOFF_FLEAD_OFF0     0x01
00082 
00083 #define CHNSET_PD           0x80
00084 #define CHNSET_GAIN2        0x40
00085 #define CHNSET_GAIN1        0x20
00086 #define CHNSET_GAIN0        0x10
00087 #define CHNSET_MUXN2        0x04
00088 #define CHNSET_MUXN1        0x02
00089 #define CHNSET_MUXN0        0x01
00090 #define CHNSET_DEFAULT      0x00
00091 
00092 #define GPIO_GPIOD4         0x80
00093 #define GPIO_GPIOD3         0x40
00094 #define GPIO_GPIOD2         0x20
00095 #define GPIO_GPIOD1         0x10
00096 #define GPIO_GPIOC4         0x08
00097 #define GPIO_GPIOC3         0x04
00098 #define GPIO_GPIOC2         0x02
00099 #define GPIO_GPIOC1         0x01
00100 
00101 #define PACE_PACEE1         0x10
00102 #define PACE_PACEE0         0x08
00103 #define PACE_PACEO1         0x04
00104 #define PACE_PACEO0         0x02
00105 #define PACE_PD_PACE        0x01
00106 
00107 #define RESP_DEMOD_EN1      0x80
00108 #define RESP_MOD_EN1        0x40
00109 #define RESP_DEFAULT        0x20
00110 #define RESP_PH2            0x10
00111 #define RESP_PH1            0x08
00112 #define RESP_PH0            0x04
00113 #define RESP_CTRL1          0x02
00114 #define RESP_CTRL0          0x01
00115 
00116 #define CONFIG4_RESP_FREQ2  0x80
00117 #define CONFIG4_RESP_FREQ1  0x40
00118 #define CONFIG4_RESP_FREQ0  0x20
00119 #define CONFIG4_SINGLE_SHOT 0x08
00120 #define CONFIG4_WCT_TO_RLD  0x04
00121 #define CONFIG4_PD_LOFF_COMP 0x02
00122 
00123 #define WCT1_AVF_CH6        0x80
00124 #define WCT1_AVL_CH5        0x40
00125 #define WCT1_AVR_CH7        0x20
00126 #define WCT1_AVR_CH4        0x10
00127 #define WCT1_PD_WCTA        0x08
00128 #define WCT1_WCTA2          0x04
00129 #define WCT1_WCTA1          0x02
00130 #define WCT1_WCTA0          0x01
00131 
00132 #define WCT2_PD_WCTC        0x80
00133 #define WCT2_PD_WCTB        0x40
00134 #define WCT2_WCTB2          0x20
00135 #define WCT2_WCTB1          0x10
00136 #define WCT2_WCTB0          0x08
00137 #define WCT2_WCTC2          0x04
00138 #define WCT2_WCTC1          0x02
00139 #define WCT2_WCTC0          0x01
00140 
00141 // Bit positions of the lead off status bits
00142 #define LOFFRA 15
00143 #define LOFFLA 14
00144 #define LOFFLL 13
00145 #define LOFFRL 12
00146 #define LOFFV1 11
00147 #define LOFFV2 10
00148 #define LOFFV3 9
00149 #define LOFFV4 8
00150 #define LOFFV5 7
00151 #define LOFFV6 6
00152 
00153 /** Class to control an ADS1298 AFE
00154  *
00155  * Example:
00156  * @code
00157  *
00158  * @endcode
00159  */
00160 class ADS1298 {
00161   public:
00162     
00163  /**
00164   * @brief Constructor
00165   * @param mosi mbed pin to use for MOSI line of SPI interface.
00166   * @param miso mbed pin to use for MISO line of SPI interface.
00167   * @param sck mbed pin to use for SCK line of SPI interface.
00168   * @param csn mbed pin to use for not chip select line of SPI interface.
00169   * @param reset mbed pin to use for the reset line.
00170   * @param drdy mbed pin to use for the data ready line.
00171   * @param start mbed pin to use for the start conversion line.
00172   */    
00173     ADS1298(PinName mosi, PinName miso, PinName sck, PinName csn, PinName reset, PinName drdy, PinName start);
00174     
00175 
00176 // High Level methods
00177 
00178  /** 
00179   * @brief High level Init, most settings remain at Power-On reset value
00180   */
00181     void initialize(void (*dataready)(void));
00182 
00183  /** 
00184   * @brief Start capturing data
00185   */
00186     void startCapture();
00187 
00188  /** 
00189   * @brief Stop capturing data
00190   */
00191     void stopCapture();
00192 
00193  /** 
00194   * @brief Read data from the ADS1298
00195   */
00196     void readData(uint8_t *buf);
00197 
00198  /** 
00199   * @brief Update the lead off status
00200   */
00201     int updateLeadOff(uint8_t *buf);
00202 
00203   private:
00204 
00205     SPI spi_; // mosi, miso, sclk
00206     DigitalOut cs_;
00207     DigitalOut reset_;
00208     InterruptIn drdy_;
00209     DigitalOut start_;
00210     uint16_t lOff_;
00211 
00212 // Low Level methods
00213     void sendCommand(uint8_t cmd);
00214     void writeRegister(uint8_t reg, uint8_t val);
00215     uint8_t readRegister(uint8_t reg);
00216 
00217 };
00218 
00219 
00220 
00221 #endif