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Fork of mbed-src by mbed official

targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG_STK3400/efm32hg_dmactrl.h@636:a11c0372f0ba, 2015-09-30 (annotated)

Committer:
mbed_official
Date:
Wed Sep 30 17:00:09 2015 +0100
Revision:
636:a11c0372f0ba
Parent:
526:c320967f86b9 
Synchronized with git revision d29c98dae61be0946ddf3a3c641c7726056f9452



Full URL: https://github.com/mbedmicro/mbed/commit/d29c98dae61be0946ddf3a3c641c7726056f9452/



Added support for SAMW25

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 526:c320967f86b9 1 /**************************************************************************//**
mbed_official 526:c320967f86b9 2 * @file efm32hg_dmactrl.h
mbed_official 526:c320967f86b9 3 * @brief EFM32HG_DMACTRL register and bit field definitions
mbed_official 526:c320967f86b9 4 * @version 3.20.12
mbed_official 526:c320967f86b9 5 ******************************************************************************
mbed_official 526:c320967f86b9 6 * @section License
mbed_official 526:c320967f86b9 7 * <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
mbed_official 526:c320967f86b9 8 ******************************************************************************
mbed_official 526:c320967f86b9 9 *
mbed_official 526:c320967f86b9 10 * Permission is granted to anyone to use this software for any purpose,
mbed_official 526:c320967f86b9 11 * including commercial applications, and to alter it and redistribute it
mbed_official 526:c320967f86b9 12 * freely, subject to the following restrictions:
mbed_official 526:c320967f86b9 13 *
mbed_official 526:c320967f86b9 14 * 1. The origin of this software must not be misrepresented; you must not
mbed_official 526:c320967f86b9 15 * claim that you wrote the original software.@n
mbed_official 526:c320967f86b9 16 * 2. Altered source versions must be plainly marked as such, and must not be
mbed_official 526:c320967f86b9 17 * misrepresented as being the original software.@n
mbed_official 526:c320967f86b9 18 * 3. This notice may not be removed or altered from any source distribution.
mbed_official 526:c320967f86b9 19 *
mbed_official 526:c320967f86b9 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
mbed_official 526:c320967f86b9 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
mbed_official 526:c320967f86b9 22 * providing the Software "AS IS", with no express or implied warranties of any
mbed_official 526:c320967f86b9 23 * kind, including, but not limited to, any implied warranties of
mbed_official 526:c320967f86b9 24 * merchantability or fitness for any particular purpose or warranties against
mbed_official 526:c320967f86b9 25 * infringement of any proprietary rights of a third party.
mbed_official 526:c320967f86b9 26 *
mbed_official 526:c320967f86b9 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
mbed_official 526:c320967f86b9 28 * incidental, or special damages, or any other relief, or for any claim by
mbed_official 526:c320967f86b9 29 * any third party, arising from your use of this Software.
mbed_official 526:c320967f86b9 30 *
mbed_official 526:c320967f86b9 31 *****************************************************************************/
mbed_official 526:c320967f86b9 32
mbed_official 526:c320967f86b9 33 /**************************************************************************//**
mbed_official 526:c320967f86b9 34 * @defgroup EFM32HG_DMACTRL_BitFields
mbed_official 526:c320967f86b9 35 * @{
mbed_official 526:c320967f86b9 36 *****************************************************************************/
mbed_official 526:c320967f86b9 37 #define _DMA_CTRL_DST_INC_MASK 0xC0000000UL /**< Data increment for destination, bit mask */
mbed_official 526:c320967f86b9 38 #define _DMA_CTRL_DST_INC_SHIFT 30 /**< Data increment for destination, shift value */
mbed_official 526:c320967f86b9 39 #define _DMA_CTRL_DST_INC_BYTE 0x00 /**< Byte/8-bit increment */
mbed_official 526:c320967f86b9 40 #define _DMA_CTRL_DST_INC_HALFWORD 0x01 /**< Half word/16-bit increment */
mbed_official 526:c320967f86b9 41 #define _DMA_CTRL_DST_INC_WORD 0x02 /**< Word/32-bit increment */
mbed_official 526:c320967f86b9 42 #define _DMA_CTRL_DST_INC_NONE 0x03 /**< No increment */
mbed_official 526:c320967f86b9 43 #define DMA_CTRL_DST_INC_BYTE 0x00000000UL /**< Byte/8-bit increment */
mbed_official 526:c320967f86b9 44 #define DMA_CTRL_DST_INC_HALFWORD 0x40000000UL /**< Half word/16-bit increment */
mbed_official 526:c320967f86b9 45 #define DMA_CTRL_DST_INC_WORD 0x80000000UL /**< Word/32-bit increment */
mbed_official 526:c320967f86b9 46 #define DMA_CTRL_DST_INC_NONE 0xC0000000UL /**< No increment */
mbed_official 526:c320967f86b9 47 #define _DMA_CTRL_DST_SIZE_MASK 0x30000000UL /**< Data size for destination - MUST be the same as source, bit mask */
mbed_official 526:c320967f86b9 48 #define _DMA_CTRL_DST_SIZE_SHIFT 28 /**< Data size for destination - MUST be the same as source, shift value */
mbed_official 526:c320967f86b9 49 #define _DMA_CTRL_DST_SIZE_BYTE 0x00 /**< Byte/8-bit data size */
mbed_official 526:c320967f86b9 50 #define _DMA_CTRL_DST_SIZE_HALFWORD 0x01 /**< Half word/16-bit data size */
mbed_official 526:c320967f86b9 51 #define _DMA_CTRL_DST_SIZE_WORD 0x02 /**< Word/32-bit data size */
mbed_official 526:c320967f86b9 52 #define _DMA_CTRL_DST_SIZE_RSVD 0x03 /**< Reserved */
mbed_official 526:c320967f86b9 53 #define DMA_CTRL_DST_SIZE_BYTE 0x00000000UL /**< Byte/8-bit data size */
mbed_official 526:c320967f86b9 54 #define DMA_CTRL_DST_SIZE_HALFWORD 0x10000000UL /**< Half word/16-bit data size */
mbed_official 526:c320967f86b9 55 #define DMA_CTRL_DST_SIZE_WORD 0x20000000UL /**< Word/32-bit data size */
mbed_official 526:c320967f86b9 56 #define DMA_CTRL_DST_SIZE_RSVD 0x30000000UL /**< Reserved - do not use */
mbed_official 526:c320967f86b9 57 #define _DMA_CTRL_SRC_INC_MASK 0x0C000000UL /**< Data increment for source, bit mask */
mbed_official 526:c320967f86b9 58 #define _DMA_CTRL_SRC_INC_SHIFT 26 /**< Data increment for source, shift value */
mbed_official 526:c320967f86b9 59 #define _DMA_CTRL_SRC_INC_BYTE 0x00 /**< Byte/8-bit increment */
mbed_official 526:c320967f86b9 60 #define _DMA_CTRL_SRC_INC_HALFWORD 0x01 /**< Half word/16-bit increment */
mbed_official 526:c320967f86b9 61 #define _DMA_CTRL_SRC_INC_WORD 0x02 /**< Word/32-bit increment */
mbed_official 526:c320967f86b9 62 #define _DMA_CTRL_SRC_INC_NONE 0x03 /**< No increment */
mbed_official 526:c320967f86b9 63 #define DMA_CTRL_SRC_INC_BYTE 0x00000000UL /**< Byte/8-bit increment */
mbed_official 526:c320967f86b9 64 #define DMA_CTRL_SRC_INC_HALFWORD 0x04000000UL /**< Half word/16-bit increment */
mbed_official 526:c320967f86b9 65 #define DMA_CTRL_SRC_INC_WORD 0x08000000UL /**< Word/32-bit increment */
mbed_official 526:c320967f86b9 66 #define DMA_CTRL_SRC_INC_NONE 0x0C000000UL /**< No increment */
mbed_official 526:c320967f86b9 67 #define _DMA_CTRL_SRC_SIZE_MASK 0x03000000UL /**< Data size for source - MUST be the same as destination, bit mask */
mbed_official 526:c320967f86b9 68 #define _DMA_CTRL_SRC_SIZE_SHIFT 24 /**< Data size for source - MUST be the same as destination, shift value */
mbed_official 526:c320967f86b9 69 #define _DMA_CTRL_SRC_SIZE_BYTE 0x00 /**< Byte/8-bit data size */
mbed_official 526:c320967f86b9 70 #define _DMA_CTRL_SRC_SIZE_HALFWORD 0x01 /**< Half word/16-bit data size */
mbed_official 526:c320967f86b9 71 #define _DMA_CTRL_SRC_SIZE_WORD 0x02 /**< Word/32-bit data size */
mbed_official 526:c320967f86b9 72 #define _DMA_CTRL_SRC_SIZE_RSVD 0x03 /**< Reserved */
mbed_official 526:c320967f86b9 73 #define DMA_CTRL_SRC_SIZE_BYTE 0x00000000UL /**< Byte/8-bit data size */
mbed_official 526:c320967f86b9 74 #define DMA_CTRL_SRC_SIZE_HALFWORD 0x01000000UL /**< Half word/16-bit data size */
mbed_official 526:c320967f86b9 75 #define DMA_CTRL_SRC_SIZE_WORD 0x02000000UL /**< Word/32-bit data size */
mbed_official 526:c320967f86b9 76 #define DMA_CTRL_SRC_SIZE_RSVD 0x03000000UL /**< Reserved - do not use */
mbed_official 526:c320967f86b9 77 #define _DMA_CTRL_DST_PROT_CTRL_MASK 0x00E00000UL /**< Protection flag for destination, bit mask */
mbed_official 526:c320967f86b9 78 #define _DMA_CTRL_DST_PROT_CTRL_SHIFT 21 /**< Protection flag for destination, shift value */
mbed_official 526:c320967f86b9 79 #define DMA_CTRL_DST_PROT_PRIVILEGED 0x00200000UL /**< Privileged mode for destination */
mbed_official 526:c320967f86b9 80 #define DMA_CTRL_DST_PROT_NON_PRIVILEGED 0x00000000UL /**< Non-privileged mode for estination */
mbed_official 526:c320967f86b9 81 #define _DMA_CTRL_SRC_PROT_CTRL_MASK 0x001C0000UL /**< Protection flag for source, bit mask */
mbed_official 526:c320967f86b9 82 #define _DMA_CTRL_SRC_PROT_CTRL_SHIFT 18 /**< Protection flag for source, shift value */
mbed_official 526:c320967f86b9 83 #define DMA_CTRL_SRC_PROT_PRIVILEGED 0x00040000UL /**< Privileged mode for destination */
mbed_official 526:c320967f86b9 84 #define DMA_CTRL_SRC_PROT_NON_PRIVILEGED 0x00000000UL /**< Non-privileged mode for estination */
mbed_official 526:c320967f86b9 85 #define _DMA_CTRL_PROT_NON_PRIVILEGED 0x00 /**< Protection bits to indicate non-privileged access */
mbed_official 526:c320967f86b9 86 #define _DMA_CTRL_PROT_PRIVILEGED 0x01 /**< Protection bits to indicate privileged access */
mbed_official 526:c320967f86b9 87 #define _DMA_CTRL_R_POWER_MASK 0x0003C000UL /**< DMA arbitration mask */
mbed_official 526:c320967f86b9 88 #define _DMA_CTRL_R_POWER_SHIFT 14 /**< Number of DMA cycles before controller does new arbitration in 2^R */
mbed_official 526:c320967f86b9 89 #define _DMA_CTRL_R_POWER_1 0x00 /**< Arbitrate after each transfer */
mbed_official 526:c320967f86b9 90 #define _DMA_CTRL_R_POWER_2 0x01 /**< Arbitrate after every 2 transfers */
mbed_official 526:c320967f86b9 91 #define _DMA_CTRL_R_POWER_4 0x02 /**< Arbitrate after every 4 transfers */
mbed_official 526:c320967f86b9 92 #define _DMA_CTRL_R_POWER_8 0x03 /**< Arbitrate after every 8 transfers */
mbed_official 526:c320967f86b9 93 #define _DMA_CTRL_R_POWER_16 0x04 /**< Arbitrate after every 16 transfers */
mbed_official 526:c320967f86b9 94 #define _DMA_CTRL_R_POWER_32 0x05 /**< Arbitrate after every 32 transfers */
mbed_official 526:c320967f86b9 95 #define _DMA_CTRL_R_POWER_64 0x06 /**< Arbitrate after every 64 transfers */
mbed_official 526:c320967f86b9 96 #define _DMA_CTRL_R_POWER_128 0x07 /**< Arbitrate after every 128 transfers */
mbed_official 526:c320967f86b9 97 #define _DMA_CTRL_R_POWER_256 0x08 /**< Arbitrate after every 256 transfers */
mbed_official 526:c320967f86b9 98 #define _DMA_CTRL_R_POWER_512 0x09 /**< Arbitrate after every 512 transfers */
mbed_official 526:c320967f86b9 99 #define _DMA_CTRL_R_POWER_1024 0x0a /**< Arbitrate after every 1024 transfers */
mbed_official 526:c320967f86b9 100 #define DMA_CTRL_R_POWER_1 0x00000000UL /**< Arbitrate after each transfer */
mbed_official 526:c320967f86b9 101 #define DMA_CTRL_R_POWER_2 0x00004000UL /**< Arbitrate after every 2 transfers */
mbed_official 526:c320967f86b9 102 #define DMA_CTRL_R_POWER_4 0x00008000UL /**< Arbitrate after every 4 transfers */
mbed_official 526:c320967f86b9 103 #define DMA_CTRL_R_POWER_8 0x0000c000UL /**< Arbitrate after every 8 transfers */
mbed_official 526:c320967f86b9 104 #define DMA_CTRL_R_POWER_16 0x00010000UL /**< Arbitrate after every 16 transfers */
mbed_official 526:c320967f86b9 105 #define DMA_CTRL_R_POWER_32 0x00014000UL /**< Arbitrate after every 32 transfers */
mbed_official 526:c320967f86b9 106 #define DMA_CTRL_R_POWER_64 0x00018000UL /**< Arbitrate after every 64 transfers */
mbed_official 526:c320967f86b9 107 #define DMA_CTRL_R_POWER_128 0x0001c000UL /**< Arbitrate after every 128 transfers */
mbed_official 526:c320967f86b9 108 #define DMA_CTRL_R_POWER_256 0x00020000UL /**< Arbitrate after every 256 transfers */
mbed_official 526:c320967f86b9 109 #define DMA_CTRL_R_POWER_512 0x00024000UL /**< Arbitrate after every 512 transfers */
mbed_official 526:c320967f86b9 110 #define DMA_CTRL_R_POWER_1024 0x00028000UL /**< Arbitrate after every 1024 transfers */
mbed_official 526:c320967f86b9 111 #define _DMA_CTRL_N_MINUS_1_MASK 0x00003FF0UL /**< Number of DMA transfers minus 1, bit mask. See PL230 documentation */
mbed_official 526:c320967f86b9 112 #define _DMA_CTRL_N_MINUS_1_SHIFT 4 /**< Number of DMA transfers minus 1, shift mask. See PL230 documentation */
mbed_official 526:c320967f86b9 113 #define _DMA_CTRL_NEXT_USEBURST_MASK 0x00000008UL /**< DMA useburst_set[C] is 1 when using scatter-gather DMA and using alternate data */
mbed_official 526:c320967f86b9 114 #define _DMA_CTRL_NEXT_USEBURST_SHIFT 3 /**< DMA useburst shift */
mbed_official 526:c320967f86b9 115 #define _DMA_CTRL_CYCLE_CTRL_MASK 0x00000007UL /**< DMA Cycle control bit mask - basic/auto/ping-poing/scath-gath */
mbed_official 526:c320967f86b9 116 #define _DMA_CTRL_CYCLE_CTRL_SHIFT 0 /**< DMA Cycle control bit shift */
mbed_official 526:c320967f86b9 117 #define _DMA_CTRL_CYCLE_CTRL_INVALID 0x00 /**< Invalid cycle type */
mbed_official 526:c320967f86b9 118 #define _DMA_CTRL_CYCLE_CTRL_BASIC 0x01 /**< Basic cycle type */
mbed_official 526:c320967f86b9 119 #define _DMA_CTRL_CYCLE_CTRL_AUTO 0x02 /**< Auto cycle type */
mbed_official 526:c320967f86b9 120 #define _DMA_CTRL_CYCLE_CTRL_PINGPONG 0x03 /**< PingPong cycle type */
mbed_official 526:c320967f86b9 121 #define _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER 0x04 /**< Memory scatter gather cycle type */
mbed_official 526:c320967f86b9 122 #define _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER_ALT 0x05 /**< Memory scatter gather using alternate structure */
mbed_official 526:c320967f86b9 123 #define _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER 0x06 /**< Peripheral scatter gather cycle type */
mbed_official 526:c320967f86b9 124 #define _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER_ALT 0x07 /**< Peripheral scatter gather cycle type using alternate structure */
mbed_official 526:c320967f86b9 125 #define DMA_CTRL_CYCLE_CTRL_INVALID 0x00000000UL /**< Invalid cycle type */
mbed_official 526:c320967f86b9 126 #define DMA_CTRL_CYCLE_CTRL_BASIC 0x00000001UL /**< Basic cycle type */
mbed_official 526:c320967f86b9 127 #define DMA_CTRL_CYCLE_CTRL_AUTO 0x00000002UL /**< Auto cycle type */
mbed_official 526:c320967f86b9 128 #define DMA_CTRL_CYCLE_CTRL_PINGPONG 0x00000003UL /**< PingPong cycle type */
mbed_official 526:c320967f86b9 129 #define DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER 0x000000004UL /**< Memory scatter gather cycle type */
mbed_official 526:c320967f86b9 130 #define DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER_ALT 0x000000005UL /**< Memory scatter gather using alternate structure */
mbed_official 526:c320967f86b9 131 #define DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER 0x000000006UL /**< Peripheral scatter gather cycle type */
mbed_official 526:c320967f86b9 132 #define DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER_ALT 0x000000007UL /**< Peripheral scatter gather cycle type using alternate structure */
mbed_official 526:c320967f86b9 133
mbed_official 526:c320967f86b9 134 /** @} End of group EFM32HG_DMA */
mbed_official 526:c320967f86b9 135
mbed_official 526:c320967f86b9 136