Diff: targets/hal/TARGET_STM/TARGET_DISCO_F303VC/gpio_api.c

Revision:

403:91a4bea587f4

Parent:

285:31249416b6f9

--- a/targets/hal/TARGET_STM/TARGET_DISCO_F303VC/gpio_api.c	Fri Nov 14 09:00:07 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_DISCO_F303VC/gpio_api.c	Fri Nov 14 09:15:08 2014 +0000
@@ -34,17 +34,21 @@
 
 extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
 
-uint32_t gpio_set(PinName pin) {
+uint32_t gpio_set(PinName pin)
+{
     MBED_ASSERT(pin != (PinName)NC);
 
-    pin_function(pin, STM_PIN_DATA(GPIO_Mode_IN, 0, GPIO_PuPd_NOPULL, 0xFF));
+    pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
+
     return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
 }
 
-void gpio_init(gpio_t *obj, PinName pin) {
+void gpio_init(gpio_t *obj, PinName pin)
+{
     obj->pin = pin;
-    if (pin == (PinName)NC)
+    if (pin == (PinName)NC) {
         return;
+    }
 
     uint32_t port_index = STM_PORT(pin);
 
@@ -55,19 +59,21 @@
     // Fill GPIO object structure for future use
     obj->mask    = gpio_set(pin);
     obj->reg_in  = &gpio->IDR;
-    obj->reg_set = &gpio->BSRR;
-    obj->reg_clr = &gpio->BRR;
+    obj->reg_set = &gpio->BSRRL;
+    obj->reg_clr = &gpio->BSRRH;
 }
 
-void gpio_mode(gpio_t *obj, PinMode mode) {
+void gpio_mode(gpio_t *obj, PinMode mode)
+{
     pin_mode(obj->pin, mode);
 }
 
-void gpio_dir(gpio_t *obj, PinDirection direction) {
+void gpio_dir(gpio_t *obj, PinDirection direction)
+{
     MBED_ASSERT(obj->pin != (PinName)NC);
     if (direction == PIN_OUTPUT) {
-        pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_OUT, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0xFF));
+        pin_function(obj->pin, STM_PIN_DATA(STM_MODE_OUTPUT_PP, GPIO_NOPULL, 0));
     } else { // PIN_INPUT
-        pin_function(obj->pin, STM_PIN_DATA(GPIO_Mode_IN, 0, GPIO_PuPd_NOPULL, 0xFF));
+        pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
     }
 }