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targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG_STK3200/efm32zg_emu.h@636:a11c0372f0ba, 2015-09-30 (annotated)

Committer:
mbed_official
Date:
Wed Sep 30 17:00:09 2015 +0100
Revision:
636:a11c0372f0ba
Parent:
526:c320967f86b9 
Synchronized with git revision d29c98dae61be0946ddf3a3c641c7726056f9452



Full URL: https://github.com/mbedmicro/mbed/commit/d29c98dae61be0946ddf3a3c641c7726056f9452/



Added support for SAMW25

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 526:c320967f86b9 1 /**************************************************************************//**
mbed_official 526:c320967f86b9 2 * @file efm32zg_emu.h
mbed_official 526:c320967f86b9 3 * @brief EFM32ZG_EMU register and bit field definitions
mbed_official 526:c320967f86b9 4 * @version 3.20.6
mbed_official 526:c320967f86b9 5 ******************************************************************************
mbed_official 526:c320967f86b9 6 * @section License
mbed_official 526:c320967f86b9 7 * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
mbed_official 526:c320967f86b9 8 ******************************************************************************
mbed_official 526:c320967f86b9 9 *
mbed_official 526:c320967f86b9 10 * Permission is granted to anyone to use this software for any purpose,
mbed_official 526:c320967f86b9 11 * including commercial applications, and to alter it and redistribute it
mbed_official 526:c320967f86b9 12 * freely, subject to the following restrictions:
mbed_official 526:c320967f86b9 13 *
mbed_official 526:c320967f86b9 14 * 1. The origin of this software must not be misrepresented; you must not
mbed_official 526:c320967f86b9 15 * claim that you wrote the original software.@n
mbed_official 526:c320967f86b9 16 * 2. Altered source versions must be plainly marked as such, and must not be
mbed_official 526:c320967f86b9 17 * misrepresented as being the original software.@n
mbed_official 526:c320967f86b9 18 * 3. This notice may not be removed or altered from any source distribution.
mbed_official 526:c320967f86b9 19 *
mbed_official 526:c320967f86b9 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
mbed_official 526:c320967f86b9 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
mbed_official 526:c320967f86b9 22 * providing the Software "AS IS", with no express or implied warranties of any
mbed_official 526:c320967f86b9 23 * kind, including, but not limited to, any implied warranties of
mbed_official 526:c320967f86b9 24 * merchantability or fitness for any particular purpose or warranties against
mbed_official 526:c320967f86b9 25 * infringement of any proprietary rights of a third party.
mbed_official 526:c320967f86b9 26 *
mbed_official 526:c320967f86b9 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
mbed_official 526:c320967f86b9 28 * incidental, or special damages, or any other relief, or for any claim by
mbed_official 526:c320967f86b9 29 * any third party, arising from your use of this Software.
mbed_official 526:c320967f86b9 30 *
mbed_official 526:c320967f86b9 31 *****************************************************************************/
mbed_official 526:c320967f86b9 32 /**************************************************************************//**
mbed_official 526:c320967f86b9 33 * @defgroup EFM32ZG_EMU
mbed_official 526:c320967f86b9 34 * @{
mbed_official 526:c320967f86b9 35 * @brief EFM32ZG_EMU Register Declaration
mbed_official 526:c320967f86b9 36 *****************************************************************************/
mbed_official 526:c320967f86b9 37 typedef struct
mbed_official 526:c320967f86b9 38 {
mbed_official 526:c320967f86b9 39 __IO uint32_t CTRL; /**< Control Register */
mbed_official 526:c320967f86b9 40
mbed_official 526:c320967f86b9 41 uint32_t RESERVED0[1]; /**< Reserved for future use **/
mbed_official 526:c320967f86b9 42 __IO uint32_t LOCK; /**< Configuration Lock Register */
mbed_official 526:c320967f86b9 43
mbed_official 526:c320967f86b9 44 uint32_t RESERVED1[6]; /**< Reserved for future use **/
mbed_official 526:c320967f86b9 45 __IO uint32_t AUXCTRL; /**< Auxiliary Control Register */
mbed_official 526:c320967f86b9 46 } EMU_TypeDef; /** @} */
mbed_official 526:c320967f86b9 47
mbed_official 526:c320967f86b9 48 /**************************************************************************//**
mbed_official 526:c320967f86b9 49 * @defgroup EFM32ZG_EMU_BitFields
mbed_official 526:c320967f86b9 50 * @{
mbed_official 526:c320967f86b9 51 *****************************************************************************/
mbed_official 526:c320967f86b9 52
mbed_official 526:c320967f86b9 53 /* Bit fields for EMU CTRL */
mbed_official 526:c320967f86b9 54 #define _EMU_CTRL_RESETVALUE 0x00000000UL /**< Default value for EMU_CTRL */
mbed_official 526:c320967f86b9 55 #define _EMU_CTRL_MASK 0x0000000FUL /**< Mask for EMU_CTRL */
mbed_official 526:c320967f86b9 56 #define EMU_CTRL_EMVREG (0x1UL << 0) /**< Energy Mode Voltage Regulator Control */
mbed_official 526:c320967f86b9 57 #define _EMU_CTRL_EMVREG_SHIFT 0 /**< Shift value for EMU_EMVREG */
mbed_official 526:c320967f86b9 58 #define _EMU_CTRL_EMVREG_MASK 0x1UL /**< Bit mask for EMU_EMVREG */
mbed_official 526:c320967f86b9 59 #define _EMU_CTRL_EMVREG_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_CTRL */
mbed_official 526:c320967f86b9 60 #define _EMU_CTRL_EMVREG_REDUCED 0x00000000UL /**< Mode REDUCED for EMU_CTRL */
mbed_official 526:c320967f86b9 61 #define _EMU_CTRL_EMVREG_FULL 0x00000001UL /**< Mode FULL for EMU_CTRL */
mbed_official 526:c320967f86b9 62 #define EMU_CTRL_EMVREG_DEFAULT (_EMU_CTRL_EMVREG_DEFAULT << 0) /**< Shifted mode DEFAULT for EMU_CTRL */
mbed_official 526:c320967f86b9 63 #define EMU_CTRL_EMVREG_REDUCED (_EMU_CTRL_EMVREG_REDUCED << 0) /**< Shifted mode REDUCED for EMU_CTRL */
mbed_official 526:c320967f86b9 64 #define EMU_CTRL_EMVREG_FULL (_EMU_CTRL_EMVREG_FULL << 0) /**< Shifted mode FULL for EMU_CTRL */
mbed_official 526:c320967f86b9 65 #define EMU_CTRL_EM2BLOCK (0x1UL << 1) /**< Energy Mode 2 Block */
mbed_official 526:c320967f86b9 66 #define _EMU_CTRL_EM2BLOCK_SHIFT 1 /**< Shift value for EMU_EM2BLOCK */
mbed_official 526:c320967f86b9 67 #define _EMU_CTRL_EM2BLOCK_MASK 0x2UL /**< Bit mask for EMU_EM2BLOCK */
mbed_official 526:c320967f86b9 68 #define _EMU_CTRL_EM2BLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_CTRL */
mbed_official 526:c320967f86b9 69 #define EMU_CTRL_EM2BLOCK_DEFAULT (_EMU_CTRL_EM2BLOCK_DEFAULT << 1) /**< Shifted mode DEFAULT for EMU_CTRL */
mbed_official 526:c320967f86b9 70 #define _EMU_CTRL_EM4CTRL_SHIFT 2 /**< Shift value for EMU_EM4CTRL */
mbed_official 526:c320967f86b9 71 #define _EMU_CTRL_EM4CTRL_MASK 0xCUL /**< Bit mask for EMU_EM4CTRL */
mbed_official 526:c320967f86b9 72 #define _EMU_CTRL_EM4CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_CTRL */
mbed_official 526:c320967f86b9 73 #define EMU_CTRL_EM4CTRL_DEFAULT (_EMU_CTRL_EM4CTRL_DEFAULT << 2) /**< Shifted mode DEFAULT for EMU_CTRL */
mbed_official 526:c320967f86b9 74
mbed_official 526:c320967f86b9 75 /* Bit fields for EMU LOCK */
mbed_official 526:c320967f86b9 76 #define _EMU_LOCK_RESETVALUE 0x00000000UL /**< Default value for EMU_LOCK */
mbed_official 526:c320967f86b9 77 #define _EMU_LOCK_MASK 0x0000FFFFUL /**< Mask for EMU_LOCK */
mbed_official 526:c320967f86b9 78 #define _EMU_LOCK_LOCKKEY_SHIFT 0 /**< Shift value for EMU_LOCKKEY */
mbed_official 526:c320967f86b9 79 #define _EMU_LOCK_LOCKKEY_MASK 0xFFFFUL /**< Bit mask for EMU_LOCKKEY */
mbed_official 526:c320967f86b9 80 #define _EMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_LOCK */
mbed_official 526:c320967f86b9 81 #define _EMU_LOCK_LOCKKEY_LOCK 0x00000000UL /**< Mode LOCK for EMU_LOCK */
mbed_official 526:c320967f86b9 82 #define _EMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL /**< Mode UNLOCKED for EMU_LOCK */
mbed_official 526:c320967f86b9 83 #define _EMU_LOCK_LOCKKEY_LOCKED 0x00000001UL /**< Mode LOCKED for EMU_LOCK */
mbed_official 526:c320967f86b9 84 #define _EMU_LOCK_LOCKKEY_UNLOCK 0x0000ADE8UL /**< Mode UNLOCK for EMU_LOCK */
mbed_official 526:c320967f86b9 85 #define EMU_LOCK_LOCKKEY_DEFAULT (_EMU_LOCK_LOCKKEY_DEFAULT << 0) /**< Shifted mode DEFAULT for EMU_LOCK */
mbed_official 526:c320967f86b9 86 #define EMU_LOCK_LOCKKEY_LOCK (_EMU_LOCK_LOCKKEY_LOCK << 0) /**< Shifted mode LOCK for EMU_LOCK */
mbed_official 526:c320967f86b9 87 #define EMU_LOCK_LOCKKEY_UNLOCKED (_EMU_LOCK_LOCKKEY_UNLOCKED << 0) /**< Shifted mode UNLOCKED for EMU_LOCK */
mbed_official 526:c320967f86b9 88 #define EMU_LOCK_LOCKKEY_LOCKED (_EMU_LOCK_LOCKKEY_LOCKED << 0) /**< Shifted mode LOCKED for EMU_LOCK */
mbed_official 526:c320967f86b9 89 #define EMU_LOCK_LOCKKEY_UNLOCK (_EMU_LOCK_LOCKKEY_UNLOCK << 0) /**< Shifted mode UNLOCK for EMU_LOCK */
mbed_official 526:c320967f86b9 90
mbed_official 526:c320967f86b9 91 /* Bit fields for EMU AUXCTRL */
mbed_official 526:c320967f86b9 92 #define _EMU_AUXCTRL_RESETVALUE 0x00000000UL /**< Default value for EMU_AUXCTRL */
mbed_official 526:c320967f86b9 93 #define _EMU_AUXCTRL_MASK 0x00000001UL /**< Mask for EMU_AUXCTRL */
mbed_official 526:c320967f86b9 94 #define EMU_AUXCTRL_HRCCLR (0x1UL << 0) /**< Hard Reset Cause Clear */
mbed_official 526:c320967f86b9 95 #define _EMU_AUXCTRL_HRCCLR_SHIFT 0 /**< Shift value for EMU_HRCCLR */
mbed_official 526:c320967f86b9 96 #define _EMU_AUXCTRL_HRCCLR_MASK 0x1UL /**< Bit mask for EMU_HRCCLR */
mbed_official 526:c320967f86b9 97 #define _EMU_AUXCTRL_HRCCLR_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_AUXCTRL */
mbed_official 526:c320967f86b9 98 #define EMU_AUXCTRL_HRCCLR_DEFAULT (_EMU_AUXCTRL_HRCCLR_DEFAULT << 0) /**< Shifted mode DEFAULT for EMU_AUXCTRL */
mbed_official 526:c320967f86b9 99
mbed_official 526:c320967f86b9 100 /** @} End of group EFM32ZG_EMU */
mbed_official 526:c320967f86b9 101
mbed_official 526:c320967f86b9 102