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targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_i2s.c@636:a11c0372f0ba, 2015-09-30 (annotated)

Committer:: mbed_official
Date:: Wed Sep 30 17:00:09 2015 +0100
Revision:: 636:a11c0372f0ba
Parent:: 631:825f75ca301e

Synchronized with git revision d29c98dae61be0946ddf3a3c641c7726056f9452

Full URL: https://github.com/mbedmicro/mbed/commit/d29c98dae61be0946ddf3a3c641c7726056f9452/

Added support for SAMW25

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	340:28d1f895c6fe	1	/**
mbed_official	340:28d1f895c6fe	2	******************************************************************************
mbed_official	340:28d1f895c6fe	3	* @file stm32f0xx_hal_i2s.c
mbed_official	340:28d1f895c6fe	4	* @author MCD Application Team
mbed_official	631:825f75ca301e	5	* @version V1.3.0
mbed_official	631:825f75ca301e	6	* @date 26-June-2015
mbed_official	340:28d1f895c6fe	7	* @brief I2S HAL module driver.
mbed_official	340:28d1f895c6fe	8	* This file provides firmware functions to manage the following
mbed_official	340:28d1f895c6fe	9	* functionalities of the Integrated Interchip Sound (I2S) peripheral:
mbed_official	340:28d1f895c6fe	10	* + Initialization and de-initialization functions
mbed_official	340:28d1f895c6fe	11	* + IO operation functions
mbed_official	340:28d1f895c6fe	12	* + Peripheral State and Errors functions
mbed_official	340:28d1f895c6fe	13	@verbatim
mbed_official	340:28d1f895c6fe	14	===============================================================================
mbed_official	340:28d1f895c6fe	15	##### How to use this driver #####
mbed_official	340:28d1f895c6fe	16	===============================================================================
mbed_official	340:28d1f895c6fe	17	[..]
mbed_official	340:28d1f895c6fe	18	The I2S HAL driver can be used as follow:
mbed_official	340:28d1f895c6fe	19
mbed_official	340:28d1f895c6fe	20	(#) Declare a I2S_HandleTypeDef handle structure.
mbed_official	340:28d1f895c6fe	21	(#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
mbed_official	340:28d1f895c6fe	22	(##) Enable the SPIx interface clock.
mbed_official	340:28d1f895c6fe	23	(##) I2S pins configuration:
mbed_official	340:28d1f895c6fe	24	(+++) Enable the clock for the I2S GPIOs.
mbed_official	340:28d1f895c6fe	25	(+++) Configure these I2S pins as alternate function pull-up.
mbed_official	340:28d1f895c6fe	26	(##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
mbed_official	340:28d1f895c6fe	27	and HAL_I2S_Receive_IT() APIs).
mbed_official	340:28d1f895c6fe	28	(+++) Configure the I2Sx interrupt priority.
mbed_official	340:28d1f895c6fe	29	(+++) Enable the NVIC I2S IRQ handle.
mbed_official	340:28d1f895c6fe	30	(##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
mbed_official	340:28d1f895c6fe	31	and HAL_I2S_Receive_DMA() APIs:
mbed_official	340:28d1f895c6fe	32	(+++) Declare a DMA handle structure for the Tx/Rx Channel.
mbed_official	340:28d1f895c6fe	33	(+++) Enable the DMAx interface clock.
mbed_official	340:28d1f895c6fe	34	(+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
mbed_official	340:28d1f895c6fe	35	(+++) Configure the DMA Tx/Rx Channel.
mbed_official	340:28d1f895c6fe	36	(+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
mbed_official	340:28d1f895c6fe	37	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
mbed_official	340:28d1f895c6fe	38	DMA Tx/Rx Channel.
mbed_official	340:28d1f895c6fe	39
mbed_official	340:28d1f895c6fe	40	(#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
mbed_official	340:28d1f895c6fe	41	using HAL_I2S_Init() function.
mbed_official	340:28d1f895c6fe	42
mbed_official	340:28d1f895c6fe	43	-@- The specific I2S interrupts (Transmission complete interrupt,
mbed_official	340:28d1f895c6fe	44	RXNE interrupt and Error Interrupts) will be managed using the macros
mbed_official	340:28d1f895c6fe	45	__HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
mbed_official	340:28d1f895c6fe	46	-@- Make sure that either:
mbed_official	340:28d1f895c6fe	47	(+@) External clock source is configured after setting correctly
mbed_official	340:28d1f895c6fe	48	the define constant EXTERNAL_CLOCK_VALUE in the stm32f0xx_hal_conf.h file.
mbed_official	340:28d1f895c6fe	49
mbed_official	340:28d1f895c6fe	50	(#) Three mode of operations are available within this driver :
mbed_official	340:28d1f895c6fe	51
mbed_official	340:28d1f895c6fe	52	* Polling mode IO operation *
mbed_official	340:28d1f895c6fe	53	=================================
mbed_official	340:28d1f895c6fe	54	[..]
mbed_official	340:28d1f895c6fe	55	(+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
mbed_official	340:28d1f895c6fe	56	(+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
mbed_official	340:28d1f895c6fe	57
mbed_official	340:28d1f895c6fe	58	* Interrupt mode IO operation *
mbed_official	340:28d1f895c6fe	59	===================================
mbed_official	340:28d1f895c6fe	60	[..]
mbed_official	340:28d1f895c6fe	61	(+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
mbed_official	340:28d1f895c6fe	62	(+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
mbed_official	340:28d1f895c6fe	63	add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
mbed_official	340:28d1f895c6fe	64	(+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
mbed_official	340:28d1f895c6fe	65	add his own code by customization of function pointer HAL_I2S_TxCpltCallback
mbed_official	340:28d1f895c6fe	66	(+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
mbed_official	340:28d1f895c6fe	67	(+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
mbed_official	340:28d1f895c6fe	68	add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
mbed_official	340:28d1f895c6fe	69	(+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
mbed_official	340:28d1f895c6fe	70	add his own code by customization of function pointer HAL_I2S_RxCpltCallback
mbed_official	340:28d1f895c6fe	71	(+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
mbed_official	340:28d1f895c6fe	72	add his own code by customization of function pointer HAL_I2S_ErrorCallback
mbed_official	340:28d1f895c6fe	73
mbed_official	340:28d1f895c6fe	74	* DMA mode IO operation *
mbed_official	340:28d1f895c6fe	75	==============================
mbed_official	340:28d1f895c6fe	76	[..]
mbed_official	340:28d1f895c6fe	77	(+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
mbed_official	340:28d1f895c6fe	78	(+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
mbed_official	340:28d1f895c6fe	79	add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
mbed_official	340:28d1f895c6fe	80	(+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
mbed_official	340:28d1f895c6fe	81	add his own code by customization of function pointer HAL_I2S_TxCpltCallback
mbed_official	340:28d1f895c6fe	82	(+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
mbed_official	340:28d1f895c6fe	83	(+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
mbed_official	340:28d1f895c6fe	84	add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
mbed_official	340:28d1f895c6fe	85	(+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
mbed_official	340:28d1f895c6fe	86	add his own code by customization of function pointer HAL_I2S_RxCpltCallback
mbed_official	340:28d1f895c6fe	87	(+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
mbed_official	340:28d1f895c6fe	88	add his own code by customization of function pointer HAL_I2S_ErrorCallback
mbed_official	340:28d1f895c6fe	89	(+) Pause the DMA Transfer using HAL_I2S_DMAPause()
mbed_official	340:28d1f895c6fe	90	(+) Resume the DMA Transfer using HAL_I2S_DMAResume()
mbed_official	340:28d1f895c6fe	91	(+) Stop the DMA Transfer using HAL_I2S_DMAStop()
mbed_official	340:28d1f895c6fe	92
mbed_official	340:28d1f895c6fe	93	* I2S HAL driver macros list *
mbed_official	340:28d1f895c6fe	94	=============================================
mbed_official	340:28d1f895c6fe	95	[..]
mbed_official	442:d2c15dda23c1	96	Below the list of most used macros in I2S HAL driver.
mbed_official	340:28d1f895c6fe	97
mbed_official	340:28d1f895c6fe	98	(+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
mbed_official	340:28d1f895c6fe	99	(+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
mbed_official	340:28d1f895c6fe	100	(+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
mbed_official	340:28d1f895c6fe	101	(+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
mbed_official	340:28d1f895c6fe	102	(+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
mbed_official	340:28d1f895c6fe	103
mbed_official	340:28d1f895c6fe	104	[..]
mbed_official	340:28d1f895c6fe	105	(@) You can refer to the I2S HAL driver header file for more useful macros
mbed_official	340:28d1f895c6fe	106
mbed_official	340:28d1f895c6fe	107	@endverbatim
mbed_official	340:28d1f895c6fe	108	******************************************************************************
mbed_official	340:28d1f895c6fe	109	* @attention
mbed_official	340:28d1f895c6fe	110	*
mbed_official	631:825f75ca301e	111	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official	340:28d1f895c6fe	112	*
mbed_official	340:28d1f895c6fe	113	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	340:28d1f895c6fe	114	* are permitted provided that the following conditions are met:
mbed_official	340:28d1f895c6fe	115	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	340:28d1f895c6fe	116	* this list of conditions and the following disclaimer.
mbed_official	340:28d1f895c6fe	117	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	340:28d1f895c6fe	118	* this list of conditions and the following disclaimer in the documentation
mbed_official	340:28d1f895c6fe	119	* and/or other materials provided with the distribution.
mbed_official	340:28d1f895c6fe	120	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	340:28d1f895c6fe	121	* may be used to endorse or promote products derived from this software
mbed_official	340:28d1f895c6fe	122	* without specific prior written permission.
mbed_official	340:28d1f895c6fe	123	*
mbed_official	340:28d1f895c6fe	124	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	340:28d1f895c6fe	125	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	340:28d1f895c6fe	126	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	340:28d1f895c6fe	127	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	340:28d1f895c6fe	128	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	340:28d1f895c6fe	129	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	340:28d1f895c6fe	130	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	340:28d1f895c6fe	131	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	340:28d1f895c6fe	132	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	340:28d1f895c6fe	133	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	340:28d1f895c6fe	134	*
mbed_official	340:28d1f895c6fe	135	******************************************************************************
mbed_official	340:28d1f895c6fe	136	*/
mbed_official	340:28d1f895c6fe	137
mbed_official	340:28d1f895c6fe	138	/* Includes ------------------------------------------------------------------*/
mbed_official	340:28d1f895c6fe	139	#include "stm32f0xx_hal.h"
mbed_official	340:28d1f895c6fe	140
mbed_official	442:d2c15dda23c1	141	#ifdef HAL_I2S_MODULE_ENABLED
mbed_official	442:d2c15dda23c1	142
mbed_official	442:d2c15dda23c1	143	#if defined(STM32F031x6) \|\| defined(STM32F038xx) \|\| \
mbed_official	442:d2c15dda23c1	144	defined(STM32F051x8) \|\| defined(STM32F058xx) \|\| \
mbed_official	442:d2c15dda23c1	145	defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx) \|\| \
mbed_official	442:d2c15dda23c1	146	defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| \
mbed_official	442:d2c15dda23c1	147	defined(STM32F091xC) \|\| defined(STM32F098xx)
mbed_official	442:d2c15dda23c1	148
mbed_official	340:28d1f895c6fe	149	/** @addtogroup STM32F0xx_HAL_Driver
mbed_official	340:28d1f895c6fe	150	* @{
mbed_official	340:28d1f895c6fe	151	*/
mbed_official	340:28d1f895c6fe	152
mbed_official	631:825f75ca301e	153	/** @defgroup I2S I2S
mbed_official	340:28d1f895c6fe	154	* @brief I2S HAL module driver
mbed_official	340:28d1f895c6fe	155	* @{
mbed_official	340:28d1f895c6fe	156	*/
mbed_official	340:28d1f895c6fe	157
mbed_official	340:28d1f895c6fe	158	/* Private typedef -----------------------------------------------------------*/
mbed_official	340:28d1f895c6fe	159	/* Private define ------------------------------------------------------------*/
mbed_official	340:28d1f895c6fe	160	/* Private macro -------------------------------------------------------------*/
mbed_official	340:28d1f895c6fe	161	/* Private variables ---------------------------------------------------------*/
mbed_official	340:28d1f895c6fe	162	/* Private function prototypes -----------------------------------------------*/
mbed_official	442:d2c15dda23c1	163	/** @defgroup I2S_Private_Functions I2S Private Functions
mbed_official	442:d2c15dda23c1	164	* @{
mbed_official	442:d2c15dda23c1	165	*/
mbed_official	340:28d1f895c6fe	166	static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
mbed_official	340:28d1f895c6fe	167	static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official	340:28d1f895c6fe	168	static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
mbed_official	340:28d1f895c6fe	169	static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official	340:28d1f895c6fe	170	static void I2S_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	340:28d1f895c6fe	171	static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
mbed_official	340:28d1f895c6fe	172	static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
mbed_official	340:28d1f895c6fe	173	static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout);
mbed_official	442:d2c15dda23c1	174	/**
mbed_official	442:d2c15dda23c1	175	* @}
mbed_official	442:d2c15dda23c1	176	*/
mbed_official	340:28d1f895c6fe	177
mbed_official	442:d2c15dda23c1	178	/* Exported functions ---------------------------------------------------------*/
mbed_official	340:28d1f895c6fe	179
mbed_official	340:28d1f895c6fe	180	/** @defgroup I2S_Exported_Functions I2S Exported Functions
mbed_official	340:28d1f895c6fe	181	* @{
mbed_official	340:28d1f895c6fe	182	*/
mbed_official	340:28d1f895c6fe	183
mbed_official	340:28d1f895c6fe	184	/** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official	340:28d1f895c6fe	185	* @brief Initialization and Configuration functions
mbed_official	340:28d1f895c6fe	186	*
mbed_official	340:28d1f895c6fe	187	@verbatim
mbed_official	340:28d1f895c6fe	188	===============================================================================
mbed_official	340:28d1f895c6fe	189	##### Initialization and de-initialization functions #####
mbed_official	340:28d1f895c6fe	190	===============================================================================
mbed_official	340:28d1f895c6fe	191	[..] This subsection provides a set of functions allowing to initialize and
mbed_official	340:28d1f895c6fe	192	de-initialiaze the I2Sx peripheral in simplex mode:
mbed_official	340:28d1f895c6fe	193
mbed_official	340:28d1f895c6fe	194	(+) User must Implement HAL_I2S_MspInit() function in which he configures
mbed_official	340:28d1f895c6fe	195	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
mbed_official	340:28d1f895c6fe	196
mbed_official	340:28d1f895c6fe	197	(+) Call the function HAL_I2S_Init() to configure the selected device with
mbed_official	340:28d1f895c6fe	198	the selected configuration:
mbed_official	340:28d1f895c6fe	199	(++) Mode
mbed_official	340:28d1f895c6fe	200	(++) Standard
mbed_official	340:28d1f895c6fe	201	(++) Data Format
mbed_official	340:28d1f895c6fe	202	(++) MCLK Output
mbed_official	340:28d1f895c6fe	203	(++) Audio frequency
mbed_official	340:28d1f895c6fe	204	(++) Polarity
mbed_official	340:28d1f895c6fe	205
mbed_official	340:28d1f895c6fe	206	(+) Call the function HAL_I2S_DeInit() to restore the default configuration
mbed_official	340:28d1f895c6fe	207	of the selected I2Sx periperal.
mbed_official	340:28d1f895c6fe	208	@endverbatim
mbed_official	340:28d1f895c6fe	209	* @{
mbed_official	340:28d1f895c6fe	210	*/
mbed_official	340:28d1f895c6fe	211
mbed_official	340:28d1f895c6fe	212	/**
mbed_official	340:28d1f895c6fe	213	* @brief Initializes the I2S according to the specified parameters
mbed_official	340:28d1f895c6fe	214	* in the I2S_InitTypeDef and create the associated handle.
mbed_official	340:28d1f895c6fe	215	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	216	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	217	* @retval HAL status
mbed_official	340:28d1f895c6fe	218	*/
mbed_official	340:28d1f895c6fe	219	HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	220	{
mbed_official	340:28d1f895c6fe	221	uint32_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
mbed_official	340:28d1f895c6fe	222	uint32_t tmp = 0, i2sclk = 0;
mbed_official	340:28d1f895c6fe	223
mbed_official	340:28d1f895c6fe	224	/* Check the I2S handle allocation */
mbed_official	442:d2c15dda23c1	225	if(hi2s == NULL)
mbed_official	340:28d1f895c6fe	226	{
mbed_official	340:28d1f895c6fe	227	return HAL_ERROR;
mbed_official	340:28d1f895c6fe	228	}
mbed_official	340:28d1f895c6fe	229
mbed_official	340:28d1f895c6fe	230	/* Check the I2S parameters */
mbed_official	340:28d1f895c6fe	231	assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
mbed_official	340:28d1f895c6fe	232	assert_param(IS_I2S_MODE(hi2s->Init.Mode));
mbed_official	340:28d1f895c6fe	233	assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
mbed_official	340:28d1f895c6fe	234	assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
mbed_official	340:28d1f895c6fe	235	assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
mbed_official	340:28d1f895c6fe	236	assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
mbed_official	340:28d1f895c6fe	237	assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
mbed_official	340:28d1f895c6fe	238
mbed_official	340:28d1f895c6fe	239	if(hi2s->State == HAL_I2S_STATE_RESET)
mbed_official	340:28d1f895c6fe	240	{
mbed_official	631:825f75ca301e	241	/* Allocate lock resource and initialize it */
mbed_official	631:825f75ca301e	242	hi2s->Lock = HAL_UNLOCKED;
mbed_official	631:825f75ca301e	243
mbed_official	340:28d1f895c6fe	244	/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
mbed_official	340:28d1f895c6fe	245	HAL_I2S_MspInit(hi2s);
mbed_official	340:28d1f895c6fe	246	}
mbed_official	340:28d1f895c6fe	247
mbed_official	340:28d1f895c6fe	248	hi2s->State = HAL_I2S_STATE_BUSY;
mbed_official	340:28d1f895c6fe	249
mbed_official	340:28d1f895c6fe	250	/----------------------- SPIx I2SCFGR & I2SPR Configuration ---------------/
mbed_official	340:28d1f895c6fe	251	/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official	340:28d1f895c6fe	252	hi2s->Instance->I2SCFGR &= (uint16_t)(~(SPI_I2SCFGR_CHLEN \| SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CKPOL \| \
mbed_official	340:28d1f895c6fe	253	SPI_I2SCFGR_I2SSTD \| SPI_I2SCFGR_PCMSYNC \| SPI_I2SCFGR_I2SCFG \| \
mbed_official	340:28d1f895c6fe	254	SPI_I2SCFGR_I2SE \| SPI_I2SCFGR_I2SMOD));
mbed_official	340:28d1f895c6fe	255	hi2s->Instance->I2SPR = 0x0002;
mbed_official	340:28d1f895c6fe	256
mbed_official	340:28d1f895c6fe	257	/* Get the I2SCFGR register value */
mbed_official	340:28d1f895c6fe	258	tmpreg = hi2s->Instance->I2SCFGR;
mbed_official	340:28d1f895c6fe	259
mbed_official	340:28d1f895c6fe	260	/* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
mbed_official	340:28d1f895c6fe	261	if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
mbed_official	340:28d1f895c6fe	262	{
mbed_official	340:28d1f895c6fe	263	i2sodd = (uint16_t)0;
mbed_official	340:28d1f895c6fe	264	i2sdiv = (uint16_t)2;
mbed_official	340:28d1f895c6fe	265	}
mbed_official	340:28d1f895c6fe	266	/* If the requested audio frequency is not the default, compute the prescaler */
mbed_official	340:28d1f895c6fe	267	else
mbed_official	340:28d1f895c6fe	268	{
mbed_official	340:28d1f895c6fe	269	/* Check the frame length (For the Prescaler computing) *******************/
mbed_official	340:28d1f895c6fe	270	if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
mbed_official	340:28d1f895c6fe	271	{
mbed_official	340:28d1f895c6fe	272	/* Packet length is 16 bits */
mbed_official	340:28d1f895c6fe	273	packetlength = 1;
mbed_official	340:28d1f895c6fe	274	}
mbed_official	340:28d1f895c6fe	275	else
mbed_official	340:28d1f895c6fe	276	{
mbed_official	340:28d1f895c6fe	277	/* Packet length is 32 bits */
mbed_official	340:28d1f895c6fe	278	packetlength = 2;
mbed_official	340:28d1f895c6fe	279	}
mbed_official	340:28d1f895c6fe	280
mbed_official	340:28d1f895c6fe	281	/* Get I2S source Clock frequency ****************************************/
mbed_official	340:28d1f895c6fe	282	i2sclk = HAL_RCC_GetSysClockFreq();
mbed_official	340:28d1f895c6fe	283
mbed_official	340:28d1f895c6fe	284	/* Compute the Real divider depending on the MCLK output state, with a floating point */
mbed_official	340:28d1f895c6fe	285	if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
mbed_official	340:28d1f895c6fe	286	{
mbed_official	340:28d1f895c6fe	287	/* MCLK output is enabled */
mbed_official	340:28d1f895c6fe	288	tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
mbed_official	340:28d1f895c6fe	289	}
mbed_official	340:28d1f895c6fe	290	else
mbed_official	340:28d1f895c6fe	291	{
mbed_official	340:28d1f895c6fe	292	/* MCLK output is disabled */
mbed_official	340:28d1f895c6fe	293	tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
mbed_official	340:28d1f895c6fe	294	}
mbed_official	340:28d1f895c6fe	295
mbed_official	340:28d1f895c6fe	296	/* Remove the flatting point */
mbed_official	340:28d1f895c6fe	297	tmp = tmp / 10;
mbed_official	340:28d1f895c6fe	298
mbed_official	340:28d1f895c6fe	299	/* Check the parity of the divider */
mbed_official	340:28d1f895c6fe	300	i2sodd = (uint32_t)(tmp & (uint32_t)1);
mbed_official	340:28d1f895c6fe	301
mbed_official	340:28d1f895c6fe	302	/* Compute the i2sdiv prescaler */
mbed_official	340:28d1f895c6fe	303	i2sdiv = (uint32_t)((tmp - i2sodd) / 2);
mbed_official	340:28d1f895c6fe	304
mbed_official	340:28d1f895c6fe	305	/* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
mbed_official	340:28d1f895c6fe	306	i2sodd = (uint32_t) (i2sodd << 8);
mbed_official	340:28d1f895c6fe	307	}
mbed_official	340:28d1f895c6fe	308
mbed_official	340:28d1f895c6fe	309	/* Test if the divider is 1 or 0 or greater than 0xFF */
mbed_official	340:28d1f895c6fe	310	if((i2sdiv < 2) \|\| (i2sdiv > 0xFF))
mbed_official	340:28d1f895c6fe	311	{
mbed_official	340:28d1f895c6fe	312	/* Set the default values */
mbed_official	340:28d1f895c6fe	313	i2sdiv = 2;
mbed_official	340:28d1f895c6fe	314	i2sodd = 0;
mbed_official	340:28d1f895c6fe	315	}
mbed_official	340:28d1f895c6fe	316
mbed_official	340:28d1f895c6fe	317	/* Write to SPIx I2SPR register the computed value */
mbed_official	340:28d1f895c6fe	318	hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv \| (uint32_t)(i2sodd \| (uint32_t)hi2s->Init.MCLKOutput));
mbed_official	340:28d1f895c6fe	319
mbed_official	340:28d1f895c6fe	320	/* Configure the I2S with the I2S_InitStruct values */
mbed_official	340:28d1f895c6fe	321	tmpreg \|= (uint32_t)(SPI_I2SCFGR_I2SMOD \| hi2s->Init.Mode \| hi2s->Init.Standard \| hi2s->Init.DataFormat \| hi2s->Init.CPOL);
mbed_official	340:28d1f895c6fe	322
mbed_official	340:28d1f895c6fe	323	/* Write to SPIx I2SCFGR */
mbed_official	340:28d1f895c6fe	324	hi2s->Instance->I2SCFGR = tmpreg;
mbed_official	340:28d1f895c6fe	325
mbed_official	340:28d1f895c6fe	326	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official	340:28d1f895c6fe	327	hi2s->State= HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	328
mbed_official	340:28d1f895c6fe	329	return HAL_OK;
mbed_official	340:28d1f895c6fe	330	}
mbed_official	340:28d1f895c6fe	331
mbed_official	340:28d1f895c6fe	332	/**
mbed_official	340:28d1f895c6fe	333	* @brief DeInitializes the I2S peripheral
mbed_official	340:28d1f895c6fe	334	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	335	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	336	* @retval HAL status
mbed_official	340:28d1f895c6fe	337	*/
mbed_official	340:28d1f895c6fe	338	HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	339	{
mbed_official	340:28d1f895c6fe	340	/* Check the I2S handle allocation */
mbed_official	442:d2c15dda23c1	341	if(hi2s == NULL)
mbed_official	340:28d1f895c6fe	342	{
mbed_official	340:28d1f895c6fe	343	return HAL_ERROR;
mbed_official	340:28d1f895c6fe	344	}
mbed_official	340:28d1f895c6fe	345
mbed_official	340:28d1f895c6fe	346	/* Check the parameters */
mbed_official	340:28d1f895c6fe	347	assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
mbed_official	340:28d1f895c6fe	348
mbed_official	340:28d1f895c6fe	349	hi2s->State = HAL_I2S_STATE_BUSY;
mbed_official	340:28d1f895c6fe	350
mbed_official	340:28d1f895c6fe	351	/* Disable the I2S Peripheral Clock */
mbed_official	340:28d1f895c6fe	352	__HAL_I2S_DISABLE(hi2s);
mbed_official	340:28d1f895c6fe	353
mbed_official	340:28d1f895c6fe	354	/* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
mbed_official	340:28d1f895c6fe	355	HAL_I2S_MspDeInit(hi2s);
mbed_official	340:28d1f895c6fe	356
mbed_official	340:28d1f895c6fe	357	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official	340:28d1f895c6fe	358	hi2s->State = HAL_I2S_STATE_RESET;
mbed_official	340:28d1f895c6fe	359
mbed_official	340:28d1f895c6fe	360	/* Release Lock */
mbed_official	340:28d1f895c6fe	361	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	362
mbed_official	340:28d1f895c6fe	363	return HAL_OK;
mbed_official	340:28d1f895c6fe	364	}
mbed_official	340:28d1f895c6fe	365
mbed_official	340:28d1f895c6fe	366	/**
mbed_official	340:28d1f895c6fe	367	* @brief I2S MSP Init
mbed_official	340:28d1f895c6fe	368	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	369	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	370	* @retval None
mbed_official	340:28d1f895c6fe	371	*/
mbed_official	340:28d1f895c6fe	372	__weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	373	{
mbed_official	340:28d1f895c6fe	374	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	340:28d1f895c6fe	375	the HAL_I2S_MspInit could be implemented in the user file
mbed_official	340:28d1f895c6fe	376	*/
mbed_official	340:28d1f895c6fe	377	}
mbed_official	340:28d1f895c6fe	378
mbed_official	340:28d1f895c6fe	379	/**
mbed_official	340:28d1f895c6fe	380	* @brief I2S MSP DeInit
mbed_official	340:28d1f895c6fe	381	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	382	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	383	* @retval None
mbed_official	340:28d1f895c6fe	384	*/
mbed_official	340:28d1f895c6fe	385	__weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	386	{
mbed_official	340:28d1f895c6fe	387	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	340:28d1f895c6fe	388	the HAL_I2S_MspDeInit could be implemented in the user file
mbed_official	340:28d1f895c6fe	389	*/
mbed_official	340:28d1f895c6fe	390	}
mbed_official	340:28d1f895c6fe	391
mbed_official	340:28d1f895c6fe	392	/**
mbed_official	340:28d1f895c6fe	393	* @}
mbed_official	340:28d1f895c6fe	394	*/
mbed_official	340:28d1f895c6fe	395
mbed_official	340:28d1f895c6fe	396	/** @defgroup I2S_Exported_Functions_Group2 IO operation functions
mbed_official	340:28d1f895c6fe	397	* @brief Data transfers functions
mbed_official	340:28d1f895c6fe	398	*
mbed_official	340:28d1f895c6fe	399	@verbatim
mbed_official	340:28d1f895c6fe	400	===============================================================================
mbed_official	340:28d1f895c6fe	401	##### IO operation functions #####
mbed_official	340:28d1f895c6fe	402	===============================================================================
mbed_official	340:28d1f895c6fe	403	[..]
mbed_official	340:28d1f895c6fe	404	This subsection provides a set of functions allowing to manage the I2S data
mbed_official	340:28d1f895c6fe	405	transfers.
mbed_official	340:28d1f895c6fe	406
mbed_official	340:28d1f895c6fe	407	(#) There are two modes of transfer:
mbed_official	340:28d1f895c6fe	408	(++) Blocking mode : The communication is performed in the polling mode.
mbed_official	340:28d1f895c6fe	409	The status of all data processing is returned by the same function
mbed_official	340:28d1f895c6fe	410	after finishing transfer.
mbed_official	340:28d1f895c6fe	411	(++) No-Blocking mode : The communication is performed using Interrupts
mbed_official	340:28d1f895c6fe	412	or DMA. These functions return the status of the transfer startup.
mbed_official	340:28d1f895c6fe	413	The end of the data processing will be indicated through the
mbed_official	340:28d1f895c6fe	414	dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
mbed_official	340:28d1f895c6fe	415	using DMA mode.
mbed_official	340:28d1f895c6fe	416
mbed_official	340:28d1f895c6fe	417	(#) Blocking mode functions are :
mbed_official	340:28d1f895c6fe	418	(++) HAL_I2S_Transmit()
mbed_official	340:28d1f895c6fe	419	(++) HAL_I2S_Receive()
mbed_official	340:28d1f895c6fe	420
mbed_official	340:28d1f895c6fe	421	(#) No-Blocking mode functions with Interrupt are :
mbed_official	340:28d1f895c6fe	422	(++) HAL_I2S_Transmit_IT()
mbed_official	340:28d1f895c6fe	423	(++) HAL_I2S_Receive_IT()
mbed_official	340:28d1f895c6fe	424
mbed_official	340:28d1f895c6fe	425	(#) No-Blocking mode functions with DMA are :
mbed_official	340:28d1f895c6fe	426	(++) HAL_I2S_Transmit_DMA()
mbed_official	340:28d1f895c6fe	427	(++) HAL_I2S_Receive_DMA()
mbed_official	340:28d1f895c6fe	428
mbed_official	340:28d1f895c6fe	429	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
mbed_official	340:28d1f895c6fe	430	(++) HAL_I2S_TxCpltCallback()
mbed_official	340:28d1f895c6fe	431	(++) HAL_I2S_RxCpltCallback()
mbed_official	340:28d1f895c6fe	432	(++) HAL_I2S_ErrorCallback()
mbed_official	340:28d1f895c6fe	433
mbed_official	340:28d1f895c6fe	434	@endverbatim
mbed_official	340:28d1f895c6fe	435	* @{
mbed_official	340:28d1f895c6fe	436	*/
mbed_official	340:28d1f895c6fe	437
mbed_official	340:28d1f895c6fe	438	/**
mbed_official	340:28d1f895c6fe	439	* @brief Transmit an amount of data in blocking mode
mbed_official	340:28d1f895c6fe	440	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	441	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	442	* @param pData: a 16-bit pointer to data buffer.
mbed_official	340:28d1f895c6fe	443	* @param Size: number of data sample to be sent:
mbed_official	340:28d1f895c6fe	444	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official	340:28d1f895c6fe	445	* configuration phase, the Size parameter means the number of 16-bit data length
mbed_official	340:28d1f895c6fe	446	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official	340:28d1f895c6fe	447	* the Size parameter means the number of 16-bit data length.
mbed_official	340:28d1f895c6fe	448	* @param Timeout: Timeout duration
mbed_official	340:28d1f895c6fe	449	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official	340:28d1f895c6fe	450	* between Master and Slave(example: audio streaming).
mbed_official	340:28d1f895c6fe	451	* @retval HAL status
mbed_official	340:28d1f895c6fe	452	*/
mbed_official	340:28d1f895c6fe	453	HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size, uint32_t Timeout)
mbed_official	340:28d1f895c6fe	454	{
mbed_official	442:d2c15dda23c1	455	if((pData == NULL ) \|\| (Size == 0))
mbed_official	340:28d1f895c6fe	456	{
mbed_official	340:28d1f895c6fe	457	return HAL_ERROR;
mbed_official	340:28d1f895c6fe	458	}
mbed_official	340:28d1f895c6fe	459
mbed_official	340:28d1f895c6fe	460	/* Process Locked */
mbed_official	340:28d1f895c6fe	461	__HAL_LOCK(hi2s);
mbed_official	340:28d1f895c6fe	462
mbed_official	340:28d1f895c6fe	463	if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official	340:28d1f895c6fe	464	{
mbed_official	340:28d1f895c6fe	465	if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)\|\|\
mbed_official	340:28d1f895c6fe	466	((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official	340:28d1f895c6fe	467	{
mbed_official	340:28d1f895c6fe	468	hi2s->TxXferSize = (Size << 1);
mbed_official	340:28d1f895c6fe	469	hi2s->TxXferCount = (Size << 1);
mbed_official	340:28d1f895c6fe	470	}
mbed_official	340:28d1f895c6fe	471	else
mbed_official	340:28d1f895c6fe	472	{
mbed_official	340:28d1f895c6fe	473	hi2s->TxXferSize = Size;
mbed_official	340:28d1f895c6fe	474	hi2s->TxXferCount = Size;
mbed_official	340:28d1f895c6fe	475	}
mbed_official	340:28d1f895c6fe	476
mbed_official	340:28d1f895c6fe	477	/* Set state and reset error code */
mbed_official	340:28d1f895c6fe	478	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official	340:28d1f895c6fe	479	hi2s->State = HAL_I2S_STATE_BUSY_TX;
mbed_official	340:28d1f895c6fe	480	hi2s->pTxBuffPtr = pData;
mbed_official	340:28d1f895c6fe	481
mbed_official	340:28d1f895c6fe	482	/* Check if the I2S is already enabled */
mbed_official	340:28d1f895c6fe	483	if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official	340:28d1f895c6fe	484	{
mbed_official	340:28d1f895c6fe	485	/* Enable I2S peripheral */
mbed_official	340:28d1f895c6fe	486	__HAL_I2S_ENABLE(hi2s);
mbed_official	340:28d1f895c6fe	487	}
mbed_official	340:28d1f895c6fe	488
mbed_official	340:28d1f895c6fe	489	while(hi2s->TxXferCount > 0)
mbed_official	340:28d1f895c6fe	490	{
mbed_official	340:28d1f895c6fe	491	/* Wait until TXE flag is set */
mbed_official	340:28d1f895c6fe	492	if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	340:28d1f895c6fe	493	{
mbed_official	340:28d1f895c6fe	494	return HAL_TIMEOUT;
mbed_official	340:28d1f895c6fe	495	}
mbed_official	340:28d1f895c6fe	496	hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
mbed_official	340:28d1f895c6fe	497	hi2s->TxXferCount--;
mbed_official	340:28d1f895c6fe	498	}
mbed_official	340:28d1f895c6fe	499
mbed_official	340:28d1f895c6fe	500	/* Wait until TXE flag is set, to confirm the end of the transcation */
mbed_official	340:28d1f895c6fe	501	if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	340:28d1f895c6fe	502	{
mbed_official	340:28d1f895c6fe	503	return HAL_TIMEOUT;
mbed_official	340:28d1f895c6fe	504	}
mbed_official	340:28d1f895c6fe	505	/* Wait until Busy flag is reset */
mbed_official	340:28d1f895c6fe	506	if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
mbed_official	340:28d1f895c6fe	507	{
mbed_official	340:28d1f895c6fe	508	return HAL_TIMEOUT;
mbed_official	340:28d1f895c6fe	509	}
mbed_official	340:28d1f895c6fe	510
mbed_official	340:28d1f895c6fe	511	hi2s->State = HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	512
mbed_official	340:28d1f895c6fe	513	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	514	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	515
mbed_official	340:28d1f895c6fe	516	return HAL_OK;
mbed_official	340:28d1f895c6fe	517	}
mbed_official	340:28d1f895c6fe	518	else
mbed_official	340:28d1f895c6fe	519	{
mbed_official	340:28d1f895c6fe	520	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	521	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	522	return HAL_BUSY;
mbed_official	340:28d1f895c6fe	523	}
mbed_official	340:28d1f895c6fe	524	}
mbed_official	340:28d1f895c6fe	525
mbed_official	340:28d1f895c6fe	526	/**
mbed_official	340:28d1f895c6fe	527	* @brief Receive an amount of data in blocking mode
mbed_official	340:28d1f895c6fe	528	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	529	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	530	* @param pData: a 16-bit pointer to data buffer.
mbed_official	340:28d1f895c6fe	531	* @param Size: number of data sample to be sent:
mbed_official	340:28d1f895c6fe	532	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official	340:28d1f895c6fe	533	* configuration phase, the Size parameter means the number of 16-bit data length
mbed_official	340:28d1f895c6fe	534	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official	340:28d1f895c6fe	535	* the Size parameter means the number of 16-bit data length.
mbed_official	340:28d1f895c6fe	536	* @param Timeout: Timeout duration
mbed_official	340:28d1f895c6fe	537	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official	340:28d1f895c6fe	538	* between Master and Slave(example: audio streaming).
mbed_official	340:28d1f895c6fe	539	* @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
mbed_official	340:28d1f895c6fe	540	* in continouse way and as the I2S is not disabled at the end of the I2S transaction.
mbed_official	340:28d1f895c6fe	541	* @retval HAL status
mbed_official	340:28d1f895c6fe	542	*/
mbed_official	340:28d1f895c6fe	543	HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size, uint32_t Timeout)
mbed_official	340:28d1f895c6fe	544	{
mbed_official	442:d2c15dda23c1	545	if((pData == NULL ) \|\| (Size == 0))
mbed_official	340:28d1f895c6fe	546	{
mbed_official	340:28d1f895c6fe	547	return HAL_ERROR;
mbed_official	340:28d1f895c6fe	548	}
mbed_official	340:28d1f895c6fe	549
mbed_official	340:28d1f895c6fe	550	/* Process Locked */
mbed_official	340:28d1f895c6fe	551	__HAL_LOCK(hi2s);
mbed_official	340:28d1f895c6fe	552
mbed_official	340:28d1f895c6fe	553	if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official	340:28d1f895c6fe	554	{
mbed_official	340:28d1f895c6fe	555	if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)\|\|\
mbed_official	340:28d1f895c6fe	556	((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official	340:28d1f895c6fe	557	{
mbed_official	340:28d1f895c6fe	558	hi2s->RxXferSize = (Size << 1);
mbed_official	340:28d1f895c6fe	559	hi2s->RxXferCount = (Size << 1);
mbed_official	340:28d1f895c6fe	560	}
mbed_official	340:28d1f895c6fe	561	else
mbed_official	340:28d1f895c6fe	562	{
mbed_official	340:28d1f895c6fe	563	hi2s->RxXferSize = Size;
mbed_official	340:28d1f895c6fe	564	hi2s->RxXferCount = Size;
mbed_official	340:28d1f895c6fe	565	}
mbed_official	340:28d1f895c6fe	566
mbed_official	340:28d1f895c6fe	567	/* Set state and reset error code */
mbed_official	340:28d1f895c6fe	568	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official	340:28d1f895c6fe	569	hi2s->State = HAL_I2S_STATE_BUSY_RX;
mbed_official	340:28d1f895c6fe	570	hi2s->pRxBuffPtr = pData;
mbed_official	340:28d1f895c6fe	571
mbed_official	340:28d1f895c6fe	572	/* Check if the I2S is already enabled */
mbed_official	340:28d1f895c6fe	573	if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official	340:28d1f895c6fe	574	{
mbed_official	340:28d1f895c6fe	575	/* Enable I2S peripheral */
mbed_official	340:28d1f895c6fe	576	__HAL_I2S_ENABLE(hi2s);
mbed_official	340:28d1f895c6fe	577	}
mbed_official	340:28d1f895c6fe	578
mbed_official	340:28d1f895c6fe	579	/* Receive data */
mbed_official	340:28d1f895c6fe	580	while(hi2s->RxXferCount > 0)
mbed_official	340:28d1f895c6fe	581	{
mbed_official	340:28d1f895c6fe	582	/* Wait until RXNE flag is set */
mbed_official	340:28d1f895c6fe	583	if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	340:28d1f895c6fe	584	{
mbed_official	340:28d1f895c6fe	585	return HAL_TIMEOUT;
mbed_official	340:28d1f895c6fe	586	}
mbed_official	340:28d1f895c6fe	587
mbed_official	340:28d1f895c6fe	588	(*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
mbed_official	340:28d1f895c6fe	589	hi2s->RxXferCount--;
mbed_official	340:28d1f895c6fe	590	}
mbed_official	340:28d1f895c6fe	591
mbed_official	340:28d1f895c6fe	592	hi2s->State = HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	593
mbed_official	340:28d1f895c6fe	594	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	595	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	596
mbed_official	340:28d1f895c6fe	597	return HAL_OK;
mbed_official	340:28d1f895c6fe	598	}
mbed_official	340:28d1f895c6fe	599	else
mbed_official	340:28d1f895c6fe	600	{
mbed_official	340:28d1f895c6fe	601	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	602	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	603	return HAL_BUSY;
mbed_official	340:28d1f895c6fe	604	}
mbed_official	340:28d1f895c6fe	605	}
mbed_official	340:28d1f895c6fe	606
mbed_official	340:28d1f895c6fe	607	/**
mbed_official	340:28d1f895c6fe	608	* @brief Transmit an amount of data in non-blocking mode with Interrupt
mbed_official	340:28d1f895c6fe	609	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	610	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	611	* @param pData: a 16-bit pointer to data buffer.
mbed_official	340:28d1f895c6fe	612	* @param Size: number of data sample to be sent:
mbed_official	340:28d1f895c6fe	613	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official	340:28d1f895c6fe	614	* configuration phase, the Size parameter means the number of 16-bit data length
mbed_official	340:28d1f895c6fe	615	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official	340:28d1f895c6fe	616	* the Size parameter means the number of 16-bit data length.
mbed_official	340:28d1f895c6fe	617	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official	340:28d1f895c6fe	618	* between Master and Slave(example: audio streaming).
mbed_official	340:28d1f895c6fe	619	* @retval HAL status
mbed_official	340:28d1f895c6fe	620	*/
mbed_official	340:28d1f895c6fe	621	HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size)
mbed_official	340:28d1f895c6fe	622	{
mbed_official	442:d2c15dda23c1	623	if((pData == NULL) \|\| (Size == 0))
mbed_official	340:28d1f895c6fe	624	{
mbed_official	340:28d1f895c6fe	625	return HAL_ERROR;
mbed_official	340:28d1f895c6fe	626	}
mbed_official	340:28d1f895c6fe	627
mbed_official	340:28d1f895c6fe	628	/* Process Locked */
mbed_official	340:28d1f895c6fe	629	__HAL_LOCK(hi2s);
mbed_official	340:28d1f895c6fe	630
mbed_official	340:28d1f895c6fe	631	if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official	340:28d1f895c6fe	632	{
mbed_official	340:28d1f895c6fe	633	hi2s->pTxBuffPtr = pData;
mbed_official	340:28d1f895c6fe	634	hi2s->State = HAL_I2S_STATE_BUSY_TX;
mbed_official	340:28d1f895c6fe	635	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official	340:28d1f895c6fe	636
mbed_official	340:28d1f895c6fe	637	if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)\|\|\
mbed_official	340:28d1f895c6fe	638	((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official	340:28d1f895c6fe	639	{
mbed_official	340:28d1f895c6fe	640	hi2s->TxXferSize = (Size << 1);
mbed_official	340:28d1f895c6fe	641	hi2s->TxXferCount = (Size << 1);
mbed_official	340:28d1f895c6fe	642	}
mbed_official	340:28d1f895c6fe	643	else
mbed_official	340:28d1f895c6fe	644	{
mbed_official	340:28d1f895c6fe	645	hi2s->TxXferSize = Size;
mbed_official	340:28d1f895c6fe	646	hi2s->TxXferCount = Size;
mbed_official	340:28d1f895c6fe	647	}
mbed_official	340:28d1f895c6fe	648
mbed_official	340:28d1f895c6fe	649	/* Enable TXE and ERR interrupt */
mbed_official	340:28d1f895c6fe	650	__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE \| I2S_IT_ERR));
mbed_official	340:28d1f895c6fe	651
mbed_official	340:28d1f895c6fe	652	/* Check if the I2S is already enabled */
mbed_official	340:28d1f895c6fe	653	if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official	340:28d1f895c6fe	654	{
mbed_official	340:28d1f895c6fe	655	/* Enable I2S peripheral */
mbed_official	340:28d1f895c6fe	656	__HAL_I2S_ENABLE(hi2s);
mbed_official	340:28d1f895c6fe	657	}
mbed_official	340:28d1f895c6fe	658
mbed_official	340:28d1f895c6fe	659	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	660	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	661
mbed_official	340:28d1f895c6fe	662	return HAL_OK;
mbed_official	340:28d1f895c6fe	663	}
mbed_official	340:28d1f895c6fe	664	else
mbed_official	340:28d1f895c6fe	665	{
mbed_official	340:28d1f895c6fe	666	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	667	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	668	return HAL_BUSY;
mbed_official	340:28d1f895c6fe	669	}
mbed_official	340:28d1f895c6fe	670	}
mbed_official	340:28d1f895c6fe	671
mbed_official	340:28d1f895c6fe	672	/**
mbed_official	340:28d1f895c6fe	673	* @brief Receive an amount of data in non-blocking mode with Interrupt
mbed_official	340:28d1f895c6fe	674	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	675	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	676	* @param pData: a 16-bit pointer to the Receive data buffer.
mbed_official	340:28d1f895c6fe	677	* @param Size: number of data sample to be sent:
mbed_official	340:28d1f895c6fe	678	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official	340:28d1f895c6fe	679	* configuration phase, the Size parameter means the number of 16-bit data length
mbed_official	340:28d1f895c6fe	680	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official	340:28d1f895c6fe	681	* the Size parameter means the number of 16-bit data length.
mbed_official	340:28d1f895c6fe	682	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official	340:28d1f895c6fe	683	* between Master and Slave(example: audio streaming).
mbed_official	340:28d1f895c6fe	684	* @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
mbed_official	340:28d1f895c6fe	685	* between Master and Slave otherwise the I2S interrupt should be optimized.
mbed_official	340:28d1f895c6fe	686	* @retval HAL status
mbed_official	340:28d1f895c6fe	687	*/
mbed_official	340:28d1f895c6fe	688	HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size)
mbed_official	340:28d1f895c6fe	689	{
mbed_official	442:d2c15dda23c1	690	if((pData == NULL) \|\| (Size == 0))
mbed_official	340:28d1f895c6fe	691	{
mbed_official	340:28d1f895c6fe	692	return HAL_ERROR;
mbed_official	340:28d1f895c6fe	693	}
mbed_official	340:28d1f895c6fe	694
mbed_official	340:28d1f895c6fe	695	/* Process Locked */
mbed_official	340:28d1f895c6fe	696	__HAL_LOCK(hi2s);
mbed_official	340:28d1f895c6fe	697
mbed_official	340:28d1f895c6fe	698	if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official	340:28d1f895c6fe	699	{
mbed_official	340:28d1f895c6fe	700	hi2s->pRxBuffPtr = pData;
mbed_official	340:28d1f895c6fe	701	hi2s->State = HAL_I2S_STATE_BUSY_RX;
mbed_official	340:28d1f895c6fe	702	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official	340:28d1f895c6fe	703
mbed_official	340:28d1f895c6fe	704	if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)\|\|\
mbed_official	340:28d1f895c6fe	705	((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official	340:28d1f895c6fe	706	{
mbed_official	340:28d1f895c6fe	707	hi2s->RxXferSize = (Size << 1);
mbed_official	340:28d1f895c6fe	708	hi2s->RxXferCount = (Size << 1);
mbed_official	340:28d1f895c6fe	709	}
mbed_official	340:28d1f895c6fe	710	else
mbed_official	340:28d1f895c6fe	711	{
mbed_official	340:28d1f895c6fe	712	hi2s->RxXferSize = Size;
mbed_official	340:28d1f895c6fe	713	hi2s->RxXferCount = Size;
mbed_official	340:28d1f895c6fe	714	}
mbed_official	340:28d1f895c6fe	715
mbed_official	340:28d1f895c6fe	716	/* Enable TXE and ERR interrupt */
mbed_official	340:28d1f895c6fe	717	__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE \| I2S_IT_ERR));
mbed_official	340:28d1f895c6fe	718
mbed_official	340:28d1f895c6fe	719	/* Check if the I2S is already enabled */
mbed_official	340:28d1f895c6fe	720	if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official	340:28d1f895c6fe	721	{
mbed_official	340:28d1f895c6fe	722	/* Enable I2S peripheral */
mbed_official	340:28d1f895c6fe	723	__HAL_I2S_ENABLE(hi2s);
mbed_official	340:28d1f895c6fe	724	}
mbed_official	340:28d1f895c6fe	725
mbed_official	340:28d1f895c6fe	726	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	727	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	728
mbed_official	340:28d1f895c6fe	729	return HAL_OK;
mbed_official	340:28d1f895c6fe	730	}
mbed_official	340:28d1f895c6fe	731	else
mbed_official	340:28d1f895c6fe	732	{
mbed_official	340:28d1f895c6fe	733	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	734	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	735	return HAL_BUSY;
mbed_official	340:28d1f895c6fe	736	}
mbed_official	340:28d1f895c6fe	737	}
mbed_official	340:28d1f895c6fe	738
mbed_official	340:28d1f895c6fe	739	/**
mbed_official	340:28d1f895c6fe	740	* @brief Transmit an amount of data in non-blocking mode with DMA
mbed_official	340:28d1f895c6fe	741	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	742	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	743	* @param pData: a 16-bit pointer to the Transmit data buffer.
mbed_official	340:28d1f895c6fe	744	* @param Size: number of data sample to be sent:
mbed_official	340:28d1f895c6fe	745	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official	340:28d1f895c6fe	746	* configuration phase, the Size parameter means the number of 16-bit data length
mbed_official	340:28d1f895c6fe	747	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official	340:28d1f895c6fe	748	* the Size parameter means the number of 16-bit data length.
mbed_official	340:28d1f895c6fe	749	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official	340:28d1f895c6fe	750	* between Master and Slave(example: audio streaming).
mbed_official	340:28d1f895c6fe	751	* @retval HAL status
mbed_official	340:28d1f895c6fe	752	*/
mbed_official	340:28d1f895c6fe	753	HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size)
mbed_official	340:28d1f895c6fe	754	{
mbed_official	442:d2c15dda23c1	755	if((pData == NULL) \|\| (Size == 0))
mbed_official	340:28d1f895c6fe	756	{
mbed_official	340:28d1f895c6fe	757	return HAL_ERROR;
mbed_official	340:28d1f895c6fe	758	}
mbed_official	340:28d1f895c6fe	759
mbed_official	340:28d1f895c6fe	760	/* Process Locked */
mbed_official	340:28d1f895c6fe	761	__HAL_LOCK(hi2s);
mbed_official	340:28d1f895c6fe	762
mbed_official	340:28d1f895c6fe	763	if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official	340:28d1f895c6fe	764	{
mbed_official	340:28d1f895c6fe	765	hi2s->pTxBuffPtr = pData;
mbed_official	340:28d1f895c6fe	766	hi2s->State = HAL_I2S_STATE_BUSY_TX;
mbed_official	340:28d1f895c6fe	767	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official	340:28d1f895c6fe	768
mbed_official	340:28d1f895c6fe	769	if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)\|\|\
mbed_official	340:28d1f895c6fe	770	((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official	340:28d1f895c6fe	771	{
mbed_official	340:28d1f895c6fe	772	hi2s->TxXferSize = (Size << 1);
mbed_official	340:28d1f895c6fe	773	hi2s->TxXferCount = (Size << 1);
mbed_official	340:28d1f895c6fe	774	}
mbed_official	340:28d1f895c6fe	775	else
mbed_official	340:28d1f895c6fe	776	{
mbed_official	340:28d1f895c6fe	777	hi2s->TxXferSize = Size;
mbed_official	340:28d1f895c6fe	778	hi2s->TxXferCount = Size;
mbed_official	340:28d1f895c6fe	779	}
mbed_official	340:28d1f895c6fe	780
mbed_official	340:28d1f895c6fe	781	/* Set the I2S Tx DMA Half transfert complete callback */
mbed_official	340:28d1f895c6fe	782	hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
mbed_official	340:28d1f895c6fe	783
mbed_official	340:28d1f895c6fe	784	/* Set the I2S Tx DMA transfert complete callback */
mbed_official	340:28d1f895c6fe	785	hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
mbed_official	340:28d1f895c6fe	786
mbed_official	340:28d1f895c6fe	787	/* Set the DMA error callback */
mbed_official	340:28d1f895c6fe	788	hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
mbed_official	340:28d1f895c6fe	789
mbed_official	340:28d1f895c6fe	790	/* Enable the Tx DMA Channel */
mbed_official	340:28d1f895c6fe	791	HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
mbed_official	340:28d1f895c6fe	792
mbed_official	340:28d1f895c6fe	793	/* Check if the I2S is already enabled */
mbed_official	340:28d1f895c6fe	794	if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official	340:28d1f895c6fe	795	{
mbed_official	340:28d1f895c6fe	796	/* Enable I2S peripheral */
mbed_official	340:28d1f895c6fe	797	__HAL_I2S_ENABLE(hi2s);
mbed_official	340:28d1f895c6fe	798	}
mbed_official	340:28d1f895c6fe	799
mbed_official	340:28d1f895c6fe	800	/* Check if the I2S Tx request is already enabled */
mbed_official	340:28d1f895c6fe	801	if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN)
mbed_official	340:28d1f895c6fe	802	{
mbed_official	340:28d1f895c6fe	803	/* Enable Tx DMA Request */
mbed_official	340:28d1f895c6fe	804	hi2s->Instance->CR2 \|= SPI_CR2_TXDMAEN;
mbed_official	340:28d1f895c6fe	805	}
mbed_official	340:28d1f895c6fe	806
mbed_official	340:28d1f895c6fe	807	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	808	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	809
mbed_official	340:28d1f895c6fe	810	return HAL_OK;
mbed_official	340:28d1f895c6fe	811	}
mbed_official	340:28d1f895c6fe	812	else
mbed_official	340:28d1f895c6fe	813	{
mbed_official	340:28d1f895c6fe	814	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	815	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	816	return HAL_BUSY;
mbed_official	340:28d1f895c6fe	817	}
mbed_official	340:28d1f895c6fe	818	}
mbed_official	340:28d1f895c6fe	819
mbed_official	340:28d1f895c6fe	820	/**
mbed_official	340:28d1f895c6fe	821	* @brief Receive an amount of data in non-blocking mode with DMA
mbed_official	340:28d1f895c6fe	822	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	823	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	824	* @param pData: a 16-bit pointer to the Receive data buffer.
mbed_official	340:28d1f895c6fe	825	* @param Size: number of data sample to be sent:
mbed_official	340:28d1f895c6fe	826	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official	340:28d1f895c6fe	827	* configuration phase, the Size parameter means the number of 16-bit data length
mbed_official	340:28d1f895c6fe	828	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official	340:28d1f895c6fe	829	* the Size parameter means the number of 16-bit data length.
mbed_official	340:28d1f895c6fe	830	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official	340:28d1f895c6fe	831	* between Master and Slave(example: audio streaming).
mbed_official	340:28d1f895c6fe	832	* @retval HAL status
mbed_official	340:28d1f895c6fe	833	*/
mbed_official	340:28d1f895c6fe	834	HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size)
mbed_official	340:28d1f895c6fe	835	{
mbed_official	442:d2c15dda23c1	836	if((pData == NULL) \|\| (Size == 0))
mbed_official	340:28d1f895c6fe	837	{
mbed_official	340:28d1f895c6fe	838	return HAL_ERROR;
mbed_official	340:28d1f895c6fe	839	}
mbed_official	340:28d1f895c6fe	840
mbed_official	340:28d1f895c6fe	841	/* Process Locked */
mbed_official	340:28d1f895c6fe	842	__HAL_LOCK(hi2s);
mbed_official	340:28d1f895c6fe	843
mbed_official	340:28d1f895c6fe	844	if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official	340:28d1f895c6fe	845	{
mbed_official	340:28d1f895c6fe	846	hi2s->pRxBuffPtr = pData;
mbed_official	340:28d1f895c6fe	847	hi2s->State = HAL_I2S_STATE_BUSY_RX;
mbed_official	340:28d1f895c6fe	848	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official	340:28d1f895c6fe	849
mbed_official	340:28d1f895c6fe	850	if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)\|\|\
mbed_official	340:28d1f895c6fe	851	((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official	340:28d1f895c6fe	852	{
mbed_official	340:28d1f895c6fe	853	hi2s->RxXferSize = (Size << 1);
mbed_official	340:28d1f895c6fe	854	hi2s->RxXferCount = (Size << 1);
mbed_official	340:28d1f895c6fe	855	}
mbed_official	340:28d1f895c6fe	856	else
mbed_official	340:28d1f895c6fe	857	{
mbed_official	340:28d1f895c6fe	858	hi2s->RxXferSize = Size;
mbed_official	340:28d1f895c6fe	859	hi2s->RxXferCount = Size;
mbed_official	340:28d1f895c6fe	860	}
mbed_official	340:28d1f895c6fe	861
mbed_official	340:28d1f895c6fe	862
mbed_official	340:28d1f895c6fe	863	/* Set the I2S Rx DMA Half transfert complete callback */
mbed_official	340:28d1f895c6fe	864	hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
mbed_official	340:28d1f895c6fe	865
mbed_official	340:28d1f895c6fe	866	/* Set the I2S Rx DMA transfert complete callback */
mbed_official	340:28d1f895c6fe	867	hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
mbed_official	340:28d1f895c6fe	868
mbed_official	340:28d1f895c6fe	869	/* Set the DMA error callback */
mbed_official	340:28d1f895c6fe	870	hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
mbed_official	340:28d1f895c6fe	871
mbed_official	340:28d1f895c6fe	872	/* Check if Master Receiver mode is selected */
mbed_official	340:28d1f895c6fe	873	if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
mbed_official	340:28d1f895c6fe	874	{
mbed_official	340:28d1f895c6fe	875	/* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
mbed_official	340:28d1f895c6fe	876	access to the SPI_SR register. */
mbed_official	340:28d1f895c6fe	877	__HAL_I2S_CLEAR_OVRFLAG(hi2s);
mbed_official	340:28d1f895c6fe	878	}
mbed_official	340:28d1f895c6fe	879
mbed_official	340:28d1f895c6fe	880	/* Enable the Rx DMA Channel */
mbed_official	340:28d1f895c6fe	881	HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize);
mbed_official	340:28d1f895c6fe	882
mbed_official	340:28d1f895c6fe	883	/* Check if the I2S is already enabled */
mbed_official	340:28d1f895c6fe	884	if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official	340:28d1f895c6fe	885	{
mbed_official	340:28d1f895c6fe	886	/* Enable I2S peripheral */
mbed_official	340:28d1f895c6fe	887	__HAL_I2S_ENABLE(hi2s);
mbed_official	340:28d1f895c6fe	888	}
mbed_official	340:28d1f895c6fe	889
mbed_official	340:28d1f895c6fe	890	/* Check if the I2S Rx request is already enabled */
mbed_official	340:28d1f895c6fe	891	if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN)
mbed_official	340:28d1f895c6fe	892	{
mbed_official	340:28d1f895c6fe	893	/* Enable Rx DMA Request */
mbed_official	340:28d1f895c6fe	894	hi2s->Instance->CR2 \|= SPI_CR2_RXDMAEN;
mbed_official	340:28d1f895c6fe	895	}
mbed_official	340:28d1f895c6fe	896
mbed_official	340:28d1f895c6fe	897	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	898	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	899
mbed_official	340:28d1f895c6fe	900	return HAL_OK;
mbed_official	340:28d1f895c6fe	901	}
mbed_official	340:28d1f895c6fe	902	else
mbed_official	340:28d1f895c6fe	903	{
mbed_official	340:28d1f895c6fe	904	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	905	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	906	return HAL_BUSY;
mbed_official	340:28d1f895c6fe	907	}
mbed_official	340:28d1f895c6fe	908	}
mbed_official	340:28d1f895c6fe	909
mbed_official	340:28d1f895c6fe	910	/**
mbed_official	340:28d1f895c6fe	911	* @brief Pauses the audio stream playing from the Media.
mbed_official	340:28d1f895c6fe	912	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	913	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	914	* @retval HAL status
mbed_official	340:28d1f895c6fe	915	*/
mbed_official	340:28d1f895c6fe	916	HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	917	{
mbed_official	340:28d1f895c6fe	918	/* Process Locked */
mbed_official	340:28d1f895c6fe	919	__HAL_LOCK(hi2s);
mbed_official	340:28d1f895c6fe	920
mbed_official	340:28d1f895c6fe	921	if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official	340:28d1f895c6fe	922	{
mbed_official	340:28d1f895c6fe	923	/* Disable the I2S DMA Tx request */
mbed_official	340:28d1f895c6fe	924	hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_TXDMAEN);
mbed_official	340:28d1f895c6fe	925	}
mbed_official	340:28d1f895c6fe	926	else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official	340:28d1f895c6fe	927	{
mbed_official	340:28d1f895c6fe	928	/* Disable the I2S DMA Rx request */
mbed_official	340:28d1f895c6fe	929	hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_RXDMAEN);
mbed_official	340:28d1f895c6fe	930	}
mbed_official	340:28d1f895c6fe	931
mbed_official	340:28d1f895c6fe	932	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	933	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	934
mbed_official	340:28d1f895c6fe	935	return HAL_OK;
mbed_official	340:28d1f895c6fe	936	}
mbed_official	340:28d1f895c6fe	937
mbed_official	340:28d1f895c6fe	938	/**
mbed_official	340:28d1f895c6fe	939	* @brief Resumes the audio stream playing from the Media.
mbed_official	340:28d1f895c6fe	940	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	941	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	942	* @retval HAL status
mbed_official	340:28d1f895c6fe	943	*/
mbed_official	340:28d1f895c6fe	944	HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	945	{
mbed_official	340:28d1f895c6fe	946	/* Process Locked */
mbed_official	340:28d1f895c6fe	947	__HAL_LOCK(hi2s);
mbed_official	340:28d1f895c6fe	948
mbed_official	340:28d1f895c6fe	949	if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official	340:28d1f895c6fe	950	{
mbed_official	340:28d1f895c6fe	951	/* Enable the I2S DMA Tx request */
mbed_official	340:28d1f895c6fe	952	hi2s->Instance->CR2 \|= SPI_CR2_TXDMAEN;
mbed_official	340:28d1f895c6fe	953	}
mbed_official	340:28d1f895c6fe	954	else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official	340:28d1f895c6fe	955	{
mbed_official	340:28d1f895c6fe	956	/* Enable the I2S DMA Rx request */
mbed_official	340:28d1f895c6fe	957	hi2s->Instance->CR2 \|= SPI_CR2_RXDMAEN;
mbed_official	340:28d1f895c6fe	958	}
mbed_official	340:28d1f895c6fe	959
mbed_official	340:28d1f895c6fe	960	/* If the I2S peripheral is still not enabled, enable it */
mbed_official	340:28d1f895c6fe	961	if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0)
mbed_official	340:28d1f895c6fe	962	{
mbed_official	340:28d1f895c6fe	963	/* Enable I2S peripheral */
mbed_official	340:28d1f895c6fe	964	__HAL_I2S_ENABLE(hi2s);
mbed_official	340:28d1f895c6fe	965	}
mbed_official	340:28d1f895c6fe	966
mbed_official	340:28d1f895c6fe	967	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	968	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	969
mbed_official	340:28d1f895c6fe	970	return HAL_OK;
mbed_official	340:28d1f895c6fe	971	}
mbed_official	340:28d1f895c6fe	972
mbed_official	340:28d1f895c6fe	973	/**
mbed_official	340:28d1f895c6fe	974	* @brief Resumes the audio stream playing from the Media.
mbed_official	340:28d1f895c6fe	975	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	976	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	977	* @retval HAL status
mbed_official	340:28d1f895c6fe	978	*/
mbed_official	340:28d1f895c6fe	979	HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	980	{
mbed_official	340:28d1f895c6fe	981	/* Process Locked */
mbed_official	340:28d1f895c6fe	982	__HAL_LOCK(hi2s);
mbed_official	340:28d1f895c6fe	983
mbed_official	340:28d1f895c6fe	984	/* Disable the I2S Tx/Rx DMA requests */
mbed_official	340:28d1f895c6fe	985	hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_TXDMAEN);
mbed_official	340:28d1f895c6fe	986	hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_RXDMAEN);
mbed_official	340:28d1f895c6fe	987
mbed_official	340:28d1f895c6fe	988	/* Abort the I2S DMA tx channel */
mbed_official	442:d2c15dda23c1	989	if(hi2s->hdmatx != NULL)
mbed_official	340:28d1f895c6fe	990	{
mbed_official	631:825f75ca301e	991	/* Disable the I2S DMA channel */
mbed_official	631:825f75ca301e	992	__HAL_DMA_DISABLE(hi2s->hdmatx);
mbed_official	340:28d1f895c6fe	993	HAL_DMA_Abort(hi2s->hdmatx);
mbed_official	340:28d1f895c6fe	994	}
mbed_official	340:28d1f895c6fe	995	/* Abort the I2S DMA rx channel */
mbed_official	442:d2c15dda23c1	996	if(hi2s->hdmarx != NULL)
mbed_official	340:28d1f895c6fe	997	{
mbed_official	631:825f75ca301e	998	/* Disable the I2S DMA channel */
mbed_official	631:825f75ca301e	999	__HAL_DMA_DISABLE(hi2s->hdmarx);
mbed_official	340:28d1f895c6fe	1000	HAL_DMA_Abort(hi2s->hdmarx);
mbed_official	340:28d1f895c6fe	1001	}
mbed_official	340:28d1f895c6fe	1002
mbed_official	340:28d1f895c6fe	1003	/* Disable I2S peripheral */
mbed_official	340:28d1f895c6fe	1004	__HAL_I2S_DISABLE(hi2s);
mbed_official	340:28d1f895c6fe	1005
mbed_official	340:28d1f895c6fe	1006	hi2s->State = HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1007
mbed_official	340:28d1f895c6fe	1008	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	1009	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	1010
mbed_official	340:28d1f895c6fe	1011	return HAL_OK;
mbed_official	340:28d1f895c6fe	1012	}
mbed_official	340:28d1f895c6fe	1013
mbed_official	340:28d1f895c6fe	1014	/**
mbed_official	340:28d1f895c6fe	1015	* @brief This function handles I2S interrupt request.
mbed_official	340:28d1f895c6fe	1016	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1017	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1018	* @retval None
mbed_official	340:28d1f895c6fe	1019	*/
mbed_official	340:28d1f895c6fe	1020	void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1021	{
mbed_official	340:28d1f895c6fe	1022	uint32_t i2ssr = hi2s->Instance->SR;
mbed_official	340:28d1f895c6fe	1023
mbed_official	340:28d1f895c6fe	1024	/* I2S in mode Receiver ------------------------------------------------*/
mbed_official	340:28d1f895c6fe	1025	if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) &&
mbed_official	340:28d1f895c6fe	1026	((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
mbed_official	340:28d1f895c6fe	1027	{
mbed_official	340:28d1f895c6fe	1028	I2S_Receive_IT(hi2s);
mbed_official	340:28d1f895c6fe	1029	return;
mbed_official	340:28d1f895c6fe	1030	}
mbed_official	340:28d1f895c6fe	1031
mbed_official	340:28d1f895c6fe	1032	/* I2S in mode Tramitter -----------------------------------------------*/
mbed_official	340:28d1f895c6fe	1033	if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
mbed_official	340:28d1f895c6fe	1034	{
mbed_official	340:28d1f895c6fe	1035	I2S_Transmit_IT(hi2s);
mbed_official	340:28d1f895c6fe	1036	return;
mbed_official	340:28d1f895c6fe	1037	}
mbed_official	340:28d1f895c6fe	1038
mbed_official	340:28d1f895c6fe	1039	/* I2S Overrun error interrupt occured ---------------------------------*/
mbed_official	340:28d1f895c6fe	1040	if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
mbed_official	340:28d1f895c6fe	1041	{
mbed_official	340:28d1f895c6fe	1042	/* Disable RXNE and ERR interrupt */
mbed_official	340:28d1f895c6fe	1043	__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE \| I2S_IT_ERR));
mbed_official	340:28d1f895c6fe	1044
mbed_official	340:28d1f895c6fe	1045	/* Set the I2S State ready */
mbed_official	340:28d1f895c6fe	1046	hi2s->State = HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1047
mbed_official	340:28d1f895c6fe	1048	/* Set the error code and execute error callback*/
mbed_official	340:28d1f895c6fe	1049	hi2s->ErrorCode \|= HAL_I2S_ERROR_OVR;
mbed_official	340:28d1f895c6fe	1050	HAL_I2S_ErrorCallback(hi2s);
mbed_official	340:28d1f895c6fe	1051	}
mbed_official	340:28d1f895c6fe	1052
mbed_official	340:28d1f895c6fe	1053	/* I2S Underrun error interrupt occured --------------------------------*/
mbed_official	340:28d1f895c6fe	1054	if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
mbed_official	340:28d1f895c6fe	1055	{
mbed_official	340:28d1f895c6fe	1056	/* Disable TXE and ERR interrupt */
mbed_official	340:28d1f895c6fe	1057	__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE \| I2S_IT_ERR));
mbed_official	340:28d1f895c6fe	1058
mbed_official	340:28d1f895c6fe	1059	/* Set the I2S State ready */
mbed_official	340:28d1f895c6fe	1060	hi2s->State = HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1061
mbed_official	340:28d1f895c6fe	1062	/* Set the error code and execute error callback*/
mbed_official	340:28d1f895c6fe	1063	hi2s->ErrorCode \|= HAL_I2S_ERROR_UDR;
mbed_official	340:28d1f895c6fe	1064	HAL_I2S_ErrorCallback(hi2s);
mbed_official	340:28d1f895c6fe	1065	}
mbed_official	340:28d1f895c6fe	1066	}
mbed_official	340:28d1f895c6fe	1067
mbed_official	340:28d1f895c6fe	1068	/**
mbed_official	340:28d1f895c6fe	1069	* @brief Tx Transfer Half completed callbacks
mbed_official	340:28d1f895c6fe	1070	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1071	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1072	* @retval None
mbed_official	340:28d1f895c6fe	1073	*/
mbed_official	340:28d1f895c6fe	1074	__weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1075	{
mbed_official	340:28d1f895c6fe	1076	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	340:28d1f895c6fe	1077	the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
mbed_official	340:28d1f895c6fe	1078	*/
mbed_official	340:28d1f895c6fe	1079	}
mbed_official	340:28d1f895c6fe	1080
mbed_official	340:28d1f895c6fe	1081	/**
mbed_official	340:28d1f895c6fe	1082	* @brief Tx Transfer completed callbacks
mbed_official	340:28d1f895c6fe	1083	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1084	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1085	* @retval None
mbed_official	340:28d1f895c6fe	1086	*/
mbed_official	340:28d1f895c6fe	1087	__weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1088	{
mbed_official	340:28d1f895c6fe	1089	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	340:28d1f895c6fe	1090	the HAL_I2S_TxCpltCallback could be implemented in the user file
mbed_official	340:28d1f895c6fe	1091	*/
mbed_official	340:28d1f895c6fe	1092	}
mbed_official	340:28d1f895c6fe	1093
mbed_official	340:28d1f895c6fe	1094	/**
mbed_official	340:28d1f895c6fe	1095	* @brief Rx Transfer half completed callbacks
mbed_official	340:28d1f895c6fe	1096	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1097	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1098	* @retval None
mbed_official	340:28d1f895c6fe	1099	*/
mbed_official	340:28d1f895c6fe	1100	__weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1101	{
mbed_official	340:28d1f895c6fe	1102	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	340:28d1f895c6fe	1103	the HAL_I2S_RxCpltCallback could be implemented in the user file
mbed_official	340:28d1f895c6fe	1104	*/
mbed_official	340:28d1f895c6fe	1105	}
mbed_official	340:28d1f895c6fe	1106
mbed_official	340:28d1f895c6fe	1107	/**
mbed_official	340:28d1f895c6fe	1108	* @brief Rx Transfer completed callbacks
mbed_official	340:28d1f895c6fe	1109	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1110	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1111	* @retval None
mbed_official	340:28d1f895c6fe	1112	*/
mbed_official	340:28d1f895c6fe	1113	__weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1114	{
mbed_official	340:28d1f895c6fe	1115	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	340:28d1f895c6fe	1116	the HAL_I2S_RxCpltCallback could be implemented in the user file
mbed_official	340:28d1f895c6fe	1117	*/
mbed_official	340:28d1f895c6fe	1118	}
mbed_official	340:28d1f895c6fe	1119
mbed_official	340:28d1f895c6fe	1120	/**
mbed_official	340:28d1f895c6fe	1121	* @brief I2S error callbacks
mbed_official	340:28d1f895c6fe	1122	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1123	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1124	* @retval None
mbed_official	340:28d1f895c6fe	1125	*/
mbed_official	340:28d1f895c6fe	1126	__weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1127	{
mbed_official	340:28d1f895c6fe	1128	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	340:28d1f895c6fe	1129	the HAL_I2S_ErrorCallback could be implemented in the user file
mbed_official	340:28d1f895c6fe	1130	*/
mbed_official	340:28d1f895c6fe	1131	}
mbed_official	340:28d1f895c6fe	1132
mbed_official	340:28d1f895c6fe	1133	/**
mbed_official	340:28d1f895c6fe	1134	* @}
mbed_official	340:28d1f895c6fe	1135	*/
mbed_official	340:28d1f895c6fe	1136
mbed_official	340:28d1f895c6fe	1137	/** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
mbed_official	340:28d1f895c6fe	1138	* @brief Peripheral State functions
mbed_official	340:28d1f895c6fe	1139	*
mbed_official	340:28d1f895c6fe	1140	@verbatim
mbed_official	340:28d1f895c6fe	1141	===============================================================================
mbed_official	340:28d1f895c6fe	1142	##### Peripheral State and Errors functions #####
mbed_official	340:28d1f895c6fe	1143	===============================================================================
mbed_official	340:28d1f895c6fe	1144	[..]
mbed_official	340:28d1f895c6fe	1145	This subsection permits to get in run-time the status of the peripheral
mbed_official	340:28d1f895c6fe	1146	and the data flow.
mbed_official	340:28d1f895c6fe	1147
mbed_official	340:28d1f895c6fe	1148	@endverbatim
mbed_official	340:28d1f895c6fe	1149	* @{
mbed_official	340:28d1f895c6fe	1150	*/
mbed_official	340:28d1f895c6fe	1151
mbed_official	340:28d1f895c6fe	1152	/**
mbed_official	340:28d1f895c6fe	1153	* @brief Return the I2S state
mbed_official	340:28d1f895c6fe	1154	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1155	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1156	* @retval HAL state
mbed_official	340:28d1f895c6fe	1157	*/
mbed_official	340:28d1f895c6fe	1158	HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1159	{
mbed_official	340:28d1f895c6fe	1160	return hi2s->State;
mbed_official	340:28d1f895c6fe	1161	}
mbed_official	340:28d1f895c6fe	1162
mbed_official	340:28d1f895c6fe	1163	/**
mbed_official	340:28d1f895c6fe	1164	* @brief Return the I2S error code
mbed_official	340:28d1f895c6fe	1165	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1166	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1167	* @retval I2S Error Code
mbed_official	340:28d1f895c6fe	1168	*/
mbed_official	442:d2c15dda23c1	1169	uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1170	{
mbed_official	340:28d1f895c6fe	1171	return hi2s->ErrorCode;
mbed_official	340:28d1f895c6fe	1172	}
mbed_official	340:28d1f895c6fe	1173	/**
mbed_official	340:28d1f895c6fe	1174	* @}
mbed_official	340:28d1f895c6fe	1175	*/
mbed_official	340:28d1f895c6fe	1176
mbed_official	340:28d1f895c6fe	1177	/**
mbed_official	340:28d1f895c6fe	1178	* @}
mbed_official	340:28d1f895c6fe	1179	*/
mbed_official	340:28d1f895c6fe	1180
mbed_official	442:d2c15dda23c1	1181	/** @addtogroup I2S_Private_Functions I2S Private Functions
mbed_official	340:28d1f895c6fe	1182	* @{
mbed_official	340:28d1f895c6fe	1183	*/
mbed_official	340:28d1f895c6fe	1184	/**
mbed_official	340:28d1f895c6fe	1185	* @brief DMA I2S transmit process complete callback
mbed_official	340:28d1f895c6fe	1186	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1187	* the configuration information for the specified DMA module.
mbed_official	340:28d1f895c6fe	1188	* @retval None
mbed_official	340:28d1f895c6fe	1189	*/
mbed_official	340:28d1f895c6fe	1190	static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
mbed_official	340:28d1f895c6fe	1191	{
mbed_official	340:28d1f895c6fe	1192	I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
mbed_official	340:28d1f895c6fe	1193
mbed_official	340:28d1f895c6fe	1194	if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official	340:28d1f895c6fe	1195	{
mbed_official	340:28d1f895c6fe	1196	/* Disable Tx DMA Request */
mbed_official	340:28d1f895c6fe	1197	hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_TXDMAEN);
mbed_official	340:28d1f895c6fe	1198
mbed_official	340:28d1f895c6fe	1199	hi2s->TxXferCount = 0;
mbed_official	340:28d1f895c6fe	1200	hi2s->State = HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1201	}
mbed_official	340:28d1f895c6fe	1202	HAL_I2S_TxCpltCallback(hi2s);
mbed_official	340:28d1f895c6fe	1203	}
mbed_official	340:28d1f895c6fe	1204
mbed_official	340:28d1f895c6fe	1205	/**
mbed_official	340:28d1f895c6fe	1206	* @brief DMA I2S transmit process half complete callback
mbed_official	340:28d1f895c6fe	1207	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1208	* the configuration information for the specified DMA module.
mbed_official	340:28d1f895c6fe	1209	* @retval None
mbed_official	340:28d1f895c6fe	1210	*/
mbed_official	340:28d1f895c6fe	1211	static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official	340:28d1f895c6fe	1212	{
mbed_official	340:28d1f895c6fe	1213	I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
mbed_official	340:28d1f895c6fe	1214
mbed_official	340:28d1f895c6fe	1215	HAL_I2S_TxHalfCpltCallback(hi2s);
mbed_official	340:28d1f895c6fe	1216	}
mbed_official	340:28d1f895c6fe	1217
mbed_official	340:28d1f895c6fe	1218	/**
mbed_official	340:28d1f895c6fe	1219	* @brief DMA I2S receive process complete callback
mbed_official	340:28d1f895c6fe	1220	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1221	* the configuration information for the specified DMA module.
mbed_official	340:28d1f895c6fe	1222	* @retval None
mbed_official	340:28d1f895c6fe	1223	*/
mbed_official	340:28d1f895c6fe	1224	static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
mbed_official	340:28d1f895c6fe	1225	{
mbed_official	340:28d1f895c6fe	1226	I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	340:28d1f895c6fe	1227
mbed_official	340:28d1f895c6fe	1228	if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official	340:28d1f895c6fe	1229	{
mbed_official	340:28d1f895c6fe	1230	/* Disable Rx DMA Request */
mbed_official	340:28d1f895c6fe	1231	hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_RXDMAEN);
mbed_official	340:28d1f895c6fe	1232	hi2s->RxXferCount = 0;
mbed_official	340:28d1f895c6fe	1233	hi2s->State = HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1234	}
mbed_official	340:28d1f895c6fe	1235	HAL_I2S_RxCpltCallback(hi2s);
mbed_official	340:28d1f895c6fe	1236	}
mbed_official	340:28d1f895c6fe	1237
mbed_official	340:28d1f895c6fe	1238	/**
mbed_official	340:28d1f895c6fe	1239	* @brief DMA I2S receive process half complete callback
mbed_official	340:28d1f895c6fe	1240	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1241	* the configuration information for the specified DMA module.
mbed_official	340:28d1f895c6fe	1242	* @retval None
mbed_official	340:28d1f895c6fe	1243	*/
mbed_official	340:28d1f895c6fe	1244	static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official	340:28d1f895c6fe	1245	{
mbed_official	340:28d1f895c6fe	1246	I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
mbed_official	340:28d1f895c6fe	1247
mbed_official	340:28d1f895c6fe	1248	HAL_I2S_RxHalfCpltCallback(hi2s);
mbed_official	340:28d1f895c6fe	1249	}
mbed_official	340:28d1f895c6fe	1250
mbed_official	340:28d1f895c6fe	1251	/**
mbed_official	340:28d1f895c6fe	1252	* @brief DMA I2S communication error callback
mbed_official	340:28d1f895c6fe	1253	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1254	* the configuration information for the specified DMA module.
mbed_official	340:28d1f895c6fe	1255	* @retval None
mbed_official	340:28d1f895c6fe	1256	*/
mbed_official	340:28d1f895c6fe	1257	static void I2S_DMAError(DMA_HandleTypeDef *hdma)
mbed_official	340:28d1f895c6fe	1258	{
mbed_official	340:28d1f895c6fe	1259	I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	340:28d1f895c6fe	1260
mbed_official	340:28d1f895c6fe	1261	/* Disable Rx and Tx DMA Request */
mbed_official	340:28d1f895c6fe	1262	hi2s->Instance->CR2 &= (uint16_t)(~(SPI_CR2_RXDMAEN \| SPI_CR2_TXDMAEN));
mbed_official	340:28d1f895c6fe	1263	hi2s->TxXferCount = 0;
mbed_official	340:28d1f895c6fe	1264	hi2s->RxXferCount = 0;
mbed_official	340:28d1f895c6fe	1265
mbed_official	340:28d1f895c6fe	1266	hi2s->State= HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1267
mbed_official	340:28d1f895c6fe	1268	/* Set the error code and execute error callback*/
mbed_official	340:28d1f895c6fe	1269	hi2s->ErrorCode \|= HAL_I2S_ERROR_DMA;
mbed_official	340:28d1f895c6fe	1270	HAL_I2S_ErrorCallback(hi2s);
mbed_official	340:28d1f895c6fe	1271	}
mbed_official	340:28d1f895c6fe	1272
mbed_official	340:28d1f895c6fe	1273	/**
mbed_official	340:28d1f895c6fe	1274	* @brief Transmit an amount of data in non-blocking mode with Interrupt
mbed_official	340:28d1f895c6fe	1275	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1276	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1277	* @retval None
mbed_official	340:28d1f895c6fe	1278	*/
mbed_official	340:28d1f895c6fe	1279	static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1280	{
mbed_official	340:28d1f895c6fe	1281	/* Transmit data */
mbed_official	340:28d1f895c6fe	1282	hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
mbed_official	340:28d1f895c6fe	1283	hi2s->TxXferCount--;
mbed_official	340:28d1f895c6fe	1284
mbed_official	340:28d1f895c6fe	1285	if(hi2s->TxXferCount == 0)
mbed_official	340:28d1f895c6fe	1286	{
mbed_official	340:28d1f895c6fe	1287	/* Disable TXE and ERR interrupt */
mbed_official	340:28d1f895c6fe	1288	__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE \| I2S_IT_ERR));
mbed_official	340:28d1f895c6fe	1289
mbed_official	340:28d1f895c6fe	1290	hi2s->State = HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1291	HAL_I2S_TxCpltCallback(hi2s);
mbed_official	340:28d1f895c6fe	1292	}
mbed_official	340:28d1f895c6fe	1293	}
mbed_official	340:28d1f895c6fe	1294
mbed_official	340:28d1f895c6fe	1295	/**
mbed_official	340:28d1f895c6fe	1296	* @brief Receive an amount of data in non-blocking mode with Interrupt
mbed_official	340:28d1f895c6fe	1297	* @param hi2s: I2S handle
mbed_official	340:28d1f895c6fe	1298	* @retval None
mbed_official	340:28d1f895c6fe	1299	*/
mbed_official	340:28d1f895c6fe	1300	static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
mbed_official	340:28d1f895c6fe	1301	{
mbed_official	340:28d1f895c6fe	1302	/* Receive data */
mbed_official	340:28d1f895c6fe	1303	(*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
mbed_official	340:28d1f895c6fe	1304	hi2s->RxXferCount--;
mbed_official	340:28d1f895c6fe	1305
mbed_official	340:28d1f895c6fe	1306	if(hi2s->RxXferCount == 0)
mbed_official	340:28d1f895c6fe	1307	{
mbed_official	340:28d1f895c6fe	1308	/* Disable RXNE and ERR interrupt */
mbed_official	340:28d1f895c6fe	1309	__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE \| I2S_IT_ERR));
mbed_official	340:28d1f895c6fe	1310
mbed_official	340:28d1f895c6fe	1311	hi2s->State = HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1312	HAL_I2S_RxCpltCallback(hi2s);
mbed_official	340:28d1f895c6fe	1313	}
mbed_official	340:28d1f895c6fe	1314	}
mbed_official	340:28d1f895c6fe	1315
mbed_official	340:28d1f895c6fe	1316
mbed_official	340:28d1f895c6fe	1317	/**
mbed_official	340:28d1f895c6fe	1318	* @brief This function handles I2S Communication Timeout.
mbed_official	340:28d1f895c6fe	1319	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official	340:28d1f895c6fe	1320	* the configuration information for I2S module
mbed_official	340:28d1f895c6fe	1321	* @param Flag: Flag checked
mbed_official	340:28d1f895c6fe	1322	* @param State: Value of the flag expected
mbed_official	340:28d1f895c6fe	1323	* @param Timeout: Duration of the timeout
mbed_official	340:28d1f895c6fe	1324	* @retval HAL status
mbed_official	340:28d1f895c6fe	1325	*/
mbed_official	340:28d1f895c6fe	1326	static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout)
mbed_official	340:28d1f895c6fe	1327	{
mbed_official	340:28d1f895c6fe	1328	uint32_t tickstart = HAL_GetTick();
mbed_official	340:28d1f895c6fe	1329
mbed_official	340:28d1f895c6fe	1330	/* Wait until flag is set */
mbed_official	340:28d1f895c6fe	1331	if(State == RESET)
mbed_official	340:28d1f895c6fe	1332	{
mbed_official	340:28d1f895c6fe	1333	while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
mbed_official	340:28d1f895c6fe	1334	{
mbed_official	340:28d1f895c6fe	1335	if(Timeout != HAL_MAX_DELAY)
mbed_official	340:28d1f895c6fe	1336	{
mbed_official	340:28d1f895c6fe	1337	if((Timeout == 0) \|\| ((HAL_GetTick() - tickstart) > Timeout))
mbed_official	340:28d1f895c6fe	1338	{
mbed_official	340:28d1f895c6fe	1339	/* Set the I2S State ready */
mbed_official	340:28d1f895c6fe	1340	hi2s->State= HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1341
mbed_official	340:28d1f895c6fe	1342	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	1343	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	1344
mbed_official	340:28d1f895c6fe	1345	return HAL_TIMEOUT;
mbed_official	340:28d1f895c6fe	1346	}
mbed_official	340:28d1f895c6fe	1347	}
mbed_official	340:28d1f895c6fe	1348	}
mbed_official	340:28d1f895c6fe	1349	}
mbed_official	340:28d1f895c6fe	1350	else
mbed_official	340:28d1f895c6fe	1351	{
mbed_official	340:28d1f895c6fe	1352	while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
mbed_official	340:28d1f895c6fe	1353	{
mbed_official	340:28d1f895c6fe	1354	if(Timeout != HAL_MAX_DELAY)
mbed_official	340:28d1f895c6fe	1355	{
mbed_official	340:28d1f895c6fe	1356	if((Timeout == 0) \|\| ((HAL_GetTick() - tickstart) > Timeout))
mbed_official	340:28d1f895c6fe	1357	{
mbed_official	340:28d1f895c6fe	1358	/* Set the I2S State ready */
mbed_official	340:28d1f895c6fe	1359	hi2s->State= HAL_I2S_STATE_READY;
mbed_official	340:28d1f895c6fe	1360
mbed_official	340:28d1f895c6fe	1361	/* Process Unlocked */
mbed_official	340:28d1f895c6fe	1362	__HAL_UNLOCK(hi2s);
mbed_official	340:28d1f895c6fe	1363
mbed_official	340:28d1f895c6fe	1364	return HAL_TIMEOUT;
mbed_official	340:28d1f895c6fe	1365	}
mbed_official	340:28d1f895c6fe	1366	}
mbed_official	340:28d1f895c6fe	1367	}
mbed_official	340:28d1f895c6fe	1368	}
mbed_official	340:28d1f895c6fe	1369	return HAL_OK;
mbed_official	340:28d1f895c6fe	1370	}
mbed_official	340:28d1f895c6fe	1371
mbed_official	340:28d1f895c6fe	1372	/**
mbed_official	340:28d1f895c6fe	1373	* @}
mbed_official	340:28d1f895c6fe	1374	*/
mbed_official	340:28d1f895c6fe	1375
mbed_official	340:28d1f895c6fe	1376	/**
mbed_official	340:28d1f895c6fe	1377	* @}
mbed_official	340:28d1f895c6fe	1378	*/
mbed_official	340:28d1f895c6fe	1379
mbed_official	340:28d1f895c6fe	1380	/**
mbed_official	340:28d1f895c6fe	1381	* @}
mbed_official	340:28d1f895c6fe	1382	*/
mbed_official	340:28d1f895c6fe	1383
mbed_official	442:d2c15dda23c1	1384	#endif /* defined(STM32F031x6) \|\| defined(STM32F038xx) \|\| */
mbed_official	442:d2c15dda23c1	1385	/* defined(STM32F051x8) \|\| defined(STM32F058xx) \|\| */
mbed_official	442:d2c15dda23c1	1386	/* defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx) \|\| */
mbed_official	442:d2c15dda23c1	1387	/* defined(STM32F042x6) \|\| defined(STM32F048xx) \|\| */
mbed_official	442:d2c15dda23c1	1388	/* defined(STM32F091xC) \|\| defined(STM32F098xx) */
mbed_official	442:d2c15dda23c1	1389
mbed_official	442:d2c15dda23c1	1390	#endif /* HAL_I2S_MODULE_ENABLED */
mbed_official	442:d2c15dda23c1	1391
mbed_official	340:28d1f895c6fe	1392	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	23 Nov 2016
Imports:	0
Forks:	0
Commits:	637
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targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_i2s.c@636:a11c0372f0ba, 2015-09-30 (annotated)

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