ADE7912 | Mbed

Users » yuliyasm » Code » ADE7912 » Documentation
Embed: (wiki syntax)
Show/hide line numbers ADE7912.cpp Source File
00001 #include "ADE7912.h"
00002 #include "communication.h"
00003 #include "stm32h7xx_hal.h"
00004 
00005 
00006 
00007 uint8_t spiPackageTransmited = 0;
00008 uint8_t spiPackageReceived = 0;
00009 
00010 
00011 
00012 void ADE7912_WriteToReg(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, uint8_t addr, uint8_t *buf, uint8_t length);
00013 void ADE7912_ReadFromReg(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, uint8_t addr, uint8_t *buf, uint8_t length);
00014 uint8_t ADE7912_ReadADCVersionFromReg(struct ADE7912_Inst *ade, enum ADE7912_Phases phase);
00015 uint8_t ADE7912_ReadTemposFromReg(struct ADE7912_Inst *ade, enum ADE7912_Phases phase);
00016 //void ADE7912_InitEXTIForDReady(struct ADE7912_Inst *ade, GPIO_TypeDef *port, uint16_t pin);
00017 
00018 
00019 
00020 void ADE7912_WriteToReg(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, uint8_t addr, uint8_t *buf, uint8_t length)
00021 {
00022     HAL_GPIO_WritePin(ade->CS_ports[phase], ade->CS_pins[phase], GPIO_PIN_RESET);
00023     
00024     uint8_t addrBuf = addr | ADE7912_WRITE_MODE;
00025     WriteToRegisterBySPI(ade->spi, addrBuf, buf, length);
00026     
00027     HAL_GPIO_WritePin(ade->CS_ports[phase], ade->CS_pins[phase], GPIO_PIN_SET);
00028 }
00029 
00030 
00031 
00032 void ADE7912_ReadFromReg(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, uint8_t addr, uint8_t *buf, uint8_t length)
00033 {
00034     HAL_GPIO_WritePin(ade->CS_ports[phase], ade->CS_pins[phase], GPIO_PIN_RESET);
00035     
00036     uint8_t addrBuf = addr | ADE7912_READ_MODE;
00037     ReadFromRegisterBySPI(ade->spi, addrBuf, buf, length);
00038 
00039     HAL_GPIO_WritePin(ade->CS_ports[phase], ade->CS_pins[phase], GPIO_PIN_SET);
00040 }
00041 
00042 
00043 
00044 //void ADE7912_InitEXTIForDReady(struct ADE7912_Inst *ade, GPIO_TypeDef *port, uint16_t pin)
00045 //{
00046 //  ade->DReadyPort = port;
00047 //  ade->DReadyPin = pin;
00048 //  
00049 //  switch (pin)
00050 //  {
00051 //      case GPIO_PIN_0:
00052 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00053 //      break;
00054 //      case GPIO_PIN_1:
00055 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00056 //      break;
00057 //      case GPIO_PIN_2:
00058 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00059 //      break;
00060 //      case GPIO_PIN_3:
00061 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00062 //      break;
00063 //      case GPIO_PIN_4:
00064 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00065 //      break;
00066 //      case GPIO_PIN_5:
00067 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00068 //      break;
00069 //      case GPIO_PIN_6:
00070 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00071 //      break;
00072 //      case GPIO_PIN_7:
00073 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00074 //      break;
00075 //      case GPIO_PIN_8:
00076 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00077 //      break;
00078 //      case GPIO_PIN_9:
00079 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00080 //      break;
00081 //      case GPIO_PIN_10:
00082 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00083 //      break;
00084 //      case GPIO_PIN_11:
00085 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00086 //      break;
00087 //      case GPIO_PIN_12:
00088 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00089 //      break;
00090 //      case GPIO_PIN_13:
00091 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00092 //      break;
00093 //      case GPIO_PIN_14:
00094 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00095 //      break;
00096 //      case GPIO_PIN_15:
00097 //          ade->EXTIinterrupt = EXTI15_10_IRQn;
00098 //      break;
00099 //  }
00100 //  
00101 //  GPIO_InitTypeDef GPIO_InitStruct = {0};
00102 
00103 //  /* GPIO Ports Clock Enable */
00104 //  __HAL_RCC_GPIOA_CLK_ENABLE();
00105 
00106 //  /*Configure GPIO pin : PA11 */
00107 //  GPIO_InitStruct.Pin = pin;
00108 //  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
00109 //  GPIO_InitStruct.Pull = GPIO_NOPULL;
00110 //  HAL_GPIO_Init(port, &GPIO_InitStruct);
00111 
00112 //  /* EXTI interrupt init*/
00113 //  
00114 //  
00115 //  
00116 //  
00117 //  HAL_NVIC_SetPriority(EXTIinterrupt, 0, 0);
00118 //  HAL_NVIC_EnableIRQ(EXTIinterrupt);
00119 //}
00120 
00121 
00122 
00123 struct ADE7912_Inst* New_ADE7912(SPI_HandleTypeDef *spi)
00124 {
00125     struct ADE7912_Inst *ade = (struct ADE7912_Inst *)malloc(sizeof(struct ADE7912_Inst));
00126     ade->spi = spi;
00127     for(int phase = 0; phase < 4; phase += 1)
00128     {
00129         ade->CS_pins[phase] = NULL;
00130         ade->CS_ports[phase] = GPIOA;
00131         ade->phasesData[phase] = NULL;
00132         ade->phasesEnable[phase] = 0;
00133     }
00134     return ade;
00135 }
00136 
00137 
00138 
00139 void ADE7912_PhaseInit(struct ADE7912_Inst *ade, struct ADE7912_Phase_Settings *settings, enum ADE7912_Phases phase)
00140 {
00141     ade->CS_ports[phase] = settings->CS_port;
00142     ade->CS_pins[phase] = settings->CS_pin;
00143 
00144     ade->phasesData[phase] = (struct ADE7912_BrushRead_Data *)malloc(sizeof(struct ADE7912_BrushRead_Data));
00145     ade->phasesData[phase]->V1WV = 0;
00146     ade->phasesData[phase]->V2WV = 0;
00147     ade->phasesData[phase]->IWV = 0;
00148     ade->phasesData[phase]->ADC_CRC = 0;
00149     ade->phasesData[phase]->STATUS0 = 0;
00150     ade->phasesData[phase]->CNT_SNAPSHOT = 0;
00151     
00152     ADE7912_ResetPhase(ade, phase);
00153     
00154     ade->version[phase] = ADE7912_ReadADCVersionFromReg(ade, phase);
00155     
00156     ADE7912_SetDataUpdateFreq(ade, phase, settings->freq);
00157     
00158     ADE7912_SetPwrConverterEnabled(ade, phase, 1);
00159     
00160     ADE7912_SetTempEnabled(ade, phase, 0);
00161     
00162     ADE7912_SetBandwidth(ade, phase, settings->bandwidth);
00163     
00164     ade->tempGain[phase] = settings->bandwidth == BW_3K3HZ ? ADE7912_TEMPGAIN_WITH_3K3_BW : ADE7912_TEMPGAIN_WITH_2K_BW;
00165     
00166     ADE7912_SetCLKOUTFunctionality(ade, phase, settings->clkoutFunc);
00167     
00168     uint32_t tmp;
00169     tmp = ADE7912_ReadTemposFromReg(ade, phase) << 11;
00170     //if (tmp & 0x00040000) tmp = ~(~(tmp - 1) | 0x0007FFFF) + 1;
00171     ade->tempos[phase] = ADE7912_TEMPGAIN_WITH_3K3_BW * (float)tmp;
00172     
00173     ADE7912_EnablePhase(ade, phase);
00174     
00175 }
00176 
00177 
00178 
00179 void ADE7912_EnablePhase(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00180 {
00181     ade->phasesEnable[phase] = 1;
00182 }
00183 
00184 
00185 
00186 void ADE7912_DisablePhase(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00187 {
00188     ade->phasesEnable[phase] = 0;
00189 }
00190 
00191 void ADE7912_ResetPhase(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00192 {
00193     // Software reset start
00194     uint8_t buf;
00195     ADE7912_ReadFromReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1);
00196     
00197     buf |= ADE7912_CONFIG_BIT_SWRST;
00198     ADE7912_WriteToReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1);
00199     
00200     // Wait for reset finished
00201     while (1)
00202     {
00203         uint8_t buf;
00204         ADE7912_ReadFromReg(ade, phase, ADE7912_STATUS0_REG_ADDRESS, &buf, 1); 
00205         
00206         if (~buf & ADE7912_STATUS0_BIT_RESET_ON) break;
00207     }
00208 }
00209 
00210 uint8_t buf[14];
00211             uint32_t tmp;
00212 
00213 void ADE7912_UpdateData(struct ADE7912_Inst *ade)
00214 {
00215 
00216     
00217     for(int phase = 0; phase < 4; phase += 1)
00218     {
00219         if (ade->phasesEnable[phase])
00220         {
00221             ADE7912_ReadFromReg(ade, static_cast<ADE7912_Phases>(phase), ADE7912_BRUSH_READ_MODE, buf, 14);
00222             
00223 
00224             
00225             tmp = (buf[0] << 16) | (buf[1] << 8) | buf[2];
00226             if (tmp > 0x007FFFFF) tmp |= 0xFF000000; 
00227             ade->phasesData[phase]->IWV = (int32_t)tmp;
00228             
00229             tmp = (buf[3] << 16) | (buf[4] << 8) | buf[5];
00230             if (tmp > 0x007FFFFF) tmp |= 0xFF000000; 
00231             ade->phasesData[phase]->V1WV = (int32_t)tmp;
00232             
00233             tmp = (buf[6] << 16) | (buf[7] << 8) | buf[8];
00234             if (tmp > 0x007FFFFF) tmp |= 0xFF000000; 
00235             ade->phasesData[phase]->V2WV = (int32_t)tmp;
00236             
00237             ade->phasesData[phase]->ADC_CRC = (buf[9] << 8) | buf[10];
00238             ade->phasesData[phase]->STATUS0 = buf[11];
00239             ade->phasesData[phase]->CNT_SNAPSHOT = (buf[12] << 8) | buf[13];
00240         }
00241     }
00242 }
00243 
00244 
00245 
00246 int ADE7912_BrrushReadData(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, struct ADE7912_BrushRead_Data *data)
00247 {
00248     if (ade->phasesEnable[phase]) 
00249     {
00250         data->IWV = ade->phasesData[phase]->IWV;
00251         data->V1WV = ade->phasesData[phase]->V1WV;
00252         data->V2WV = ade->phasesData[phase]->V2WV;
00253         data->ADC_CRC = ade->phasesData[phase]->ADC_CRC;
00254         data->STATUS0 = ade->phasesData[phase]->STATUS0;
00255         data->CNT_SNAPSHOT = ade->phasesData[phase]->CNT_SNAPSHOT;
00256         
00257         return 0;
00258     } else return 1;
00259 }
00260 
00261 
00262 
00263 void ADE7912_SetDataUpdateFreq(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, enum ADE7912_DataUpdateFreq freq)
00264 {
00265     
00266     uint8_t buf;
00267     ADE7912_ReadFromReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00268     
00269     HAL_Delay(1);
00270     
00271     buf &= (uint8_t)~ADE7912_CONFIG_ADC_FREQ;
00272     switch(freq)
00273     {
00274         case F_8KHZ:
00275             buf |= ADE7912_CONFIG_ADC_FREQ_8K;
00276         break;
00277         case F_4KHZ:
00278             buf |= ADE7912_CONFIG_ADC_FREQ_4K;
00279         break;
00280         case F_2KHZ:
00281             buf |= ADE7912_CONFIG_ADC_FREQ_2K;
00282         break;
00283         case F_1KHZ:
00284             buf |= ADE7912_CONFIG_ADC_FREQ_1K;
00285         break;
00286     }
00287     ADE7912_WriteToReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00288 }
00289 
00290 
00291 
00292 uint8_t ADE7912_ReadADCVersionFromReg(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00293 {
00294     uint8_t buf;
00295     ADE7912_ReadFromReg(ade, phase, ADE7912_STATUS1_REG_ADDRESS, &buf, 1); 
00296     
00297     return buf & ADE7912_STATUS1_BIT_VERSION;
00298 }
00299 
00300 
00301 
00302 uint8_t ADE7912_ReadTemposFromReg(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00303 {
00304     uint8_t buf;
00305     ADE7912_ReadFromReg(ade, phase, ADE7912_TEMPOS_REG_ADDRESS, &buf, 1); 
00306     
00307     return buf;
00308 }
00309 
00310 
00311 
00312 void ADE7912_SetPwrConverterEnabled(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, bool enabled)
00313 {
00314     uint8_t buf;
00315     ADE7912_ReadFromReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00316     
00317     HAL_Delay(1);
00318     
00319     buf &= (uint8_t)~ADE7912_CONFIG_BIT_PWRDWNENB;
00320     buf |= enabled ? ADE7912_CONFIG_BIT_PWRDWNENB : 0;
00321     ADE7912_WriteToReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00322 }
00323 
00324 
00325 
00326 void ADE7912_SetTempEnabled(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, bool enabled)
00327 {
00328     uint8_t buf;
00329     ADE7912_ReadFromReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00330     
00331     HAL_Delay(1);
00332     
00333     buf &= (uint8_t)~ADE7912_CONFIG_BIT_TEMPENB;
00334     buf |= enabled ? ADE7912_CONFIG_BIT_TEMPENB : 0;
00335     ADE7912_WriteToReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00336 }
00337 
00338 
00339 
00340 void ADE7912_SetBandwidth(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, enum ADE7912_Bandwidths bandwidth)
00341 {
00342     uint8_t buf;
00343     ADE7912_ReadFromReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00344     
00345     HAL_Delay(1);
00346     
00347     buf &= (uint8_t)~ADE7912_CONFIG_BIT_BW;
00348     switch(bandwidth)
00349     {
00350         case BW_3K3HZ:
00351             buf |= 0;
00352         break;
00353         case BW_2KHZ:
00354             buf |= ADE7912_CONFIG_BIT_BW;
00355         break;
00356     }
00357     ADE7912_WriteToReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00358 }
00359 
00360 
00361 
00362 void ADE7912_LockConfigurationRegisters(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00363 {
00364     uint8_t buf = 0xCA;
00365     ADE7912_WriteToReg(ade, phase, ADE7912_LOCK_REG_ADDRESS, &buf, 1); 
00366 }
00367 
00368 
00369 
00370 void ADE7912_UnlockConfigurationRegisters(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00371 {
00372     uint8_t buf = 0x9C;
00373     ADE7912_WriteToReg(ade, phase, ADE7912_LOCK_REG_ADDRESS, &buf, 1); 
00374 }
00375 
00376 
00377 
00378 void ADE7912_SetCLKOUTFunctionality(struct ADE7912_Inst *ade, enum ADE7912_Phases phase, enum ADE7912_CLKOUT_Functionality functionality)
00379 {
00380     uint8_t buf;
00381     ADE7912_ReadFromReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00382     
00383     HAL_Delay(1);
00384     
00385     buf &= (uint8_t)~ADE7912_CONFIG_BIT_CLKOUTENB;
00386     switch(functionality)
00387     {
00388         case CLKOUT:
00389             buf |= ADE7912_CONFIG_BIT_CLKOUTENB;
00390         break;
00391         case DREADY:
00392             buf |= 0;
00393         break;
00394     }
00395     ADE7912_WriteToReg(ade, phase, ADE7912_CONFIG_REG_ADDRESS, &buf, 1); 
00396 }
00397 
00398 
00399 
00400 uint8_t ADE7912_GetADCVersion(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00401 {
00402     return ade->version[phase];
00403 }
00404 
00405 
00406 
00407 float ADE7912_GetVoltage(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00408 {
00409     if (ade->phasesEnable[phase] == 1) 
00410     {
00411         return ade->phasesData[phase]->V1WV * ADE7912_VWV_TRANSLATE_COEF;
00412     } else {
00413         return 0;
00414     }
00415 }
00416 
00417 
00418 
00419 float ADE7912_GetCurrent(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00420 {
00421     if (ade->phasesEnable[phase] == 1) 
00422     {
00423         return ade->phasesData[phase]->IWV * ADE7912_IWV_TRANSLATE_COEF;
00424     } else {
00425         return 0;
00426     }
00427 }
00428 
00429 
00430 
00431 float ADE7912_GetTemp(struct ADE7912_Inst *ade, enum ADE7912_Phases phase)
00432 {
00433     if (ade->phasesEnable[phase] == 1) 
00434     {
00435         return ade->tempGain[phase] * (float)ade->phasesData[phase]->V2WV - ade->tempos[phase] - ADE7912_CONST_TEMPOS;
00436     } else {
00437         return 0;
00438     }
00439 }
00440 
00441 
00442
Repository toolbox

Repository details

Type:	Library
Created:	21 Oct 2020
Imports:	1
Forks:	0
Commits:	4
Dependents:	1
Dependencies:	0
Followers:	2
Important changes to repositories hosted on mbed.com

ADE7912.cpp

Repository toolbox

Repository details

Important Information for this Arm website

Important changes to repositories hosted on mbed.com

ADE7912.cpp

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning
