This program is for OV7670 and TFT-LCD(REL225L01)

Dependencies:   mbed

Committer:
y_notsu
Date:
Thu Feb 16 14:51:28 2012 +0000
Revision:
0:03f32e3679c8

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
y_notsu 0:03f32e3679c8 1 #include "mbed.h"
y_notsu 0:03f32e3679c8 2 #include "OV7670.h"
y_notsu 0:03f32e3679c8 3 #include "REL225L01.h"
y_notsu 0:03f32e3679c8 4 REL225L01 tft;
y_notsu 0:03f32e3679c8 5
y_notsu 0:03f32e3679c8 6 DigitalOut myled1(LED1);
y_notsu 0:03f32e3679c8 7 DigitalOut myled2(LED2);
y_notsu 0:03f32e3679c8 8 DigitalOut myled3(LED3);
y_notsu 0:03f32e3679c8 9 DigitalOut myled4(LED4);
y_notsu 0:03f32e3679c8 10 InterruptIn VSYNC_IN(p5);
y_notsu 0:03f32e3679c8 11 DigitalOut CMOS_CS(p20);
y_notsu 0:03f32e3679c8 12 DigitalOut EN_EXCLK(p21);
y_notsu 0:03f32e3679c8 13 DigitalOut EN_595(p23);
y_notsu 0:03f32e3679c8 14 I2C i2c(p9,p10); //sda, scl
y_notsu 0:03f32e3679c8 15
y_notsu 0:03f32e3679c8 16
y_notsu 0:03f32e3679c8 17 void flip1()
y_notsu 0:03f32e3679c8 18 {
y_notsu 0:03f32e3679c8 19 EN_595 = 0;
y_notsu 0:03f32e3679c8 20 tft.lcd_cw_start();
y_notsu 0:03f32e3679c8 21 EN_595 = 1;
y_notsu 0:03f32e3679c8 22 EN_EXCLK = 1;
y_notsu 0:03f32e3679c8 23 CMOS_CS = 0;
y_notsu 0:03f32e3679c8 24 }
y_notsu 0:03f32e3679c8 25
y_notsu 0:03f32e3679c8 26 void flip2()
y_notsu 0:03f32e3679c8 27 {
y_notsu 0:03f32e3679c8 28 EN_595 = 0;
y_notsu 0:03f32e3679c8 29 tft.lcd_cw_end();
y_notsu 0:03f32e3679c8 30 EN_595 = 1;
y_notsu 0:03f32e3679c8 31 EN_EXCLK = 0;
y_notsu 0:03f32e3679c8 32 CMOS_CS = 1;
y_notsu 0:03f32e3679c8 33 }
y_notsu 0:03f32e3679c8 34
y_notsu 0:03f32e3679c8 35
y_notsu 0:03f32e3679c8 36 int main() {
y_notsu 0:03f32e3679c8 37 char cmd[2];
y_notsu 0:03f32e3679c8 38 CMOS_CS = 1;
y_notsu 0:03f32e3679c8 39 EN_EXCLK=0;
y_notsu 0:03f32e3679c8 40 EN_595=0;
y_notsu 0:03f32e3679c8 41 myled1=1;
y_notsu 0:03f32e3679c8 42 i2c.start();
y_notsu 0:03f32e3679c8 43 //
y_notsu 0:03f32e3679c8 44 //cmd[0] = REG_CLKRC; //
y_notsu 0:03f32e3679c8 45 //cmd[1] = 0x01; //Set Camera Active
y_notsu 0:03f32e3679c8 46 //i2c.write(OV7670_I2C_ADDR,cmd,2); // send string
y_notsu 0:03f32e3679c8 47 //wait(0.07); //could also pull,65ms is typical
y_notsu 0:03f32e3679c8 48
y_notsu 0:03f32e3679c8 49 regval_list *vals=ov7670_default_regs;
y_notsu 0:03f32e3679c8 50 //while(vals->reg_num!=0xff||vals->value!=0xff)
y_notsu 0:03f32e3679c8 51 while(vals->reg_num!=0xff||vals->value!=0xff)
y_notsu 0:03f32e3679c8 52 {
y_notsu 0:03f32e3679c8 53 cmd[0] = vals->reg_num;
y_notsu 0:03f32e3679c8 54 cmd[1] = vals->value;
y_notsu 0:03f32e3679c8 55 i2c.write(OV7670_I2C_ADDR,cmd,2);
y_notsu 0:03f32e3679c8 56 wait(0.01);
y_notsu 0:03f32e3679c8 57 vals++;
y_notsu 0:03f32e3679c8 58 }
y_notsu 0:03f32e3679c8 59
y_notsu 0:03f32e3679c8 60 vals=ov7670_fmt_rgb565;
y_notsu 0:03f32e3679c8 61 //while(vals->reg_num!=0xff||vals->value!=0xff)
y_notsu 0:03f32e3679c8 62 while(vals->reg_num!=0xff||vals->value!=0xff)
y_notsu 0:03f32e3679c8 63 {
y_notsu 0:03f32e3679c8 64 cmd[0] = vals->reg_num;
y_notsu 0:03f32e3679c8 65 cmd[1] = vals->value;
y_notsu 0:03f32e3679c8 66 i2c.write(OV7670_I2C_ADDR,cmd,2);
y_notsu 0:03f32e3679c8 67 wait(0.01);
y_notsu 0:03f32e3679c8 68 vals++;
y_notsu 0:03f32e3679c8 69 }
y_notsu 0:03f32e3679c8 70
y_notsu 0:03f32e3679c8 71 wait(2);
y_notsu 0:03f32e3679c8 72
y_notsu 0:03f32e3679c8 73 unsigned char v;
y_notsu 0:03f32e3679c8 74 // Horizontal setting: 11bits, top 8 live in hstart and hstop. Bottom 3 of
y_notsu 0:03f32e3679c8 75 // hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
y_notsu 0:03f32e3679c8 76 //a mystery "edge offset" value in the top two bit fo href.
y_notsu 0:03f32e3679c8 77
y_notsu 0:03f32e3679c8 78 cmd[0] = REG_HSTART;
y_notsu 0:03f32e3679c8 79 cmd[1] = (hstart>>3)&0xff;
y_notsu 0:03f32e3679c8 80 i2c.write(OV7670_I2C_ADDR,cmd,2);
y_notsu 0:03f32e3679c8 81 wait(0.01);
y_notsu 0:03f32e3679c8 82 cmd[0] = REG_HSTOP;
y_notsu 0:03f32e3679c8 83 cmd[1] = (hstop >> 3) & 0xff;
y_notsu 0:03f32e3679c8 84 i2c.write(OV7670_I2C_ADDR,cmd,2);
y_notsu 0:03f32e3679c8 85 //v = (0xb6 & 0xc0) | ((hstop & 0x07)<<3)| (hstart & 0x07);
y_notsu 0:03f32e3679c8 86 v = (0x80 & 0xc0) | ((hstop & 0x07)<<3)| (hstart & 0x07);
y_notsu 0:03f32e3679c8 87 wait(0.01);
y_notsu 0:03f32e3679c8 88 cmd[0] = REG_HREF;
y_notsu 0:03f32e3679c8 89 cmd[1] = v;
y_notsu 0:03f32e3679c8 90 i2c.write(OV7670_I2C_ADDR,cmd,2);
y_notsu 0:03f32e3679c8 91
y_notsu 0:03f32e3679c8 92 /*
y_notsu 0:03f32e3679c8 93 * Vertical : simillar arrangement, but only 10 bits
y_notsu 0:03f32e3679c8 94 */
y_notsu 0:03f32e3679c8 95 cmd[0] = REG_VSTART;
y_notsu 0:03f32e3679c8 96 cmd[1] = (vstart>>2)&0xff;
y_notsu 0:03f32e3679c8 97 i2c.write(OV7670_I2C_ADDR,cmd,2);
y_notsu 0:03f32e3679c8 98 wait(0.01);
y_notsu 0:03f32e3679c8 99 cmd[0] = REG_VSTOP;
y_notsu 0:03f32e3679c8 100 cmd[1] = (vstop >>2) & 0xff;
y_notsu 0:03f32e3679c8 101 i2c.write(OV7670_I2C_ADDR,cmd,2);
y_notsu 0:03f32e3679c8 102 v = (0x0a & 0xf0) | ((vstop & 0x03) <<2) | (vstart & 0x03);
y_notsu 0:03f32e3679c8 103 cmd[0] = REG_VREF;
y_notsu 0:03f32e3679c8 104 cmd[1] = v;
y_notsu 0:03f32e3679c8 105 wait(0.01);
y_notsu 0:03f32e3679c8 106 i2c.write(OV7670_I2C_ADDR,cmd,2);
y_notsu 0:03f32e3679c8 107 cmd[0] = REG_COM7;
y_notsu 0:03f32e3679c8 108 cmd[1] = COM7_FMT_QVGA | COM7_RGB;
y_notsu 0:03f32e3679c8 109 wait(0.01);
y_notsu 0:03f32e3679c8 110 i2c.write(OV7670_I2C_ADDR,cmd,2);
y_notsu 0:03f32e3679c8 111
y_notsu 0:03f32e3679c8 112 i2c.stop();
y_notsu 0:03f32e3679c8 113
y_notsu 0:03f32e3679c8 114 myled1=0;
y_notsu 0:03f32e3679c8 115 myled2=1;
y_notsu 0:03f32e3679c8 116 // TFT-LCD setting
y_notsu 0:03f32e3679c8 117 tft.lcd_init();
y_notsu 0:03f32e3679c8 118 tft.lcd_clear(BLUE);
y_notsu 0:03f32e3679c8 119 //wait(1);
y_notsu 0:03f32e3679c8 120 //tft.lcd_clear(RED);
y_notsu 0:03f32e3679c8 121 //wait(1);
y_notsu 0:03f32e3679c8 122 tft.lcd_cw_start();
y_notsu 0:03f32e3679c8 123 //Changing Internal/External WR, Data by VSYNC signal of CMOS Camera module
y_notsu 0:03f32e3679c8 124 //LCD module write period : 2sec
y_notsu 0:03f32e3679c8 125 EN_595 = 1;
y_notsu 0:03f32e3679c8 126
y_notsu 0:03f32e3679c8 127 VSYNC_IN.fall(&flip1);
y_notsu 0:03f32e3679c8 128 VSYNC_IN.rise(&flip2);
y_notsu 0:03f32e3679c8 129
y_notsu 0:03f32e3679c8 130 //wait(0.28);
y_notsu 0:03f32e3679c8 131
y_notsu 0:03f32e3679c8 132 //Stop Re-Display
y_notsu 0:03f32e3679c8 133 //tft.lcd_cw_end();
y_notsu 0:03f32e3679c8 134 //VSYNC_IN.fall(&flip2);
y_notsu 0:03f32e3679c8 135
y_notsu 0:03f32e3679c8 136 myled2=0;
y_notsu 0:03f32e3679c8 137 while(1) {
y_notsu 0:03f32e3679c8 138 myled3 = 1;
y_notsu 0:03f32e3679c8 139 wait(0.2);
y_notsu 0:03f32e3679c8 140 myled3 = 0;
y_notsu 0:03f32e3679c8 141 wait(0.2);
y_notsu 0:03f32e3679c8 142 }
y_notsu 0:03f32e3679c8 143 }