arm_scale_q7.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        19. March 2015
00005 * $Revision:    V.1.4.5
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_scale_q7.c    
00009 *    
00010 * Description:  Multiplies a Q7 vector by a scalar.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.  
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupMath    
00045  */
00046 
00047 /**    
00048  * @addtogroup scale    
00049  * @{    
00050  */
00051 
00052 /**    
00053  * @brief Multiplies a Q7 vector by a scalar.    
00054  * @param[in]       *pSrc points to the input vector    
00055  * @param[in]       scaleFract fractional portion of the scale value    
00056  * @param[in]       shift number of bits to shift the result by    
00057  * @param[out]      *pDst points to the output vector    
00058  * @param[in]       blockSize number of samples in the vector    
00059  * @return none.    
00060  *    
00061  * <b>Scaling and Overflow Behavior:</b>    
00062  * \par    
00063  * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.    
00064  * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.    
00065  */
00066 
00067 void arm_scale_q7(
00068   q7_t * pSrc,
00069   q7_t scaleFract,
00070   int8_t shift,
00071   q7_t * pDst,
00072   uint32_t blockSize)
00073 {
00074   int8_t kShift = 7 - shift;                     /* shift to apply after scaling */
00075   uint32_t blkCnt;                               /* loop counter */
00076 
00077 #ifndef ARM_MATH_CM0_FAMILY
00078 
00079 /* Run the below code for Cortex-M4 and Cortex-M3 */
00080   q7_t in1, in2, in3, in4, out1, out2, out3, out4;      /* Temporary variables to store input & output */
00081 
00082 
00083   /*loop Unrolling */
00084   blkCnt = blockSize >> 2u;
00085 
00086 
00087   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00088    ** a second loop below computes the remaining 1 to 3 samples. */
00089   while(blkCnt > 0u)
00090   {
00091     /* Reading 4 inputs from memory */
00092     in1 = *pSrc++;
00093     in2 = *pSrc++;
00094     in3 = *pSrc++;
00095     in4 = *pSrc++;
00096 
00097     /* C = A * scale */
00098     /* Scale the inputs and then store the results in the temporary variables. */
00099     out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
00100     out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
00101     out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
00102     out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
00103 
00104     /* Packing the individual outputs into 32bit and storing in    
00105      * destination buffer in single write */
00106     *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
00107 
00108     /* Decrement the loop counter */
00109     blkCnt--;
00110   }
00111 
00112   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
00113    ** No loop unrolling is used. */
00114   blkCnt = blockSize % 0x4u;
00115 
00116   while(blkCnt > 0u)
00117   {
00118     /* C = A * scale */
00119     /* Scale the input and then store the result in the destination buffer. */
00120     *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
00121 
00122     /* Decrement the loop counter */
00123     blkCnt--;
00124   }
00125 
00126 #else
00127 
00128   /* Run the below code for Cortex-M0 */
00129 
00130   /* Initialize blkCnt with number of samples */
00131   blkCnt = blockSize;
00132 
00133   while(blkCnt > 0u)
00134   {
00135     /* C = A * scale */
00136     /* Scale the input and then store the result in the destination buffer. */
00137     *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
00138 
00139     /* Decrement the loop counter */
00140     blkCnt--;
00141   }
00142 
00143 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00144 
00145 }
00146 
00147 /**    
00148  * @} end of scale group    
00149  */