arm_negate_f32.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        19. March 2015
00005 * $Revision:    V.1.4.5
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_negate_f32.c    
00009 *    
00010 * Description:  Negates floating-point vectors.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.  
00039 * ---------------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**        
00044  * @ingroup groupMath        
00045  */
00046 
00047 /**        
00048  * @defgroup negate Vector Negate        
00049  *        
00050  * Negates the elements of a vector.        
00051  *        
00052  * <pre>        
00053  *     pDst[n] = -pSrc[n],   0 <= n < blockSize.        
00054  * </pre>        
00055  *
00056  * The functions support in-place computation allowing the source and
00057  * destination pointers to reference the same memory buffer.
00058  * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
00059  */
00060 
00061 /**        
00062  * @addtogroup negate        
00063  * @{        
00064  */
00065 
00066 /**        
00067  * @brief  Negates the elements of a floating-point vector.        
00068  * @param[in]  *pSrc points to the input vector        
00069  * @param[out]  *pDst points to the output vector        
00070  * @param[in]  blockSize number of samples in the vector        
00071  * @return none.        
00072  */
00073 
00074 void arm_negate_f32(
00075   float32_t * pSrc,
00076   float32_t * pDst,
00077   uint32_t blockSize)
00078 {
00079   uint32_t blkCnt;                               /* loop counter */
00080 
00081 
00082 #ifndef ARM_MATH_CM0_FAMILY
00083 
00084 /* Run the below code for Cortex-M4 and Cortex-M3 */
00085   float32_t in1, in2, in3, in4;                  /* temporary variables */
00086 
00087   /*loop Unrolling */
00088   blkCnt = blockSize >> 2u;
00089 
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094     /* read inputs from source */
00095     in1 = *pSrc;
00096     in2 = *(pSrc + 1);
00097     in3 = *(pSrc + 2);
00098     in4 = *(pSrc + 3);
00099 
00100     /* negate the input */
00101     in1 = -in1;
00102     in2 = -in2;
00103     in3 = -in3;
00104     in4 = -in4;
00105 
00106     /* store the result to destination */
00107     *pDst = in1;
00108     *(pDst + 1) = in2;
00109     *(pDst + 2) = in3;
00110     *(pDst + 3) = in4;
00111 
00112     /* update pointers to process next samples */
00113     pSrc += 4u;
00114     pDst += 4u;
00115 
00116     /* Decrement the loop counter */
00117     blkCnt--;
00118   }
00119 
00120   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
00121    ** No loop unrolling is used. */
00122   blkCnt = blockSize % 0x4u;
00123 
00124 #else
00125 
00126   /* Run the below code for Cortex-M0 */
00127 
00128   /* Initialize blkCnt with number of samples */
00129   blkCnt = blockSize;
00130 
00131 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00132 
00133   while(blkCnt > 0u)
00134   {
00135     /* C = -A */
00136     /* Negate and then store the results in the destination buffer. */
00137     *pDst++ = -*pSrc++;
00138 
00139     /* Decrement the loop counter */
00140     blkCnt--;
00141   }
00142 }
00143 
00144 /**        
00145  * @} end of negate group        
00146  */