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targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K22F/drivers/fsl_vref.c@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
elessair 0:f269e3021894 1 /*
elessair 0:f269e3021894 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
elessair 0:f269e3021894 3 * All rights reserved.
elessair 0:f269e3021894 4 *
elessair 0:f269e3021894 5 * Redistribution and use in source and binary forms, with or without modification,
elessair 0:f269e3021894 6 * are permitted provided that the following conditions are met:
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * o Redistributions of source code must retain the above copyright notice, this list
elessair 0:f269e3021894 9 * of conditions and the following disclaimer.
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * o Redistributions in binary form must reproduce the above copyright notice, this
elessair 0:f269e3021894 12 * list of conditions and the following disclaimer in the documentation and/or
elessair 0:f269e3021894 13 * other materials provided with the distribution.
elessair 0:f269e3021894 14 *
elessair 0:f269e3021894 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
elessair 0:f269e3021894 16 * contributors may be used to endorse or promote products derived from this
elessair 0:f269e3021894 17 * software without specific prior written permission.
elessair 0:f269e3021894 18 *
elessair 0:f269e3021894 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
elessair 0:f269e3021894 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
elessair 0:f269e3021894 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elessair 0:f269e3021894 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
elessair 0:f269e3021894 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
elessair 0:f269e3021894 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
elessair 0:f269e3021894 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
elessair 0:f269e3021894 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
elessair 0:f269e3021894 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
elessair 0:f269e3021894 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elessair 0:f269e3021894 29 */
elessair 0:f269e3021894 30
elessair 0:f269e3021894 31 #include "fsl_vref.h"
elessair 0:f269e3021894 32
elessair 0:f269e3021894 33 /*******************************************************************************
elessair 0:f269e3021894 34 * Prototypes
elessair 0:f269e3021894 35 ******************************************************************************/
elessair 0:f269e3021894 36
elessair 0:f269e3021894 37 /*!
elessair 0:f269e3021894 38 * @brief Gets the instance from the base address
elessair 0:f269e3021894 39 *
elessair 0:f269e3021894 40 * @param base VREF peripheral base address
elessair 0:f269e3021894 41 *
elessair 0:f269e3021894 42 * @return The VREF instance
elessair 0:f269e3021894 43 */
elessair 0:f269e3021894 44 static uint32_t VREF_GetInstance(VREF_Type *base);
elessair 0:f269e3021894 45
elessair 0:f269e3021894 46 /*******************************************************************************
elessair 0:f269e3021894 47 * Variables
elessair 0:f269e3021894 48 ******************************************************************************/
elessair 0:f269e3021894 49
elessair 0:f269e3021894 50 /*! @brief Pointers to VREF bases for each instance. */
elessair 0:f269e3021894 51 static VREF_Type *const s_vrefBases[] = VREF_BASE_PTRS;
elessair 0:f269e3021894 52
elessair 0:f269e3021894 53 /*! @brief Pointers to VREF clocks for each instance. */
elessair 0:f269e3021894 54 static const clock_ip_name_t s_vrefClocks[] = VREF_CLOCKS;
elessair 0:f269e3021894 55
elessair 0:f269e3021894 56 /*******************************************************************************
elessair 0:f269e3021894 57 * Code
elessair 0:f269e3021894 58 ******************************************************************************/
elessair 0:f269e3021894 59
elessair 0:f269e3021894 60 static uint32_t VREF_GetInstance(VREF_Type *base)
elessair 0:f269e3021894 61 {
elessair 0:f269e3021894 62 uint32_t instance;
elessair 0:f269e3021894 63
elessair 0:f269e3021894 64 /* Find the instance index from base address mappings. */
elessair 0:f269e3021894 65 for (instance = 0; instance < FSL_FEATURE_SOC_VREF_COUNT; instance++)
elessair 0:f269e3021894 66 {
elessair 0:f269e3021894 67 if (s_vrefBases[instance] == base)
elessair 0:f269e3021894 68 {
elessair 0:f269e3021894 69 break;
elessair 0:f269e3021894 70 }
elessair 0:f269e3021894 71 }
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 assert(instance < FSL_FEATURE_SOC_VREF_COUNT);
elessair 0:f269e3021894 74
elessair 0:f269e3021894 75 return instance;
elessair 0:f269e3021894 76 }
elessair 0:f269e3021894 77
elessair 0:f269e3021894 78 void VREF_Init(VREF_Type *base, const vref_config_t *config)
elessair 0:f269e3021894 79 {
elessair 0:f269e3021894 80 assert(config != NULL);
elessair 0:f269e3021894 81
elessair 0:f269e3021894 82 uint8_t reg = 0U;
elessair 0:f269e3021894 83
elessair 0:f269e3021894 84 /* Ungate clock for VREF */
elessair 0:f269e3021894 85 CLOCK_EnableClock(s_vrefClocks[VREF_GetInstance(base)]);
elessair 0:f269e3021894 86
elessair 0:f269e3021894 87 /* Configure VREF to a known state */
elessair 0:f269e3021894 88 #if defined(FSL_FEATURE_VREF_HAS_CHOP_OSC) && FSL_FEATURE_VREF_HAS_CHOP_OSC
elessair 0:f269e3021894 89 /* Set chop oscillator bit */
elessair 0:f269e3021894 90 base->TRM |= VREF_TRM_CHOPEN_MASK;
elessair 0:f269e3021894 91 #endif /* FSL_FEATURE_VREF_HAS_CHOP_OSC */
elessair 0:f269e3021894 92 reg = base->SC;
elessair 0:f269e3021894 93 /* Set buffer Mode selection and Regulator enable bit */
elessair 0:f269e3021894 94 reg |= VREF_SC_MODE_LV(config->bufferMode) | VREF_SC_REGEN(1U);
elessair 0:f269e3021894 95 #if defined(FSL_FEATURE_VREF_HAS_COMPENSATION) && FSL_FEATURE_VREF_HAS_COMPENSATION
elessair 0:f269e3021894 96 /* Set second order curvature compensation enable bit */
elessair 0:f269e3021894 97 reg |= VREF_SC_ICOMPEN(1U);
elessair 0:f269e3021894 98 #endif /* FSL_FEATURE_VREF_HAS_COMPENSATION */
elessair 0:f269e3021894 99 /* Enable VREF module */
elessair 0:f269e3021894 100 reg |= VREF_SC_VREFEN(1U);
elessair 0:f269e3021894 101 /* Update bit-field from value to Status and Control register */
elessair 0:f269e3021894 102 base->SC = reg;
elessair 0:f269e3021894 103 #if defined(FSL_FEATURE_VREF_HAS_LOW_REFERENCE) && FSL_FEATURE_VREF_HAS_LOW_REFERENCE
elessair 0:f269e3021894 104 reg = base->VREFL_TRM;
elessair 0:f269e3021894 105 /* Clear old select external voltage reference and VREFL (0.4 V) reference buffer enable bits*/
elessair 0:f269e3021894 106 reg &= ~(VREF_VREFL_TRM_VREFL_EN_MASK | VREF_VREFL_TRM_VREFL_SEL_MASK);
elessair 0:f269e3021894 107 /* Select external voltage reference and set VREFL (0.4 V) reference buffer enable */
elessair 0:f269e3021894 108 reg |= VREF_VREFL_TRM_VREFL_SEL(config->enableExternalVoltRef) | VREF_VREFL_TRM_VREFL_EN(config->enableLowRef);
elessair 0:f269e3021894 109 base->VREFL_TRM = reg;
elessair 0:f269e3021894 110 #endif /* FSL_FEATURE_VREF_HAS_LOW_REFERENCE */
elessair 0:f269e3021894 111
elessair 0:f269e3021894 112 /* Wait until internal voltage stable */
elessair 0:f269e3021894 113 while ((base->SC & VREF_SC_VREFST_MASK) == 0)
elessair 0:f269e3021894 114 {
elessair 0:f269e3021894 115 }
elessair 0:f269e3021894 116 }
elessair 0:f269e3021894 117
elessair 0:f269e3021894 118 void VREF_Deinit(VREF_Type *base)
elessair 0:f269e3021894 119 {
elessair 0:f269e3021894 120 /* Gate clock for VREF */
elessair 0:f269e3021894 121 CLOCK_DisableClock(s_vrefClocks[VREF_GetInstance(base)]);
elessair 0:f269e3021894 122 }
elessair 0:f269e3021894 123
elessair 0:f269e3021894 124 void VREF_GetDefaultConfig(vref_config_t *config)
elessair 0:f269e3021894 125 {
elessair 0:f269e3021894 126 /* Set High power buffer mode in */
elessair 0:f269e3021894 127 #if defined(FSL_FEATURE_VREF_MODE_LV_TYPE) && FSL_FEATURE_VREF_MODE_LV_TYPE
elessair 0:f269e3021894 128 config->bufferMode = kVREF_ModeHighPowerBuffer;
elessair 0:f269e3021894 129 #else
elessair 0:f269e3021894 130 config->bufferMode = kVREF_ModeTightRegulationBuffer;
elessair 0:f269e3021894 131 #endif /* FSL_FEATURE_VREF_MODE_LV_TYPE */
elessair 0:f269e3021894 132
elessair 0:f269e3021894 133 #if defined(FSL_FEATURE_VREF_HAS_LOW_REFERENCE) && FSL_FEATURE_VREF_HAS_LOW_REFERENCE
elessair 0:f269e3021894 134 /* Select internal voltage reference */
elessair 0:f269e3021894 135 config->enableExternalVoltRef = false;
elessair 0:f269e3021894 136 /* Set VREFL (0.4 V) reference buffer disable */
elessair 0:f269e3021894 137 config->enableLowRef = false;
elessair 0:f269e3021894 138 #endif /* FSL_FEATURE_VREF_HAS_LOW_REFERENCE */
elessair 0:f269e3021894 139 }
elessair 0:f269e3021894 140
elessair 0:f269e3021894 141 void VREF_SetTrimVal(VREF_Type *base, uint8_t trimValue)
elessair 0:f269e3021894 142 {
elessair 0:f269e3021894 143 uint8_t reg = 0U;
elessair 0:f269e3021894 144
elessair 0:f269e3021894 145 /* Set TRIM bits value in voltage reference */
elessair 0:f269e3021894 146 reg = base->TRM;
elessair 0:f269e3021894 147 reg = ((reg & ~VREF_TRM_TRIM_MASK) | VREF_TRM_TRIM(trimValue));
elessair 0:f269e3021894 148 base->TRM = reg;
elessair 0:f269e3021894 149 /* Wait until internal voltage stable */
elessair 0:f269e3021894 150 while ((base->SC & VREF_SC_VREFST_MASK) == 0)
elessair 0:f269e3021894 151 {
elessair 0:f269e3021894 152 }
elessair 0:f269e3021894 153 }
elessair 0:f269e3021894 154
elessair 0:f269e3021894 155 #if defined(FSL_FEATURE_VREF_HAS_LOW_REFERENCE) && FSL_FEATURE_VREF_HAS_LOW_REFERENCE
elessair 0:f269e3021894 156 void VREF_SetLowReferenceTrimVal(VREF_Type *base, uint8_t trimValue)
elessair 0:f269e3021894 157 {
elessair 0:f269e3021894 158 /* The values 111b and 110b are NOT valid/allowed */
elessair 0:f269e3021894 159 assert((trimValue != 0x7U) && (trimValue != 0x6U));
elessair 0:f269e3021894 160
elessair 0:f269e3021894 161 uint8_t reg = 0U;
elessair 0:f269e3021894 162
elessair 0:f269e3021894 163 /* Set TRIM bits value in low voltage reference */
elessair 0:f269e3021894 164 reg = base->VREFL_TRM;
elessair 0:f269e3021894 165 reg = ((reg & ~VREF_VREFL_TRM_VREFL_TRIM_MASK) | VREF_VREFL_TRM_VREFL_TRIM(trimValue));
elessair 0:f269e3021894 166 base->VREFL_TRM = reg;
elessair 0:f269e3021894 167 /* Wait until internal voltage stable */
elessair 0:f269e3021894 168 while ((base->SC & VREF_SC_VREFST_MASK) == 0)
elessair 0:f269e3021894 169 {
elessair 0:f269e3021894 170 }
elessair 0:f269e3021894 171 }
elessair 0:f269e3021894 172 #endif /* FSL_FEATURE_VREF_HAS_LOW_REFERENCE */