arm_offset_q15.c

00001 /* ----------------------------------------------------------------------
00002  * Project:      CMSIS DSP Library
00003  * Title:        arm_offset_q15.c
00004  * Description:  Q15 vector offset
00005  *
00006  * $Date:        27. January 2017
00007  * $Revision:    V.1.5.1
00008  *
00009  * Target Processor: Cortex-M cores
00010  * -------------------------------------------------------------------- */
00011 /*
00012  * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
00013  *
00014  * SPDX-License-Identifier: Apache-2.0
00015  *
00016  * Licensed under the Apache License, Version 2.0 (the License); you may
00017  * not use this file except in compliance with the License.
00018  * You may obtain a copy of the License at
00019  *
00020  * www.apache.org/licenses/LICENSE-2.0
00021  *
00022  * Unless required by applicable law or agreed to in writing, software
00023  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00024  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00025  * See the License for the specific language governing permissions and
00026  * limitations under the License.
00027  */
00028 
00029 #include "arm_math.h"
00030 
00031 /**
00032  * @ingroup groupMath
00033  */
00034 
00035 /**
00036  * @addtogroup offset
00037  * @{
00038  */
00039 
00040 /**
00041  * @brief  Adds a constant offset to a Q15 vector.
00042  * @param[in]  *pSrc points to the input vector
00043  * @param[in]  offset is the offset to be added
00044  * @param[out]  *pDst points to the output vector
00045  * @param[in]  blockSize number of samples in the vector
00046  * @return none.
00047  *
00048  * <b>Scaling and Overflow Behavior:</b>
00049  * \par
00050  * The function uses saturating arithmetic.
00051  * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
00052  */
00053 
00054 void arm_offset_q15(
00055   q15_t * pSrc,
00056   q15_t offset,
00057   q15_t * pDst,
00058   uint32_t blockSize)
00059 {
00060   uint32_t blkCnt;                               /* loop counter */
00061 
00062 #if defined (ARM_MATH_DSP)
00063 
00064 /* Run the below code for Cortex-M4 and Cortex-M3 */
00065   q31_t offset_packed;                           /* Offset packed to 32 bit */
00066 
00067 
00068   /*loop Unrolling */
00069   blkCnt = blockSize >> 2U;
00070 
00071   /* Offset is packed to 32 bit in order to use SIMD32 for addition */
00072   offset_packed = __PKHBT(offset, offset, 16);
00073 
00074   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
00075    ** a second loop below computes the remaining 1 to 3 samples. */
00076   while (blkCnt > 0U)
00077   {
00078     /* C = A + offset */
00079     /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
00080     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
00081     *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
00082 
00083     /* Decrement the loop counter */
00084     blkCnt--;
00085   }
00086 
00087   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
00088    ** No loop unrolling is used. */
00089   blkCnt = blockSize % 0x4U;
00090 
00091   while (blkCnt > 0U)
00092   {
00093     /* C = A + offset */
00094     /* Add offset and then store the results in the destination buffer. */
00095     *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
00096 
00097     /* Decrement the loop counter */
00098     blkCnt--;
00099   }
00100 
00101 #else
00102 
00103   /* Run the below code for Cortex-M0 */
00104 
00105   /* Initialize blkCnt with number of samples */
00106   blkCnt = blockSize;
00107 
00108   while (blkCnt > 0U)
00109   {
00110     /* C = A + offset */
00111     /* Add offset and then store the results in the destination buffer. */
00112     *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
00113 
00114     /* Decrement the loop counter */
00115     blkCnt--;
00116   }
00117 
00118 #endif /* #if defined (ARM_MATH_DSP) */
00119 
00120 }
00121 
00122 /**
00123  * @} end of offset group
00124  */