Cooper Liu / RFSRF05

RF_defs.h@0:1e4910aeb884, 2012-03-14 (annotated)

Committer:
xiaxia686
Date:
Wed Mar 14 17:05:15 2012 +0000
Revision:
0:1e4910aeb884
RF + SRF05 libray

Who changed what in which revision?

UserRevisionLine numberNew contents of line
xiaxia686 0:1e4910aeb884 1 /*
xiaxia686 0:1e4910aeb884 2 * Open HR20
xiaxia686 0:1e4910aeb884 3 *
xiaxia686 0:1e4910aeb884 4 * target: ATmega169 @ 4 MHz in Honnywell Rondostat HR20E
xiaxia686 0:1e4910aeb884 5 *
xiaxia686 0:1e4910aeb884 6 * compiler: WinAVR-20071221
xiaxia686 0:1e4910aeb884 7 * avr-libc 1.6.0
xiaxia686 0:1e4910aeb884 8 * GCC 4.2.2
xiaxia686 0:1e4910aeb884 9 *
xiaxia686 0:1e4910aeb884 10 * copyright: 2008 Dario Carluccio (hr20-at-carluccio-dot-de)
xiaxia686 0:1e4910aeb884 11 * 2008 Jiri Dobry (jdobry-at-centrum-dot-cz)
xiaxia686 0:1e4910aeb884 12 * 2008 Mario Fischer (MarioFischer-at-gmx-dot-net)
xiaxia686 0:1e4910aeb884 13 * 2007 Michael Smola (Michael-dot-Smola-at-gmx-dot-net)
xiaxia686 0:1e4910aeb884 14 *
xiaxia686 0:1e4910aeb884 15 * license: This program is free software; you can redistribute it and/or
xiaxia686 0:1e4910aeb884 16 * modify it under the terms of the GNU Library General Public
xiaxia686 0:1e4910aeb884 17 * License as published by the Free Software Foundation; either
xiaxia686 0:1e4910aeb884 18 * version 2 of the License, or (at your option) any later version.
xiaxia686 0:1e4910aeb884 19 *
xiaxia686 0:1e4910aeb884 20 * This program is distributed in the hope that it will be useful,
xiaxia686 0:1e4910aeb884 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
xiaxia686 0:1e4910aeb884 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
xiaxia686 0:1e4910aeb884 23 * GNU General Public License for more details.
xiaxia686 0:1e4910aeb884 24 *
xiaxia686 0:1e4910aeb884 25 * You should have received a copy of the GNU General Public License
xiaxia686 0:1e4910aeb884 26 * along with this program. If not, see http:*www.gnu.org/licenses
xiaxia686 0:1e4910aeb884 27 */
xiaxia686 0:1e4910aeb884 28
xiaxia686 0:1e4910aeb884 29 /*
xiaxia686 0:1e4910aeb884 30 * \file rfm.h
xiaxia686 0:1e4910aeb884 31 * \brief functions to control the RFM12 Radio Transceiver Module
xiaxia686 0:1e4910aeb884 32 * \author Mario Fischer <MarioFischer-at-gmx-dot-net>; Michael Smola <Michael-dot-Smola-at-gmx-dot-net>
xiaxia686 0:1e4910aeb884 33 * \date $Date: 2010/04/17 17:57:02 $
xiaxia686 0:1e4910aeb884 34 * $Rev: 260 $
xiaxia686 0:1e4910aeb884 35 */
xiaxia686 0:1e4910aeb884 36
xiaxia686 0:1e4910aeb884 37
xiaxia686 0:1e4910aeb884 38 //#pragma once // multi-iclude prevention. gcc knows this pragma
xiaxia686 0:1e4910aeb884 39 #ifndef rfm_H
xiaxia686 0:1e4910aeb884 40 #define rfm_H
xiaxia686 0:1e4910aeb884 41
xiaxia686 0:1e4910aeb884 42
xiaxia686 0:1e4910aeb884 43 #define RFM_SPI_16(OUTVAL) rfm_spi16(OUTVAL) //<! a function that gets a uint16_t (clocked out value) and returns a uint16_t (clocked in value)
xiaxia686 0:1e4910aeb884 44
xiaxia686 0:1e4910aeb884 45 #define RFM_CLK_OUTPUT 0
xiaxia686 0:1e4910aeb884 46
xiaxia686 0:1e4910aeb884 47 /*
xiaxia686 0:1e4910aeb884 48 #define RFM_TESTPIN_INIT
xiaxia686 0:1e4910aeb884 49 #define RFM_TESTPIN_ON
xiaxia686 0:1e4910aeb884 50 #define RFM_TESTPIN_OFF
xiaxia686 0:1e4910aeb884 51 #define RFM_TESTPIN_TOG
xiaxia686 0:1e4910aeb884 52
xiaxia686 0:1e4910aeb884 53 #define RFM_CONFIG_DISABLE 0x00 //<! RFM_CONFIG_*** are combinable flags, what the RFM shold do
xiaxia686 0:1e4910aeb884 54 #define RFM_CONFIG_BROADCASTSTATUS 0x01 //<! Flag that enables the HR20's status broadcast every minute
xiaxia686 0:1e4910aeb884 55
xiaxia686 0:1e4910aeb884 56 #define RFM_CONFIG_ENABLEALL 0xff
xiaxia686 0:1e4910aeb884 57 */
xiaxia686 0:1e4910aeb884 58
xiaxia686 0:1e4910aeb884 59
xiaxia686 0:1e4910aeb884 60 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 61 //
xiaxia686 0:1e4910aeb884 62 // RFM status bits
xiaxia686 0:1e4910aeb884 63 //
xiaxia686 0:1e4910aeb884 64 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 65
xiaxia686 0:1e4910aeb884 66 // Interrupt bits, latched ////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 67
xiaxia686 0:1e4910aeb884 68 #define RFM_STATUS_FFIT 0x8000 // RX FIFO reached the progr. number of bits
xiaxia686 0:1e4910aeb884 69 // Cleared by any FIFO read method
xiaxia686 0:1e4910aeb884 70
xiaxia686 0:1e4910aeb884 71 #define RFM_STATUS_RGIT 0x8000 // TX register is ready to receive
xiaxia686 0:1e4910aeb884 72 // Cleared by TX write
xiaxia686 0:1e4910aeb884 73
xiaxia686 0:1e4910aeb884 74 #define RFM_STATUS_POR 0x4000 // Power On reset
xiaxia686 0:1e4910aeb884 75 // Cleared by read status
xiaxia686 0:1e4910aeb884 76
xiaxia686 0:1e4910aeb884 77 #define RFM_STATUS_RGUR 0x2000 // TX register underrun, register over write
xiaxia686 0:1e4910aeb884 78 // Cleared by read status
xiaxia686 0:1e4910aeb884 79
xiaxia686 0:1e4910aeb884 80 #define RFM_STATUS_FFOV 0x2000 // RX FIFO overflow
xiaxia686 0:1e4910aeb884 81 // Cleared by read status
xiaxia686 0:1e4910aeb884 82
xiaxia686 0:1e4910aeb884 83 #define RFM_STATUS_WKUP 0x1000 // Wake up timer overflow
xiaxia686 0:1e4910aeb884 84 // Cleared by read status
xiaxia686 0:1e4910aeb884 85
xiaxia686 0:1e4910aeb884 86 #define RFM_STATUS_EXT 0x0800 // Interupt changed to low
xiaxia686 0:1e4910aeb884 87 // Cleared by read status
xiaxia686 0:1e4910aeb884 88
xiaxia686 0:1e4910aeb884 89 #define RFM_STATUS_LBD 0x0400 // Low battery detect
xiaxia686 0:1e4910aeb884 90
xiaxia686 0:1e4910aeb884 91 // Status bits ////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 92
xiaxia686 0:1e4910aeb884 93 #define RFM_STATUS_FFEM 0x0200 // FIFO is empty
xiaxia686 0:1e4910aeb884 94 #define RFM_STATUS_ATS 0x0100 // TX mode: Strong enough RF signal
xiaxia686 0:1e4910aeb884 95 #define RFM_STATUS_RSSI 0x0100 // RX mode: signal strength above programmed limit
xiaxia686 0:1e4910aeb884 96 #define RFM_STATUS_DQD 0x0080 // Data Quality detector output
xiaxia686 0:1e4910aeb884 97 #define RFM_STATUS_CRL 0x0040 // Clock recovery lock
xiaxia686 0:1e4910aeb884 98 #define RFM_STATUS_ATGL 0x0020 // Toggling in each AFC cycle
xiaxia686 0:1e4910aeb884 99
xiaxia686 0:1e4910aeb884 100 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 101 //
xiaxia686 0:1e4910aeb884 102 // 1. Configuration Setting Command
xiaxia686 0:1e4910aeb884 103 //
xiaxia686 0:1e4910aeb884 104 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 105
xiaxia686 0:1e4910aeb884 106 #define RFM_CONFIG 0x8000
xiaxia686 0:1e4910aeb884 107
xiaxia686 0:1e4910aeb884 108 #define RFM_CONFIG_EL 0x8080 // Enable TX Register
xiaxia686 0:1e4910aeb884 109 #define RFM_CONFIG_EF 0x8040 // Enable RX FIFO buffer
xiaxia686 0:1e4910aeb884 110 #define RFM_CONFIG_BAND_315 0x8000 // Frequency band
xiaxia686 0:1e4910aeb884 111 #define RFM_CONFIG_BAND_433 0x8010
xiaxia686 0:1e4910aeb884 112 #define RFM_CONFIG_BAND_868 0x8020
xiaxia686 0:1e4910aeb884 113 #define RFM_CONFIG_BAND_915 0x8030
xiaxia686 0:1e4910aeb884 114 #define RFM_CONFIG_X_8_5pf 0x8000 // Crystal Load Capacitor
xiaxia686 0:1e4910aeb884 115 #define RFM_CONFIG_X_9_0pf 0x8001
xiaxia686 0:1e4910aeb884 116 #define RFM_CONFIG_X_9_5pf 0x8002
xiaxia686 0:1e4910aeb884 117 #define RFM_CONFIG_X_10_0pf 0x8003
xiaxia686 0:1e4910aeb884 118 #define RFM_CONFIG_X_10_5pf 0x8004
xiaxia686 0:1e4910aeb884 119 #define RFM_CONFIG_X_11_0pf 0x8005
xiaxia686 0:1e4910aeb884 120 #define RFM_CONFIG_X_11_5pf 0x8006
xiaxia686 0:1e4910aeb884 121 #define RFM_CONFIG_X_12_0pf 0x8007
xiaxia686 0:1e4910aeb884 122 #define RFM_CONFIG_X_12_5pf 0x8008
xiaxia686 0:1e4910aeb884 123 #define RFM_CONFIG_X_13_0pf 0x8009
xiaxia686 0:1e4910aeb884 124 #define RFM_CONFIG_X_13_5pf 0x800A
xiaxia686 0:1e4910aeb884 125 #define RFM_CONFIG_X_14_0pf 0x800B
xiaxia686 0:1e4910aeb884 126 #define RFM_CONFIG_X_14_5pf 0x800C
xiaxia686 0:1e4910aeb884 127 #define RFM_CONFIG_X_15_0pf 0x800D
xiaxia686 0:1e4910aeb884 128 #define RFM_CONFIG_X_15_5pf 0x800E
xiaxia686 0:1e4910aeb884 129 #define RFM_CONFIG_X_16_0pf 0x800F
xiaxia686 0:1e4910aeb884 130
xiaxia686 0:1e4910aeb884 131 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 132 //
xiaxia686 0:1e4910aeb884 133 // 2. Power Management Command
xiaxia686 0:1e4910aeb884 134 //
xiaxia686 0:1e4910aeb884 135 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 136
xiaxia686 0:1e4910aeb884 137 #define RFM_POWER_MANAGEMENT 0x8200
xiaxia686 0:1e4910aeb884 138
xiaxia686 0:1e4910aeb884 139 #define RFM_POWER_MANAGEMENT_ER 0x8280 // Enable receiver
xiaxia686 0:1e4910aeb884 140 #define RFM_POWER_MANAGEMENT_EBB 0x8240 // Enable base band block
xiaxia686 0:1e4910aeb884 141 #define RFM_POWER_MANAGEMENT_ET 0x8220 // Enable transmitter
xiaxia686 0:1e4910aeb884 142 #define RFM_POWER_MANAGEMENT_ES 0x8210 // Enable synthesizer
xiaxia686 0:1e4910aeb884 143 #define RFM_POWER_MANAGEMENT_EX 0x8208 // Enable crystal oscillator
xiaxia686 0:1e4910aeb884 144 #define RFM_POWER_MANAGEMENT_EB 0x8204 // Enable low battery detector
xiaxia686 0:1e4910aeb884 145 #define RFM_POWER_MANAGEMENT_EW 0x8202 // Enable wake-up timer
xiaxia686 0:1e4910aeb884 146 #define RFM_POWER_MANAGEMENT_DC 0x8201 // Disable clock output of CLK pin
xiaxia686 0:1e4910aeb884 147
xiaxia686 0:1e4910aeb884 148 #ifndef RFM_CLK_OUTPUT
xiaxia686 0:1e4910aeb884 149 #error RFM_CLK_OUTPUT must be defined to 0 or 1
xiaxia686 0:1e4910aeb884 150 #endif
xiaxia686 0:1e4910aeb884 151 #if RFM_CLK_OUTPUT
xiaxia686 0:1e4910aeb884 152 #define RFM_TX_ON_PRE() RFM_SPI_16( \
xiaxia686 0:1e4910aeb884 153 RFM_POWER_MANAGEMENT_ES | \
xiaxia686 0:1e4910aeb884 154 RFM_POWER_MANAGEMENT_EX )
xiaxia686 0:1e4910aeb884 155 #define RFM_TX_ON() RFM_SPI_16( \
xiaxia686 0:1e4910aeb884 156 RFM_POWER_MANAGEMENT_ET | \
xiaxia686 0:1e4910aeb884 157 RFM_POWER_MANAGEMENT_ES | \
xiaxia686 0:1e4910aeb884 158 RFM_POWER_MANAGEMENT_EX )
xiaxia686 0:1e4910aeb884 159 #define RFM_RX_ON() RFM_SPI_16( \
xiaxia686 0:1e4910aeb884 160 RFM_POWER_MANAGEMENT_ER | \
xiaxia686 0:1e4910aeb884 161 RFM_POWER_MANAGEMENT_EBB | \
xiaxia686 0:1e4910aeb884 162 RFM_POWER_MANAGEMENT_ES | \
xiaxia686 0:1e4910aeb884 163 RFM_POWER_MANAGEMENT_EX )
xiaxia686 0:1e4910aeb884 164 #define RFM_OFF() RFM_SPI_16( \
xiaxia686 0:1e4910aeb884 165 RFM_POWER_MANAGEMENT_EX )
xiaxia686 0:1e4910aeb884 166 #else
xiaxia686 0:1e4910aeb884 167 #define RFM_TX_ON_PRE() RFM_SPI_16( \
xiaxia686 0:1e4910aeb884 168 RFM_POWER_MANAGEMENT_DC | \
xiaxia686 0:1e4910aeb884 169 RFM_POWER_MANAGEMENT_ES | \
xiaxia686 0:1e4910aeb884 170 RFM_POWER_MANAGEMENT_EX )
xiaxia686 0:1e4910aeb884 171 #define RFM_TX_ON() RFM_SPI_16( \
xiaxia686 0:1e4910aeb884 172 RFM_POWER_MANAGEMENT_DC | \
xiaxia686 0:1e4910aeb884 173 RFM_POWER_MANAGEMENT_ET | \
xiaxia686 0:1e4910aeb884 174 RFM_POWER_MANAGEMENT_ES | \
xiaxia686 0:1e4910aeb884 175 RFM_POWER_MANAGEMENT_EX )
xiaxia686 0:1e4910aeb884 176 #define RFM_RX_ON() RFM_SPI_16( \
xiaxia686 0:1e4910aeb884 177 RFM_POWER_MANAGEMENT_DC | \
xiaxia686 0:1e4910aeb884 178 RFM_POWER_MANAGEMENT_ER | \
xiaxia686 0:1e4910aeb884 179 RFM_POWER_MANAGEMENT_EBB | \
xiaxia686 0:1e4910aeb884 180 RFM_POWER_MANAGEMENT_ES | \
xiaxia686 0:1e4910aeb884 181 RFM_POWER_MANAGEMENT_EX )
xiaxia686 0:1e4910aeb884 182 #define RFM_OFF() RFM_SPI_16(RFM_POWER_MANAGEMENT_DC)
xiaxia686 0:1e4910aeb884 183 #endif
xiaxia686 0:1e4910aeb884 184 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 185 //
xiaxia686 0:1e4910aeb884 186 // 3. Frequency Setting Command
xiaxia686 0:1e4910aeb884 187 //
xiaxia686 0:1e4910aeb884 188 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 189
xiaxia686 0:1e4910aeb884 190 #define RFM_FREQUENCY 0xA000
xiaxia686 0:1e4910aeb884 191
xiaxia686 0:1e4910aeb884 192 #define RFM_FREQ_315Band(v) (uint16_t)((v/10.0-31)*4000)
xiaxia686 0:1e4910aeb884 193 #define RFM_FREQ_433Band(v) (uint16_t)((v/10.0-43)*4000)
xiaxia686 0:1e4910aeb884 194 #define RFM_FREQ_868Band(v) (uint16_t)((v/20.0-43)*4000)
xiaxia686 0:1e4910aeb884 195 #define RFM_FREQ_915Band(v) (uint16_t)((v/30.0-30)*4000)
xiaxia686 0:1e4910aeb884 196
xiaxia686 0:1e4910aeb884 197 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 198 //
xiaxia686 0:1e4910aeb884 199 // 4. Data Rate Command
xiaxia686 0:1e4910aeb884 200 //
xiaxia686 0:1e4910aeb884 201 /////////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 202
xiaxia686 0:1e4910aeb884 203 #define RFM_BAUD_RATE 9600
xiaxia686 0:1e4910aeb884 204
xiaxia686 0:1e4910aeb884 205 #define RFM_DATA_RATE 0xC600
xiaxia686 0:1e4910aeb884 206
xiaxia686 0:1e4910aeb884 207 #define RFM_DATA_RATE_CS 0xC680
xiaxia686 0:1e4910aeb884 208 #define RFM_DATA_RATE_4800 0xC647
xiaxia686 0:1e4910aeb884 209 #define RFM_DATA_RATE_9600 0xC623
xiaxia686 0:1e4910aeb884 210 #define RFM_DATA_RATE_19200 0xC611
xiaxia686 0:1e4910aeb884 211 #define RFM_DATA_RATE_38400 0xC608
xiaxia686 0:1e4910aeb884 212 #define RFM_DATA_RATE_57600 0xC605
xiaxia686 0:1e4910aeb884 213
xiaxia686 0:1e4910aeb884 214 #define RFM_SET_DATARATE(baud) ( ((baud)<5400) ? (RFM_DATA_RATE_CS|((43104/(baud))-1)) : (RFM_DATA_RATE|((344828UL/(baud))-1)) )
xiaxia686 0:1e4910aeb884 215
xiaxia686 0:1e4910aeb884 216 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 217 //
xiaxia686 0:1e4910aeb884 218 // 5. Receiver Control Command
xiaxia686 0:1e4910aeb884 219 //
xiaxia686 0:1e4910aeb884 220 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 221
xiaxia686 0:1e4910aeb884 222 #define RFM_RX_CONTROL 0x9000
xiaxia686 0:1e4910aeb884 223
xiaxia686 0:1e4910aeb884 224 #define RFM_RX_CONTROL_P20_INT 0x9000 // Pin20 = ExternalInt
xiaxia686 0:1e4910aeb884 225 #define RFM_RX_CONTROL_P20_VDI 0x9400 // Pin20 = VDI out
xiaxia686 0:1e4910aeb884 226
xiaxia686 0:1e4910aeb884 227 #define RFM_RX_CONTROL_VDI_FAST 0x9000 // fast VDI Response time
xiaxia686 0:1e4910aeb884 228 #define RFM_RX_CONTROL_VDI_MED 0x9100 // medium
xiaxia686 0:1e4910aeb884 229 #define RFM_RX_CONTROL_VDI_SLOW 0x9200 // slow
xiaxia686 0:1e4910aeb884 230 #define RFM_RX_CONTROL_VDI_ON 0x9300 // Always on
xiaxia686 0:1e4910aeb884 231
xiaxia686 0:1e4910aeb884 232 #define RFM_RX_CONTROL_BW_400 0x9020 // bandwidth 400kHz
xiaxia686 0:1e4910aeb884 233 #define RFM_RX_CONTROL_BW_340 0x9040 // bandwidth 340kHz
xiaxia686 0:1e4910aeb884 234 #define RFM_RX_CONTROL_BW_270 0x9060 // bandwidth 270kHz
xiaxia686 0:1e4910aeb884 235 #define RFM_RX_CONTROL_BW_200 0x9080 // bandwidth 200kHz
xiaxia686 0:1e4910aeb884 236 #define RFM_RX_CONTROL_BW_134 0x90A0 // bandwidth 134kHz
xiaxia686 0:1e4910aeb884 237 #define RFM_RX_CONTROL_BW_67 0x90C0 // bandwidth 67kHz
xiaxia686 0:1e4910aeb884 238
xiaxia686 0:1e4910aeb884 239 #define RFM_RX_CONTROL_GAIN_0 0x9000 // LNA gain 0db
xiaxia686 0:1e4910aeb884 240 #define RFM_RX_CONTROL_GAIN_6 0x9008 // LNA gain -6db
xiaxia686 0:1e4910aeb884 241 #define RFM_RX_CONTROL_GAIN_14 0x9010 // LNA gain -14db
xiaxia686 0:1e4910aeb884 242 #define RFM_RX_CONTROL_GAIN_20 0x9018 // LNA gain -20db
xiaxia686 0:1e4910aeb884 243
xiaxia686 0:1e4910aeb884 244 #define RFM_RX_CONTROL_RSSI_103 0x9000 // DRSSI threshold -103dbm
xiaxia686 0:1e4910aeb884 245 #define RFM_RX_CONTROL_RSSI_97 0x9001 // DRSSI threshold -97dbm
xiaxia686 0:1e4910aeb884 246 #define RFM_RX_CONTROL_RSSI_91 0x9002 // DRSSI threshold -91dbm
xiaxia686 0:1e4910aeb884 247 #define RFM_RX_CONTROL_RSSI_85 0x9003 // DRSSI threshold -85dbm
xiaxia686 0:1e4910aeb884 248 #define RFM_RX_CONTROL_RSSI_79 0x9004 // DRSSI threshold -79dbm
xiaxia686 0:1e4910aeb884 249 #define RFM_RX_CONTROL_RSSI_73 0x9005 // DRSSI threshold -73dbm
xiaxia686 0:1e4910aeb884 250 //#define RFM_RX_CONTROL_RSSI_67 0x9006 // DRSSI threshold -67dbm // RF12B reserved
xiaxia686 0:1e4910aeb884 251 //#define RFM_RX_CONTROL_RSSI_61 0x9007 // DRSSI threshold -61dbm // RF12B reserved
xiaxia686 0:1e4910aeb884 252
xiaxia686 0:1e4910aeb884 253 #define RFM_RX_CONTROL_BW(baud) (((baud)<8000) ? \
xiaxia686 0:1e4910aeb884 254 RFM_RX_CONTROL_BW_67 : \
xiaxia686 0:1e4910aeb884 255 ( \
xiaxia686 0:1e4910aeb884 256 ((baud)<30000) ? \
xiaxia686 0:1e4910aeb884 257 RFM_RX_CONTROL_BW_134 : \
xiaxia686 0:1e4910aeb884 258 RFM_RX_CONTROL_BW_200 \
xiaxia686 0:1e4910aeb884 259 ))
xiaxia686 0:1e4910aeb884 260
xiaxia686 0:1e4910aeb884 261 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 262 //
xiaxia686 0:1e4910aeb884 263 // 6. Data Filter Command
xiaxia686 0:1e4910aeb884 264 //
xiaxia686 0:1e4910aeb884 265 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 266
xiaxia686 0:1e4910aeb884 267 #define RFM_DATA_FILTER 0xC228
xiaxia686 0:1e4910aeb884 268
xiaxia686 0:1e4910aeb884 269 #define RFM_DATA_FILTER_AL 0xC2A8 // clock recovery auto-lock
xiaxia686 0:1e4910aeb884 270 #define RFM_DATA_FILTER_ML 0xC268 // clock recovery fast mode
xiaxia686 0:1e4910aeb884 271 #define RFM_DATA_FILTER_DIG 0xC228 // data filter type digital
xiaxia686 0:1e4910aeb884 272 #define RFM_DATA_FILTER_ANALOG 0xC238 // data filter type analog
xiaxia686 0:1e4910aeb884 273 #define RFM_DATA_FILTER_DQD(level) (RFM_DATA_FILTER | (level & 0x7))
xiaxia686 0:1e4910aeb884 274
xiaxia686 0:1e4910aeb884 275 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 276 //
xiaxia686 0:1e4910aeb884 277 // 7. FIFO and Reset Mode Command
xiaxia686 0:1e4910aeb884 278 //
xiaxia686 0:1e4910aeb884 279 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 280
xiaxia686 0:1e4910aeb884 281 #define RFM_FIFO 0xCA00
xiaxia686 0:1e4910aeb884 282
xiaxia686 0:1e4910aeb884 283 #define RFM_FIFO_AL 0xCA04 // FIFO Start condition sync-word/always
xiaxia686 0:1e4910aeb884 284 #define RFM_FIFO_FF 0xCA02 // Enable FIFO fill
xiaxia686 0:1e4910aeb884 285 #define RFM_FIFO_DR 0xCA01 // Disable hi sens reset mode
xiaxia686 0:1e4910aeb884 286 #define RFM_FIFO_IT(level) (RFM_FIFO | (( (level) & 0xF)<<4))
xiaxia686 0:1e4910aeb884 287
xiaxia686 0:1e4910aeb884 288 #define RFM_FIFO_OFF() RFM_SPI_16(RFM_FIFO_IT(8) | RFM_FIFO_DR)
xiaxia686 0:1e4910aeb884 289 #define RFM_FIFO_ON() RFM_SPI_16(RFM_FIFO_IT(8) | RFM_FIFO_FF | RFM_FIFO_DR)
xiaxia686 0:1e4910aeb884 290
xiaxia686 0:1e4910aeb884 291 /////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 292 //
xiaxia686 0:1e4910aeb884 293 // 8. Receiver FIFO Read
xiaxia686 0:1e4910aeb884 294 //
xiaxia686 0:1e4910aeb884 295 /////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 296
xiaxia686 0:1e4910aeb884 297 #define RFM_READ_FIFO() (RFM_SPI_16(0xB000) & 0xFF)
xiaxia686 0:1e4910aeb884 298
xiaxia686 0:1e4910aeb884 299 /////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 300 //
xiaxia686 0:1e4910aeb884 301 // 9. AFC Command
xiaxia686 0:1e4910aeb884 302 //
xiaxia686 0:1e4910aeb884 303 /////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 304
xiaxia686 0:1e4910aeb884 305 #define RFM_AFC 0xC400
xiaxia686 0:1e4910aeb884 306
xiaxia686 0:1e4910aeb884 307 #define RFM_AFC_EN 0xC401
xiaxia686 0:1e4910aeb884 308 #define RFM_AFC_OE 0xC402
xiaxia686 0:1e4910aeb884 309 #define RFM_AFC_FI 0xC404
xiaxia686 0:1e4910aeb884 310 #define RFM_AFC_ST 0xC408
xiaxia686 0:1e4910aeb884 311
xiaxia686 0:1e4910aeb884 312 // Limits the value of the frequency offset register to the next values:
xiaxia686 0:1e4910aeb884 313
xiaxia686 0:1e4910aeb884 314 #define RFM_AFC_RANGE_LIMIT_NO 0xC400 // 0: No restriction
xiaxia686 0:1e4910aeb884 315 #define RFM_AFC_RANGE_LIMIT_15_16 0xC410 // 1: +15 fres to -16 fres
xiaxia686 0:1e4910aeb884 316 #define RFM_AFC_RANGE_LIMIT_7_8 0xC420 // 2: +7 fres to -8 fres
xiaxia686 0:1e4910aeb884 317 #define RFM_AFC_RANGE_LIMIT_3_4 0xC430 // 3: +3 fres to -4 fres
xiaxia686 0:1e4910aeb884 318
xiaxia686 0:1e4910aeb884 319 // fres=2.5 kHz in 315MHz and 433MHz Bands
xiaxia686 0:1e4910aeb884 320 // fres=5.0 kHz in 868MHz Band
xiaxia686 0:1e4910aeb884 321 // fres=7.5 kHz in 915MHz Band
xiaxia686 0:1e4910aeb884 322
xiaxia686 0:1e4910aeb884 323 #define RFM_AFC_AUTO_OFF 0xC400 // 0: Auto mode off (Strobe is controlled by microcontroller)
xiaxia686 0:1e4910aeb884 324 #define RFM_AFC_AUTO_ONCE 0xC440 // 1: Runs only once after each power-up
xiaxia686 0:1e4910aeb884 325 #define RFM_AFC_AUTO_VDI 0xC480 // 2: Keep the foffset only during receiving(VDI=high)
xiaxia686 0:1e4910aeb884 326 #define RFM_AFC_AUTO_INDEPENDENT 0xC4C0 // 3: Keep the foffset value independently trom the state of the VDI signal
xiaxia686 0:1e4910aeb884 327
xiaxia686 0:1e4910aeb884 328 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 329 //
xiaxia686 0:1e4910aeb884 330 // 10. TX Configuration Control Command
xiaxia686 0:1e4910aeb884 331 //
xiaxia686 0:1e4910aeb884 332 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 333
xiaxia686 0:1e4910aeb884 334 #define RFM_TX_CONTROL 0x9800
xiaxia686 0:1e4910aeb884 335
xiaxia686 0:1e4910aeb884 336 #define RFM_TX_CONTROL_POW_0 0x9800
xiaxia686 0:1e4910aeb884 337 #define RFM_TX_CONTROL_POW_3 0x9801
xiaxia686 0:1e4910aeb884 338 #define RFM_TX_CONTROL_POW_6 0x9802
xiaxia686 0:1e4910aeb884 339 #define RFM_TX_CONTROL_POW_9 0x9803
xiaxia686 0:1e4910aeb884 340 #define RFM_TX_CONTROL_POW_12 0x9804
xiaxia686 0:1e4910aeb884 341 #define RFM_TX_CONTROL_POW_15 0x9805
xiaxia686 0:1e4910aeb884 342 #define RFM_TX_CONTROL_POW_18 0x9806
xiaxia686 0:1e4910aeb884 343 #define RFM_TX_CONTROL_POW_21 0x9807
xiaxia686 0:1e4910aeb884 344 #define RFM_TX_CONTROL_MOD_15 0x9800
xiaxia686 0:1e4910aeb884 345 #define RFM_TX_CONTROL_MOD_30 0x9810
xiaxia686 0:1e4910aeb884 346 #define RFM_TX_CONTROL_MOD_45 0x9820
xiaxia686 0:1e4910aeb884 347 #define RFM_TX_CONTROL_MOD_60 0x9830
xiaxia686 0:1e4910aeb884 348 #define RFM_TX_CONTROL_MOD_75 0x9840
xiaxia686 0:1e4910aeb884 349 #define RFM_TX_CONTROL_MOD_90 0x9850
xiaxia686 0:1e4910aeb884 350 #define RFM_TX_CONTROL_MOD_105 0x9860
xiaxia686 0:1e4910aeb884 351 #define RFM_TX_CONTROL_MOD_120 0x9870
xiaxia686 0:1e4910aeb884 352 #define RFM_TX_CONTROL_MOD_135 0x9880
xiaxia686 0:1e4910aeb884 353 #define RFM_TX_CONTROL_MOD_150 0x9890
xiaxia686 0:1e4910aeb884 354 #define RFM_TX_CONTROL_MOD_165 0x98A0
xiaxia686 0:1e4910aeb884 355 #define RFM_TX_CONTROL_MOD_180 0x98B0
xiaxia686 0:1e4910aeb884 356 #define RFM_TX_CONTROL_MOD_195 0x98C0
xiaxia686 0:1e4910aeb884 357 #define RFM_TX_CONTROL_MOD_210 0x98D0
xiaxia686 0:1e4910aeb884 358 #define RFM_TX_CONTROL_MOD_225 0x98E0
xiaxia686 0:1e4910aeb884 359 #define RFM_TX_CONTROL_MOD_240 0x98F0
xiaxia686 0:1e4910aeb884 360 #define RFM_TX_CONTROL_MP 0x9900
xiaxia686 0:1e4910aeb884 361
xiaxia686 0:1e4910aeb884 362 #define RFM_TX_CONTROL_MOD(baud) (((baud)<8000) ? \
xiaxia686 0:1e4910aeb884 363 RFM_TX_CONTROL_MOD_45 : \
xiaxia686 0:1e4910aeb884 364 ( \
xiaxia686 0:1e4910aeb884 365 ((baud)<20000) ? \
xiaxia686 0:1e4910aeb884 366 RFM_TX_CONTROL_MOD_60 : \
xiaxia686 0:1e4910aeb884 367 ( \
xiaxia686 0:1e4910aeb884 368 ((baud)<30000) ? \
xiaxia686 0:1e4910aeb884 369 RFM_TX_CONTROL_MOD_75 : \
xiaxia686 0:1e4910aeb884 370 ( \
xiaxia686 0:1e4910aeb884 371 ((baud)<40000) ? \
xiaxia686 0:1e4910aeb884 372 RFM_TX_CONTROL_MOD_90 : \
xiaxia686 0:1e4910aeb884 373 RFM_TX_CONTROL_MOD_120 \
xiaxia686 0:1e4910aeb884 374 ) \
xiaxia686 0:1e4910aeb884 375 ) \
xiaxia686 0:1e4910aeb884 376 ))
xiaxia686 0:1e4910aeb884 377
xiaxia686 0:1e4910aeb884 378 /////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 379 //
xiaxia686 0:1e4910aeb884 380 // 11. Transmitter Register Write Command
xiaxia686 0:1e4910aeb884 381 //
xiaxia686 0:1e4910aeb884 382 /////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 383
xiaxia686 0:1e4910aeb884 384 //#define RFM_WRITE(byte) RFM_SPI_16(0xB800 | ((byte) & 0xFF))
xiaxia686 0:1e4910aeb884 385 #define RFM_WRITE(byte) RFM_SPI_16(0xB800 | (byte) )
xiaxia686 0:1e4910aeb884 386
xiaxia686 0:1e4910aeb884 387 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 388 //
xiaxia686 0:1e4910aeb884 389 // 12. Wake-up Timer Command
xiaxia686 0:1e4910aeb884 390 //
xiaxia686 0:1e4910aeb884 391 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 392
xiaxia686 0:1e4910aeb884 393 #define RFM_WAKEUP_TIMER 0xE000
xiaxia686 0:1e4910aeb884 394 #define RFM_WAKEUP_SET(time) RFM_SPI_16(RFM_WAKEUP_TIMER | (time))
xiaxia686 0:1e4910aeb884 395
xiaxia686 0:1e4910aeb884 396 #define RFM_WAKEUP_480s (RFM_WAKEUP_TIMER |(11 << 8)| 234)
xiaxia686 0:1e4910aeb884 397 #define RFM_WAKEUP_240s (RFM_WAKEUP_TIMER |(10 << 8)| 234)
xiaxia686 0:1e4910aeb884 398 #define RFM_WAKEUP_120s (RFM_WAKEUP_TIMER |(9 << 8)| 234)
xiaxia686 0:1e4910aeb884 399 #define RFM_WAKEUP_119s (RFM_WAKEUP_TIMER |(9 << 8)| 232)
xiaxia686 0:1e4910aeb884 400
xiaxia686 0:1e4910aeb884 401 #define RFM_WAKEUP_60s (RFM_WAKEUP_TIMER |(8 << 8) | 235)
xiaxia686 0:1e4910aeb884 402 #define RFM_WAKEUP_59s (RFM_WAKEUP_TIMER |(8 << 8) | 230)
xiaxia686 0:1e4910aeb884 403
xiaxia686 0:1e4910aeb884 404 #define RFM_WAKEUP_30s (RFM_WAKEUP_TIMER |(7 << 8) | 235)
xiaxia686 0:1e4910aeb884 405 #define RFM_WAKEUP_29s (RFM_WAKEUP_TIMER |(7 << 8) | 227)
xiaxia686 0:1e4910aeb884 406
xiaxia686 0:1e4910aeb884 407 #define RFM_WAKEUP_8s (RFM_WAKEUP_TIMER |(5 << 8) | 250)
xiaxia686 0:1e4910aeb884 408 #define RFM_WAKEUP_7s (RFM_WAKEUP_TIMER |(5 << 8) | 219)
xiaxia686 0:1e4910aeb884 409 #define RFM_WAKEUP_6s (RFM_WAKEUP_TIMER |(6 << 8) | 94)
xiaxia686 0:1e4910aeb884 410 #define RFM_WAKEUP_5s (RFM_WAKEUP_TIMER |(5 << 8) | 156)
xiaxia686 0:1e4910aeb884 411 #define RFM_WAKEUP_4s (RFM_WAKEUP_TIMER |(5 << 8) | 125)
xiaxia686 0:1e4910aeb884 412 #define RFM_WAKEUP_1s (RFM_WAKEUP_TIMER |(2 << 8) | 250)
xiaxia686 0:1e4910aeb884 413 #define RFM_WAKEUP_900ms (RFM_WAKEUP_TIMER |(2 << 8) | 225)
xiaxia686 0:1e4910aeb884 414 #define RFM_WAKEUP_800ms (RFM_WAKEUP_TIMER |(2 << 8) | 200)
xiaxia686 0:1e4910aeb884 415 #define RFM_WAKEUP_700ms (RFM_WAKEUP_TIMER |(2 << 8) | 175)
xiaxia686 0:1e4910aeb884 416 #define RFM_WAKEUP_600ms (RFM_WAKEUP_TIMER |(2 << 8) | 150)
xiaxia686 0:1e4910aeb884 417 #define RFM_WAKEUP_500ms (RFM_WAKEUP_TIMER |(2 << 8) | 125)
xiaxia686 0:1e4910aeb884 418 #define RFM_WAKEUP_400ms (RFM_WAKEUP_TIMER |(2 << 8) | 100)
xiaxia686 0:1e4910aeb884 419 #define RFM_WAKEUP_300ms (RFM_WAKEUP_TIMER |(2 << 8) | 75)
xiaxia686 0:1e4910aeb884 420 #define RFM_WAKEUP_200ms (RFM_WAKEUP_TIMER |(2 << 8) | 50)
xiaxia686 0:1e4910aeb884 421 #define RFM_WAKEUP_100ms (RFM_WAKEUP_TIMER |(2 << 8) | 25)
xiaxia686 0:1e4910aeb884 422
xiaxia686 0:1e4910aeb884 423 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 424 //
xiaxia686 0:1e4910aeb884 425 // 13. Low Duty-Cycle Command
xiaxia686 0:1e4910aeb884 426 //
xiaxia686 0:1e4910aeb884 427 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 428
xiaxia686 0:1e4910aeb884 429 #define RFM_LOW_DUTY_CYCLE 0xC800
xiaxia686 0:1e4910aeb884 430
xiaxia686 0:1e4910aeb884 431 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 432 //
xiaxia686 0:1e4910aeb884 433 // 14. Low Battery Detector Command
xiaxia686 0:1e4910aeb884 434 //
xiaxia686 0:1e4910aeb884 435 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 436
xiaxia686 0:1e4910aeb884 437 #define RFM_LOW_BATT_DETECT 0xC000
xiaxia686 0:1e4910aeb884 438 #define RFM_LOW_BATT_DETECT_D_1MHZ 0xC000
xiaxia686 0:1e4910aeb884 439 #define RFM_LOW_BATT_DETECT_D_1_25MHZ 0xC020
xiaxia686 0:1e4910aeb884 440 #define RFM_LOW_BATT_DETECT_D_1_66MHZ 0xC040
xiaxia686 0:1e4910aeb884 441 #define RFM_LOW_BATT_DETECT_D_2MHZ 0xC060
xiaxia686 0:1e4910aeb884 442 #define RFM_LOW_BATT_DETECT_D_2_5MHZ 0xC080
xiaxia686 0:1e4910aeb884 443 #define RFM_LOW_BATT_DETECT_D_3_33MHZ 0xC0A0
xiaxia686 0:1e4910aeb884 444 #define RFM_LOW_BATT_DETECT_D_5MHZ 0xC0C0
xiaxia686 0:1e4910aeb884 445 #define RFM_LOW_BATT_DETECT_D_10MHZ 0xC0E0
xiaxia686 0:1e4910aeb884 446
xiaxia686 0:1e4910aeb884 447 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 448 //
xiaxia686 0:1e4910aeb884 449 // 15. Status Read Command
xiaxia686 0:1e4910aeb884 450 //
xiaxia686 0:1e4910aeb884 451 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 452
xiaxia686 0:1e4910aeb884 453 #define RFM_READ_STATUS() RFM_SPI_16(0x0000)
xiaxia686 0:1e4910aeb884 454 #define RFM_READ_STATUS_FFIT() SPI_1 (0x00)
xiaxia686 0:1e4910aeb884 455 #define RFM_READ_STATUS_RGIT RFM_READ_STATUS_FFIT
xiaxia686 0:1e4910aeb884 456
xiaxia686 0:1e4910aeb884 457 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 458
xiaxia686 0:1e4910aeb884 459 // RFM air protocol flags:
xiaxia686 0:1e4910aeb884 460
xiaxia686 0:1e4910aeb884 461 #define RFMPROTO_FLAGS_BITASK_PACKETTYPE 0b11000000 //!< the uppermost 2 bits of the flags field encode the packettype
xiaxia686 0:1e4910aeb884 462 #define RFMPROTO_FLAGS_PACKETTYPE_BROADCAST 0b00000000 //!< broadcast packettype (message from hr20, protocol; step 1)
xiaxia686 0:1e4910aeb884 463 #define RFMPROTO_FLAGS_PACKETTYPE_COMMAND 0b01000000 //!< command packettype (message to hr20, protocol; step 2)
xiaxia686 0:1e4910aeb884 464 #define RFMPROTO_FLAGS_PACKETTYPE_REPLY 0b10000000 //!< reply packettype (message from hr20, protocol; step 3)
xiaxia686 0:1e4910aeb884 465 #define RFMPROTO_FLAGS_PACKETTYPE_SPECIAL 0b11000000 //!< currently unused packettype
xiaxia686 0:1e4910aeb884 466
xiaxia686 0:1e4910aeb884 467 #define RFMPROTO_FLAGS_BITASK_DEVICETYPE 0b00011111 //!< the lowermost 5 bytes denote the device type. this way other sensors and actors may coexist
xiaxia686 0:1e4910aeb884 468 #define RFMPROTO_FLAGS_DEVICETYPE_OPENHR20 0b00010100 //!< topen HR20 device type. 10100 is for decimal 20
xiaxia686 0:1e4910aeb884 469
xiaxia686 0:1e4910aeb884 470 #define RFMPROTO_IS_PACKETTYPE_BROADCAST(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_BROADCAST == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
xiaxia686 0:1e4910aeb884 471 #define RFMPROTO_IS_PACKETTYPE_COMMAND(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_COMMAND == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
xiaxia686 0:1e4910aeb884 472 #define RFMPROTO_IS_PACKETTYPE_REPLY(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_REPLY == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
xiaxia686 0:1e4910aeb884 473 #define RFMPROTO_IS_PACKETTYPE_SPECIAL(FLAGS) ( RFMPROTO_FLAGS_PACKETTYPE_SPECIAL == ((FLAGS) & RFMPROTO_FLAGS_BITASK_PACKETTYPE) )
xiaxia686 0:1e4910aeb884 474 #define RFMPROTO_IS_DEVICETYPE_OPENHR20(FLAGS) ( RFMPROTO_FLAGS_DEVICETYPE_OPENHR20 == ((FLAGS) & RFMPROTO_FLAGS_BITASK_DEVICETYPE) )
xiaxia686 0:1e4910aeb884 475
xiaxia686 0:1e4910aeb884 476 ///////////////////////////////////////////////////////////////////////////////
xiaxia686 0:1e4910aeb884 477
xiaxia686 0:1e4910aeb884 478 #endif