Raphael Kwon / Ethernet

BSD style socket API for W5500.

Dependencies:   W5500

Dependents:   W5500_Porting_WIZnetLib W5500_Porting_WIZnetLib W5500_Porting_WIZnetLib_LPC800

Fork of Ethernet by Raphael Kwon

wizchip_conf.h@2:ee0f7508fb5c, 2014-02-18 (annotated)

Committer:
xeon011
Date:
Tue Feb 18 05:41:48 2014 +0000
Revision:
2:ee0f7508fb5c
Parent:
0:9158fe13dc14 
First release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
xeon011 0:9158fe13dc14 1 //*****************************************************************************
xeon011 0:9158fe13dc14 2 //
xeon011 0:9158fe13dc14 3 //! \file wizchip_conf.h
xeon011 0:9158fe13dc14 4 //! \brief WIZCHIP Config Header File.
xeon011 0:9158fe13dc14 5 //! \version 1.0.0
xeon011 0:9158fe13dc14 6 //! \date 2013/10/01
xeon011 0:9158fe13dc14 7 //! \par Revision history
xeon011 0:9158fe13dc14 8 //! <2013/10/01> 1st Release
xeon011 0:9158fe13dc14 9 //! \author MidnightCow
xeon011 0:9158fe13dc14 10 //! \copyright
xeon011 0:9158fe13dc14 11 //!
xeon011 0:9158fe13dc14 12 //! Copyright (c) 2013, WIZnet Co., LTD.
xeon011 0:9158fe13dc14 13 //! All rights reserved.
xeon011 0:9158fe13dc14 14 //!
xeon011 0:9158fe13dc14 15 //! Redistribution and use in source and binary forms, with or without
xeon011 0:9158fe13dc14 16 //! modification, are permitted provided that the following conditions
xeon011 0:9158fe13dc14 17 //! are met:
xeon011 0:9158fe13dc14 18 //!
xeon011 0:9158fe13dc14 19 //! * Redistributions of source code must retain the above copyright
xeon011 0:9158fe13dc14 20 //! notice, this list of conditions and the following disclaimer.
xeon011 0:9158fe13dc14 21 //! * Redistributions in binary form must reproduce the above copyright
xeon011 0:9158fe13dc14 22 //! notice, this list of conditions and the following disclaimer in the
xeon011 0:9158fe13dc14 23 //! documentation and/or other materials provided with the distribution.
xeon011 0:9158fe13dc14 24 //! * Neither the name of the <ORGANIZATION> nor the names of its
xeon011 0:9158fe13dc14 25 //! contributors may be used to endorse or promote products derived
xeon011 0:9158fe13dc14 26 //! from this software without specific prior written permission.
xeon011 0:9158fe13dc14 27 //!
xeon011 0:9158fe13dc14 28 //! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
xeon011 0:9158fe13dc14 29 //! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
xeon011 0:9158fe13dc14 30 //! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
xeon011 0:9158fe13dc14 31 //! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
xeon011 0:9158fe13dc14 32 //! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
xeon011 0:9158fe13dc14 33 //! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
xeon011 0:9158fe13dc14 34 //! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
xeon011 0:9158fe13dc14 35 //! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
xeon011 0:9158fe13dc14 36 //! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
xeon011 0:9158fe13dc14 37 //! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
xeon011 0:9158fe13dc14 38 //! THE POSSIBILITY OF SUCH DAMAGE.
xeon011 0:9158fe13dc14 39 //
xeon011 0:9158fe13dc14 40 //*****************************************************************************
xeon011 0:9158fe13dc14 41
xeon011 0:9158fe13dc14 42 /**
xeon011 0:9158fe13dc14 43 * @defgroup extra_functions 2. WIZnet Extra Functions
xeon011 0:9158fe13dc14 44 *
xeon011 0:9158fe13dc14 45 * @brief These functions is optional function. It could be replaced at WIZCHIP I/O function because they were made by WIZCHIP I/O functions.
xeon011 0:9158fe13dc14 46 * @details There are functions of configuring WIZCHIP, network, interrupt, phy, network information and timer. \n
xeon011 0:9158fe13dc14 47 *
xeon011 0:9158fe13dc14 48 */
xeon011 0:9158fe13dc14 49 #ifdef __cplusplus
xeon011 0:9158fe13dc14 50 extern "C" {
xeon011 0:9158fe13dc14 51 #endif
xeon011 0:9158fe13dc14 52
xeon011 0:9158fe13dc14 53 #ifndef _WIZCHIP_CONF_H_
xeon011 0:9158fe13dc14 54 #define _WIZCHIP_CONF_H_
xeon011 0:9158fe13dc14 55
xeon011 0:9158fe13dc14 56 #include <stdint.h>
xeon011 0:9158fe13dc14 57 /**
xeon011 0:9158fe13dc14 58 * @brief Select WIZCHIP.
xeon011 0:9158fe13dc14 59 * @todo You should select one, \b 5100, \b 5200 ,\b 5500 or etc. \n\n
xeon011 0:9158fe13dc14 60 * ex> <code> #define \_WIZCHIP_ 5500 </code>
xeon011 0:9158fe13dc14 61 */
xeon011 0:9158fe13dc14 62 #define _WIZCHIP_ 5500 // 5100, 5200, 5500
xeon011 0:9158fe13dc14 63
xeon011 0:9158fe13dc14 64 #define _WIZCHIP_IO_MODE_NONE_ 0x0000
xeon011 0:9158fe13dc14 65 #define _WIZCHIP_IO_MODE_BUS_ 0x0100 /**< Bus interface mode */
xeon011 0:9158fe13dc14 66 #define _WIZCHIP_IO_MODE_SPI_ 0x0200 /**< SPI interface mode */
xeon011 0:9158fe13dc14 67 //#define _WIZCHIP_IO_MODE_IIC_ 0x0400
xeon011 0:9158fe13dc14 68 //#define _WIZCHIP_IO_MODE_SDIO_ 0x0800
xeon011 0:9158fe13dc14 69 // Add to
xeon011 0:9158fe13dc14 70 //
xeon011 0:9158fe13dc14 71
xeon011 0:9158fe13dc14 72 #define _WIZCHIP_IO_MODE_BUS_DIR_ (_WIZCHIP_IO_MODE_BUS_ + 1) /**< BUS interface mode for direct */
xeon011 0:9158fe13dc14 73 #define _WIZCHIP_IO_MODE_BUS_INDIR_ (_WIZCHIP_IO_MODE_BUS_ + 2) /**< BUS interface mode for indirect */
xeon011 0:9158fe13dc14 74
xeon011 0:9158fe13dc14 75 #define _WIZCHIP_IO_MODE_SPI_VDM_ (_WIZCHIP_IO_MODE_SPI_ + 1) /**< SPI interface mode for variable length data*/
xeon011 0:9158fe13dc14 76 #define _WIZCHIP_IO_MODE_SPI_FDM_ (_WIZCHIP_IO_MODE_SPI_ + 2) /**< SPI interface mode for fixed length data mode*/
xeon011 0:9158fe13dc14 77
xeon011 0:9158fe13dc14 78
xeon011 0:9158fe13dc14 79 #if (_WIZCHIP_ == 5100)
xeon011 0:9158fe13dc14 80 #define _WIZCHIP_ID_ "W5100\0"
xeon011 0:9158fe13dc14 81 /**
xeon011 0:9158fe13dc14 82 * @brief Define interface mode.
xeon011 0:9158fe13dc14 83 * @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ , @ref \_WIZCHIP_IO_MODE_BUS_DIR_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_
xeon011 0:9158fe13dc14 84 */
xeon011 0:9158fe13dc14 85
xeon011 0:9158fe13dc14 86 // #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_DIR_
xeon011 0:9158fe13dc14 87 // #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_INDIR_
xeon011 0:9158fe13dc14 88 #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_
xeon011 0:9158fe13dc14 89
xeon011 0:9158fe13dc14 90 #elif (_WIZCHIP_ == 5200)
xeon011 0:9158fe13dc14 91 #define _WIZCHIP_ID_ "W5200\0"
xeon011 0:9158fe13dc14 92 /**
xeon011 0:9158fe13dc14 93 * @brief Define interface mode.
xeon011 0:9158fe13dc14 94 * @todo you should select interface mode as chip. Select one of @ref \_WIZCHIP_IO_MODE_SPI_ or @ref \_WIZCHIP_IO_MODE_BUS_INDIR_
xeon011 0:9158fe13dc14 95 */
xeon011 0:9158fe13dc14 96 // #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_BUS_INDIR_
xeon011 0:9158fe13dc14 97 #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_
xeon011 0:9158fe13dc14 98 #include "W5200/w5200.h"
xeon011 0:9158fe13dc14 99 #elif (_WIZCHIP_ == 5500)
xeon011 0:9158fe13dc14 100 #define _WIZCHIP_ID_ "W5500\0"
xeon011 0:9158fe13dc14 101
xeon011 0:9158fe13dc14 102 /**
xeon011 0:9158fe13dc14 103 * @brief Define interface mode. \n
xeon011 0:9158fe13dc14 104 * @todo Should select interface mode as chip.
xeon011 0:9158fe13dc14 105 * - @ref \_WIZCHIP_IO_MODE_SPI_ \n
xeon011 0:9158fe13dc14 106 * -@ref \_WIZCHIP_IO_MODE_SPI_VDM_ : Valid only in @ref \_WIZCHIP_ == 5500 \n
xeon011 0:9158fe13dc14 107 * -@ref \_WIZCHIP_IO_MODE_SPI_FDM_ : Valid only in @ref \_WIZCHIP_ == 5500 \n
xeon011 0:9158fe13dc14 108 * - @ref \_WIZCHIP_IO_MODE_BUS_ \n
xeon011 0:9158fe13dc14 109 * - @ref \_WIZCHIP_IO_MODE_BUS_DIR_ \n
xeon011 0:9158fe13dc14 110 * - @ref \_WIZCHIP_IO_MODE_BUS_INDIR_ \n
xeon011 0:9158fe13dc14 111 * - Others will be defined in future. \n\n
xeon011 0:9158fe13dc14 112 * ex> <code> #define \_WIZCHIP_IO_MODE_ \_WIZCHIP_IO_MODE_SPI_VDM_ </code>
xeon011 0:9158fe13dc14 113 *
xeon011 0:9158fe13dc14 114 */
xeon011 0:9158fe13dc14 115 //#define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_FDM_
xeon011 0:9158fe13dc14 116 #define _WIZCHIP_IO_MODE_ _WIZCHIP_IO_MODE_SPI_VDM_
xeon011 0:9158fe13dc14 117 #include "W5500/w5500.h"
xeon011 0:9158fe13dc14 118 #else
xeon011 0:9158fe13dc14 119 #error "Unknown defined _WIZCHIP_. You should define one of 5100, 5200, and 5500 !!!"
xeon011 0:9158fe13dc14 120 #endif
xeon011 0:9158fe13dc14 121
xeon011 0:9158fe13dc14 122 #ifndef _WIZCHIP_IO_MODE_
xeon011 0:9158fe13dc14 123 #error "Undefined _WIZCHIP_IO_MODE_. You should define it !!!"
xeon011 0:9158fe13dc14 124 #endif
xeon011 0:9158fe13dc14 125
xeon011 0:9158fe13dc14 126 /**
xeon011 0:9158fe13dc14 127 * @brief Define I/O base address when BUS IF mode.
xeon011 0:9158fe13dc14 128 * @todo Should re-define it to fit your system when BUS IF Mode (@ref \_WIZCHIP_IO_MODE_BUS_,
xeon011 0:9158fe13dc14 129 * @ref \_WIZCHIP_IO_MODE_BUS_DIR_, @ref \_WIZCHIP_IO_MODE_BUS_INDIR_). \n\n
xeon011 0:9158fe13dc14 130 * ex> <code> #define \_WIZCHIP_IO_BASE_ 0x00008000 </code>
xeon011 0:9158fe13dc14 131 */
xeon011 0:9158fe13dc14 132 #define _WIZCHIP_IO_BASE_ 0x00000000 //
xeon011 0:9158fe13dc14 133
xeon011 0:9158fe13dc14 134 #if _WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS
xeon011 0:9158fe13dc14 135 #ifndef _WIZCHIP_IO_BASE_
xeon011 0:9158fe13dc14 136 #error "You should be define _WIZCHIP_IO_BASE to fit your system memory map."
xeon011 0:9158fe13dc14 137 #endif
xeon011 0:9158fe13dc14 138 #endif
xeon011 0:9158fe13dc14 139
xeon011 0:9158fe13dc14 140 #if _WIZCHIP_ > 5100
xeon011 0:9158fe13dc14 141 #define _WIZCHIP_SOCK_NUM_ 8 ///< The count of independant socket of @b WIZCHIP
xeon011 0:9158fe13dc14 142 #else
xeon011 0:9158fe13dc14 143 #define _WIZCHIP_SOCK_NUM_ 4 ///< The count of independant socket of @b WIZCHIP
xeon011 0:9158fe13dc14 144 #endif
xeon011 0:9158fe13dc14 145
xeon011 0:9158fe13dc14 146
xeon011 0:9158fe13dc14 147 /********************************************************
xeon011 0:9158fe13dc14 148 * WIZCHIP BASIC IF functions for SPI, SDIO, I2C , ETC.
xeon011 0:9158fe13dc14 149 *********************************************************/
xeon011 0:9158fe13dc14 150 /**
xeon011 0:9158fe13dc14 151 * @ingroup DATA_TYPE
xeon011 0:9158fe13dc14 152 * @brief The set of callback functions for W5500:@ref WIZCHIP_IO_Functions W5200:@ref WIZCHIP_IO_Functions_W5200
xeon011 0:9158fe13dc14 153 */
xeon011 0:9158fe13dc14 154 typedef struct __WIZCHIP
xeon011 0:9158fe13dc14 155 {
xeon011 0:9158fe13dc14 156 uint16_t if_mode; ///< host interface mode
xeon011 0:9158fe13dc14 157 uint8_t id[6]; ///< @b WIZCHIP ID such as @b 5100, @b 5200, @b 5500, and so on.
xeon011 0:9158fe13dc14 158 /**
xeon011 0:9158fe13dc14 159 * The set of critical section callback func.
xeon011 0:9158fe13dc14 160 */
xeon011 0:9158fe13dc14 161 struct _CRIS
xeon011 0:9158fe13dc14 162 {
xeon011 0:9158fe13dc14 163 void (*_enter) (void); ///< crtical section enter
xeon011 0:9158fe13dc14 164 void (*_exit) (void); ///< critial section exit
xeon011 0:9158fe13dc14 165 }CRIS;
xeon011 0:9158fe13dc14 166 /**
xeon011 0:9158fe13dc14 167 * The set of @ref\_WIZCHIP_ select control callback func.
xeon011 0:9158fe13dc14 168 */
xeon011 0:9158fe13dc14 169 struct _CS
xeon011 0:9158fe13dc14 170 {
xeon011 0:9158fe13dc14 171 void (*_select) (void); ///< @ref \_WIZCHIP_ selected
xeon011 0:9158fe13dc14 172 void (*_deselect)(void); ///< @ref \_WIZCHIP_ deselected
xeon011 0:9158fe13dc14 173 }CS;
xeon011 0:9158fe13dc14 174 /**
xeon011 0:9158fe13dc14 175 * The set of interface IO callback func.
xeon011 0:9158fe13dc14 176 */
xeon011 0:9158fe13dc14 177 union _IF
xeon011 0:9158fe13dc14 178 {
xeon011 0:9158fe13dc14 179 /**
xeon011 0:9158fe13dc14 180 * For BUS interface IO
xeon011 0:9158fe13dc14 181 */
xeon011 0:9158fe13dc14 182 struct
xeon011 0:9158fe13dc14 183 {
xeon011 0:9158fe13dc14 184 uint8_t (*_read_byte) (uint32_t AddrSel);
xeon011 0:9158fe13dc14 185 void (*_write_byte) (uint32_t AddrSel, uint8_t wb);
xeon011 0:9158fe13dc14 186 }BUS;
xeon011 0:9158fe13dc14 187 /**
xeon011 0:9158fe13dc14 188 * For SPI interface IO
xeon011 0:9158fe13dc14 189 */
xeon011 0:9158fe13dc14 190 struct
xeon011 0:9158fe13dc14 191 {
xeon011 0:9158fe13dc14 192 uint8_t (*_read_byte) (void);
xeon011 0:9158fe13dc14 193 void (*_write_byte) (uint8_t wb);
xeon011 0:9158fe13dc14 194 }SPI;
xeon011 0:9158fe13dc14 195 // To be added
xeon011 0:9158fe13dc14 196 //
xeon011 0:9158fe13dc14 197 }IF;
xeon011 0:9158fe13dc14 198 }_WIZCHIP;
xeon011 0:9158fe13dc14 199
xeon011 0:9158fe13dc14 200 extern _WIZCHIP WIZCHIP;
xeon011 0:9158fe13dc14 201
xeon011 0:9158fe13dc14 202 /**
xeon011 0:9158fe13dc14 203 * @ingroup DATA_TYPE
xeon011 0:9158fe13dc14 204 * WIZCHIP control type enumration used in @ref ctlwizchip().
xeon011 0:9158fe13dc14 205 */
xeon011 0:9158fe13dc14 206 typedef enum
xeon011 0:9158fe13dc14 207 {
xeon011 0:9158fe13dc14 208 CW_RESET_WIZCHIP, ///< Resets WIZCHIP by softly
xeon011 0:9158fe13dc14 209 CW_INIT_WIZCHIP, ///< Inializes to WIZCHIP with SOCKET buffer size 2 or 1 dimension array typed uint8_t.
xeon011 0:9158fe13dc14 210 CW_GET_INTERRUPT, ///< Get Interrupt status of WIZCHIP
xeon011 0:9158fe13dc14 211 CW_CLR_INTERRUPT, ///< Clears interrupt
xeon011 0:9158fe13dc14 212 CW_SET_INTRMASK, ///< Masks interrupt
xeon011 0:9158fe13dc14 213 CW_GET_INTRMASK, ///< Get interrupt mask
xeon011 0:9158fe13dc14 214 CW_SET_INTRTIME, ///< Set interval time between the current and next interrupt.
xeon011 0:9158fe13dc14 215 CW_GET_INTRTIME, ///< Set interval time between the current and next interrupt.
xeon011 0:9158fe13dc14 216 CW_GET_ID, ///< Gets WIZCHIP name.
xeon011 0:9158fe13dc14 217
xeon011 0:9158fe13dc14 218 #if _WIZCHIP_ == 5500
xeon011 0:9158fe13dc14 219 CW_RESET_PHY, ///< Resets internal PHY. Valid Only W5000
xeon011 0:9158fe13dc14 220 CW_SET_PHYCONF, ///< When PHY configured by interal register, PHY operation mode (Manual/Auto, 10/100, Half/Full). Valid Only W5000
xeon011 0:9158fe13dc14 221 CW_GET_PHYCONF, ///< Get PHY operation mode in interal register. Valid Only W5000
xeon011 0:9158fe13dc14 222 CW_GET_PHYSTATUS, ///< Get real PHY status on operating. Valid Only W5000
xeon011 0:9158fe13dc14 223 CW_SET_PHYPOWMODE, ///< Set PHY power mode as noraml and down when PHYSTATUS.OPMD == 1. Valid Only W5000
xeon011 0:9158fe13dc14 224 #endif
xeon011 0:9158fe13dc14 225 CW_GET_PHYPOWMODE, ///< Get PHY Power mode as down or normal
xeon011 0:9158fe13dc14 226 CW_GET_PHYLINK ///< Get PHY Link status
xeon011 0:9158fe13dc14 227 }ctlwizchip_type;
xeon011 0:9158fe13dc14 228
xeon011 0:9158fe13dc14 229 /**
xeon011 0:9158fe13dc14 230 * @ingroup DATA_TYPE
xeon011 0:9158fe13dc14 231 * Network control type enumration used in @ref ctlnetwork().
xeon011 0:9158fe13dc14 232 */
xeon011 0:9158fe13dc14 233 typedef enum
xeon011 0:9158fe13dc14 234 {
xeon011 0:9158fe13dc14 235 CN_SET_NETINFO, ///< Set Network with @ref wiz_NetInfo
xeon011 0:9158fe13dc14 236 CN_GET_NETINFO, ///< Get Network with @ref wiz_NetInfo
xeon011 0:9158fe13dc14 237 CN_SET_NETMODE, ///< Set network mode as WOL, PPPoE, Ping Block, and Force ARP mode
xeon011 0:9158fe13dc14 238 CN_GET_NETMODE, ///< Get network mode as WOL, PPPoE, Ping Block, and Force ARP mode
xeon011 0:9158fe13dc14 239 CN_SET_TIMEOUT, ///< Set network timeout as retry count and time.
xeon011 0:9158fe13dc14 240 CN_GET_TIMEOUT, ///< Get network timeout as retry count and time.
xeon011 0:9158fe13dc14 241 }ctlnetwork_type;
xeon011 0:9158fe13dc14 242
xeon011 0:9158fe13dc14 243 /**
xeon011 0:9158fe13dc14 244 * @ingroup DATA_TYPE
xeon011 0:9158fe13dc14 245 * Interrupt kind when CW_SET_INTRRUPT, CW_GET_INTERRUPT, CW_SET_INTRMASK
xeon011 0:9158fe13dc14 246 * and CW_GET_INTRMASK is used in @ref ctlnetwork().
xeon011 0:9158fe13dc14 247 * It can be used with OR operation.
xeon011 0:9158fe13dc14 248 */
xeon011 0:9158fe13dc14 249 typedef enum
xeon011 0:9158fe13dc14 250 {
xeon011 0:9158fe13dc14 251 #if _WIZCHIP_ > 5200
xeon011 0:9158fe13dc14 252 IK_WOL = (1 << 4), ///< Wake On Lan by receiving the magic packet. Valid in W500.
xeon011 0:9158fe13dc14 253 #endif
xeon011 0:9158fe13dc14 254
xeon011 0:9158fe13dc14 255 IK_PPPOE_TERMINATED = (1 << 5), ///< PPPoE Disconnected
xeon011 0:9158fe13dc14 256
xeon011 0:9158fe13dc14 257 #if _WIZCHIP_ != 5200
xeon011 0:9158fe13dc14 258 IK_DEST_UNREACH = (1 << 6), ///< Destination IP & Port Unreable, No use in W5200
xeon011 0:9158fe13dc14 259 #endif
xeon011 0:9158fe13dc14 260
xeon011 0:9158fe13dc14 261 IK_IP_CONFLICT = (1 << 7), ///< IP conflict occurred
xeon011 0:9158fe13dc14 262
xeon011 0:9158fe13dc14 263 IK_SOCK_0 = (1 << 8), ///< Socket 0 interrupt
xeon011 0:9158fe13dc14 264 IK_SOCK_1 = (1 << 9), ///< Socket 1 interrupt
xeon011 0:9158fe13dc14 265 IK_SOCK_2 = (1 << 10), ///< Socket 2 interrupt
xeon011 0:9158fe13dc14 266 IK_SOCK_3 = (1 << 11), ///< Socket 3 interrupt
xeon011 0:9158fe13dc14 267 #if _WIZCHIP_ > 5100
xeon011 0:9158fe13dc14 268 IK_SOCK_4 = (1 << 12), ///< Socket 4 interrupt, No use in 5100
xeon011 0:9158fe13dc14 269 IK_SOCK_5 = (1 << 13), ///< Socket 5 interrupt, No use in 5100
xeon011 0:9158fe13dc14 270 IK_SOCK_6 = (1 << 14), ///< Socket 6 interrupt, No use in 5100
xeon011 0:9158fe13dc14 271 IK_SOCK_7 = (1 << 15), ///< Socket 7 interrupt, No use in 5100
xeon011 0:9158fe13dc14 272 #endif
xeon011 0:9158fe13dc14 273
xeon011 0:9158fe13dc14 274 #if _WIZCHIP_ > 5100
xeon011 0:9158fe13dc14 275 IK_SOCK_ALL = (0xFF << 8) ///< All Socket interrpt
xeon011 0:9158fe13dc14 276 #else
xeon011 0:9158fe13dc14 277 IK_SOCK_ALL = (0x0F << 8) ///< All Socket interrpt
xeon011 0:9158fe13dc14 278 #endif
xeon011 0:9158fe13dc14 279 }intr_kind;
xeon011 0:9158fe13dc14 280
xeon011 0:9158fe13dc14 281 #define PHY_CONFBY_HW 0 ///< Configured PHY operation mode by HW pin
xeon011 0:9158fe13dc14 282 #define PHY_CONFBY_SW 1 ///< Configured PHY operation mode by SW register
xeon011 0:9158fe13dc14 283 #define PHY_MODE_MANUAL 0 ///< Configured PHY operation mode with user setting.
xeon011 0:9158fe13dc14 284 #define PHY_MODE_AUTONEGO 1 ///< Configured PHY operation mode with auto-negotiation
xeon011 0:9158fe13dc14 285 #define PHY_SPEED_10 0 ///< Link Speed 10
xeon011 0:9158fe13dc14 286 #define PHY_SPEED_100 1 ///< Link Speed 100
xeon011 0:9158fe13dc14 287 #define PHY_DUPLEX_HALF 0 ///< Link Half-Duplex
xeon011 0:9158fe13dc14 288 #define PHY_DUPLEX_FULL 1 ///< Link Full-Duplex
xeon011 0:9158fe13dc14 289 #define PHY_LINK_OFF 0 ///< Link Off
xeon011 0:9158fe13dc14 290 #define PHY_LINK_ON 1 ///< Link On
xeon011 0:9158fe13dc14 291 #define PHY_POWER_NORM 0 ///< PHY power normal mode
xeon011 0:9158fe13dc14 292 #define PHY_POWER_DOWN 1 ///< PHY power down mode
xeon011 0:9158fe13dc14 293
xeon011 0:9158fe13dc14 294
xeon011 0:9158fe13dc14 295 #if _WIZCHIP_ == 5500
xeon011 0:9158fe13dc14 296 /**
xeon011 0:9158fe13dc14 297 * @ingroup DATA_TYPE
xeon011 0:9158fe13dc14 298 * It configures PHY configuration when CW_SET PHYCONF or CW_GET_PHYCONF in W5500,
xeon011 0:9158fe13dc14 299 * and it indicates the real PHY status configured by HW or SW in all WIZCHIP. \n
xeon011 0:9158fe13dc14 300 * Valid only in W5500.
xeon011 0:9158fe13dc14 301 */
xeon011 0:9158fe13dc14 302 typedef struct wiz_PhyConf_t
xeon011 0:9158fe13dc14 303 {
xeon011 0:9158fe13dc14 304 uint8_t by; ///< set by @ref PHY_CONFBY_HW or @ref PHY_CONFBY_SW
xeon011 0:9158fe13dc14 305 uint8_t mode; ///< set by @ref PHY_MODE_MANUAL or @ref PHY_MODE_AUTONEGO
xeon011 0:9158fe13dc14 306 uint8_t speed; ///< set by @ref PHY_SPEED_10 or @ref PHY_SPEED_100
xeon011 0:9158fe13dc14 307 uint8_t duplex; ///< set by @ref PHY_DUPLEX_HALF @ref PHY_DUPLEX_FULL
xeon011 0:9158fe13dc14 308 //uint8_t power; ///< set by @ref PHY_POWER_NORM or @ref PHY_POWER_DOWN
xeon011 0:9158fe13dc14 309 //uint8_t link; ///< Valid only in CW_GET_PHYSTATUS. set by @ref PHY_LINK_ON or PHY_DUPLEX_OFF
xeon011 0:9158fe13dc14 310 }wiz_PhyConf;
xeon011 0:9158fe13dc14 311 #endif
xeon011 0:9158fe13dc14 312
xeon011 0:9158fe13dc14 313 /**
xeon011 0:9158fe13dc14 314 * @ingroup DATA_TYPE
xeon011 0:9158fe13dc14 315 * It used in setting dhcp_mode of @ref wiz_NetInfo.
xeon011 0:9158fe13dc14 316 */
xeon011 0:9158fe13dc14 317 typedef enum
xeon011 0:9158fe13dc14 318 {
xeon011 0:9158fe13dc14 319 NETINFO_STATIC = 1, ///< Static IP configuration by manually.
xeon011 0:9158fe13dc14 320 NETINFO_DHCP ///< Dynamic IP configruation from a DHCP sever
xeon011 0:9158fe13dc14 321 }dhcp_mode;
xeon011 0:9158fe13dc14 322
xeon011 0:9158fe13dc14 323 /**
xeon011 0:9158fe13dc14 324 * @ingroup DATA_TYPE
xeon011 0:9158fe13dc14 325 * Network Information for WIZCHIP
xeon011 0:9158fe13dc14 326 */
xeon011 0:9158fe13dc14 327 typedef struct wiz_NetInfo_t
xeon011 0:9158fe13dc14 328 {
xeon011 0:9158fe13dc14 329 uint8_t mac[6]; ///< Source Mac Address
xeon011 0:9158fe13dc14 330 uint8_t ip[4]; ///< Source IP Address
xeon011 0:9158fe13dc14 331 uint8_t sn[4]; ///< Subnet Mask
xeon011 0:9158fe13dc14 332 uint8_t gw[4]; ///< Gateway IP Address
xeon011 0:9158fe13dc14 333 uint8_t dns[4]; ///< DNS server IP Address
xeon011 0:9158fe13dc14 334 dhcp_mode dhcp; ///< 1 - Static, 2 - DHCP
xeon011 0:9158fe13dc14 335 }wiz_NetInfo;
xeon011 0:9158fe13dc14 336
xeon011 0:9158fe13dc14 337 /**
xeon011 0:9158fe13dc14 338 * @ingroup DATA_TYPE
xeon011 0:9158fe13dc14 339 * Network mode
xeon011 0:9158fe13dc14 340 */
xeon011 0:9158fe13dc14 341 typedef enum
xeon011 0:9158fe13dc14 342 {
xeon011 0:9158fe13dc14 343 #if _WIZCHIP_ == 5500
xeon011 0:9158fe13dc14 344 NM_FORCEARP = (1<<1), ///< Force to APP send whenever udp data is sent. Valid only in W5500
xeon011 0:9158fe13dc14 345 #endif
xeon011 0:9158fe13dc14 346 NM_WAKEONLAN = (1<<5), ///< Wake On Lan
xeon011 0:9158fe13dc14 347 NM_PINGBLOCK = (1<<4), ///< Block ping-request
xeon011 0:9158fe13dc14 348 NM_PPPOE = (1<<3), ///< PPPoE mode
xeon011 0:9158fe13dc14 349 }netmode_type;
xeon011 0:9158fe13dc14 350
xeon011 0:9158fe13dc14 351 /**
xeon011 0:9158fe13dc14 352 * @ingroup DATA_TYPE
xeon011 0:9158fe13dc14 353 * Used in CN_SET_TIMEOUT or CN_GET_TIMEOUT of @ref ctlwizchip() for timeout configruation.
xeon011 0:9158fe13dc14 354 */
xeon011 0:9158fe13dc14 355 typedef struct wiz_NetTimeout_t
xeon011 0:9158fe13dc14 356 {
xeon011 0:9158fe13dc14 357 uint8_t retry_cnt; ///< retry count
xeon011 0:9158fe13dc14 358 uint16_t time_100us; ///< time unit 100us
xeon011 0:9158fe13dc14 359 }wiz_NetTimeout;
xeon011 0:9158fe13dc14 360
xeon011 0:9158fe13dc14 361 /**
xeon011 0:9158fe13dc14 362 *@brief Registers call back function for critical section of I/O functions such as
xeon011 0:9158fe13dc14 363 *\ref WIZCHIP_READ, @ref WIZCHIP_WRITE, @ref WIZCHIP_READ_BUF and @ref WIZCHIP_WRITE_BUF.
xeon011 0:9158fe13dc14 364 *@param cris_en : callback function for critical section enter.
xeon011 0:9158fe13dc14 365 *@param cris_ex : callback function for critical section exit.
xeon011 0:9158fe13dc14 366 *@todo Describe @ref WIZCHIP_CRITICAL_ENTER and @ref WIZCHIP_CRITICAL_EXIT marco or register your functions.
xeon011 0:9158fe13dc14 367 *@note If you do not describe or register, default functions(@ref wizchip_cris_enter & @ref wizchip_cris_exit) is called.
xeon011 0:9158fe13dc14 368 */
xeon011 0:9158fe13dc14 369 void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void));
xeon011 0:9158fe13dc14 370
xeon011 0:9158fe13dc14 371
xeon011 0:9158fe13dc14 372 /**
xeon011 0:9158fe13dc14 373 *@brief Registers call back function for WIZCHIP select & deselect.
xeon011 0:9158fe13dc14 374 *@param cs_sel : callback function for WIZCHIP select
xeon011 0:9158fe13dc14 375 *@param cs_desel : callback fucntion for WIZCHIP deselect
xeon011 0:9158fe13dc14 376 *@todo Describe @ref wizchip_cs_select and @ref wizchip_cs_deselect function or register your functions.
xeon011 0:9158fe13dc14 377 *@note If you do not describe or register, null function is called.
xeon011 0:9158fe13dc14 378 */
xeon011 0:9158fe13dc14 379 void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void));
xeon011 0:9158fe13dc14 380
xeon011 0:9158fe13dc14 381 /**
xeon011 0:9158fe13dc14 382 *@brief Registers call back function for bus interface.
xeon011 0:9158fe13dc14 383 *@param bus_rb : callback function to read byte data using system bus
xeon011 0:9158fe13dc14 384 *@param bus_wb : callback function to write byte data using system bus
xeon011 0:9158fe13dc14 385 *@todo Describe @ref wizchip_bus_readbyte and @ref wizchip_bus_writebyte function
xeon011 0:9158fe13dc14 386 *or register your functions.
xeon011 0:9158fe13dc14 387 *@note If you do not describe or register, null function is called.
xeon011 0:9158fe13dc14 388 */
xeon011 0:9158fe13dc14 389 void reg_wizchip_bus_cbfunc(uint8_t (*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb));
xeon011 0:9158fe13dc14 390
xeon011 0:9158fe13dc14 391 /**
xeon011 0:9158fe13dc14 392 *@brief Registers call back function for SPI interface.
xeon011 0:9158fe13dc14 393 *@param spi_rb : callback function to read byte usig SPI
xeon011 0:9158fe13dc14 394 *@param spi_wb : callback function to write byte usig SPI
xeon011 0:9158fe13dc14 395 *@todo Describe \ref wizchip_spi_readbyte and \ref wizchip_spi_writebyte function
xeon011 0:9158fe13dc14 396 *or register your functions.
xeon011 0:9158fe13dc14 397 *@note If you do not describe or register, null function is called.
xeon011 0:9158fe13dc14 398 */
xeon011 0:9158fe13dc14 399 void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb));
xeon011 0:9158fe13dc14 400
xeon011 0:9158fe13dc14 401 /**
xeon011 0:9158fe13dc14 402 * @ingroup extra_functions
xeon011 0:9158fe13dc14 403 * @brief Controls to the WIZCHIP.
xeon011 0:9158fe13dc14 404 * @details Resets WIZCHIP & internal PHY, Configures PHY mode, Monitor PHY(Link,Speed,Half/Full/Auto),
xeon011 0:9158fe13dc14 405 * controls interrupt & mask and so on.
xeon011 0:9158fe13dc14 406 * @param cwtype : Decides to the control type
xeon011 0:9158fe13dc14 407 * @param arg : arg type is dependent on cwtype.
xeon011 0:9158fe13dc14 408 * @return 0 : Success \n
xeon011 0:9158fe13dc14 409 * -1 : Fail because of invalid \ref ctlwizchip_type or unsupported \ref ctlwizchip_type in WIZCHIP
xeon011 0:9158fe13dc14 410 */
xeon011 0:9158fe13dc14 411 int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg);
xeon011 0:9158fe13dc14 412
xeon011 0:9158fe13dc14 413 /**
xeon011 0:9158fe13dc14 414 * @ingroup extra_functions
xeon011 0:9158fe13dc14 415 * @brief Controls to network.
xeon011 0:9158fe13dc14 416 * @details Controls to network environment, mode, timeout and so on.
xeon011 0:9158fe13dc14 417 * @param cntype : Input. Decides to the control type
xeon011 0:9158fe13dc14 418 * @param arg : Inout. arg type is dependent on cntype.
xeon011 0:9158fe13dc14 419 * @return -1 : Fail because of invalid \ref ctlnetwork_type or unsupported \ref ctlnetwork_type in WIZCHIP \n
xeon011 0:9158fe13dc14 420 * 0 : Success
xeon011 0:9158fe13dc14 421 */
xeon011 0:9158fe13dc14 422 int8_t ctlnetwork(ctlnetwork_type cntype, void* arg);
xeon011 0:9158fe13dc14 423
xeon011 0:9158fe13dc14 424
xeon011 0:9158fe13dc14 425 /*
xeon011 0:9158fe13dc14 426 * The following functions are implemented for internal use.
xeon011 0:9158fe13dc14 427 * but You can call these functions for code size reduction instead of ctlwizchip() and ctlnetwork().
xeon011 0:9158fe13dc14 428 */
xeon011 0:9158fe13dc14 429
xeon011 0:9158fe13dc14 430 /**
xeon011 0:9158fe13dc14 431 * @ingroup extra_functions
xeon011 0:9158fe13dc14 432 * @brief Reset WIZCHIP by softly.
xeon011 0:9158fe13dc14 433 */
xeon011 0:9158fe13dc14 434 void wizchip_sw_reset(void);
xeon011 0:9158fe13dc14 435
xeon011 0:9158fe13dc14 436 /**
xeon011 0:9158fe13dc14 437 * @ingroup extra_functions
xeon011 0:9158fe13dc14 438 * @brief Initializes WIZCHIP with socket buffer size
xeon011 0:9158fe13dc14 439 * @param txsize Socket tx buffer sizes. If null, initialized the default size 2KB.
xeon011 0:9158fe13dc14 440 * @param rxsize Socket rx buffer sizes. If null, initialized the default size 2KB.
xeon011 0:9158fe13dc14 441 * @return 0 : succcess \n
xeon011 0:9158fe13dc14 442 * -1 : fail. Invalid buffer size
xeon011 0:9158fe13dc14 443 */
xeon011 0:9158fe13dc14 444 int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize);
xeon011 0:9158fe13dc14 445
xeon011 0:9158fe13dc14 446 /**
xeon011 0:9158fe13dc14 447 * @ingroup extra_functions
xeon011 0:9158fe13dc14 448 * @brief Clear Interrupt of WIZCHIP.
xeon011 0:9158fe13dc14 449 * @param intr : @ref intr_kind value operated OR. It can type-cast to uint16_t.
xeon011 0:9158fe13dc14 450 */
xeon011 0:9158fe13dc14 451 void wizchip_clrinterrupt(intr_kind intr);
xeon011 0:9158fe13dc14 452
xeon011 0:9158fe13dc14 453 /**
xeon011 0:9158fe13dc14 454 * @ingroup extra_functions
xeon011 0:9158fe13dc14 455 * @brief Get Interrupt of WIZCHIP.
xeon011 0:9158fe13dc14 456 * @return @ref intr_kind value operated OR. It can type-cast to uint16_t.
xeon011 0:9158fe13dc14 457 */
xeon011 0:9158fe13dc14 458 intr_kind wizchip_getinterrupt(void);
xeon011 0:9158fe13dc14 459
xeon011 0:9158fe13dc14 460 /**
xeon011 0:9158fe13dc14 461 * @ingroup extra_functions
xeon011 0:9158fe13dc14 462 * @brief Mask or Unmask Interrupt of WIZCHIP.
xeon011 0:9158fe13dc14 463 * @param intr : @ref intr_kind value operated OR. It can type-cast to uint16_t.
xeon011 0:9158fe13dc14 464 */
xeon011 0:9158fe13dc14 465 void wizchip_setinterruptmask(intr_kind intr);
xeon011 0:9158fe13dc14 466
xeon011 0:9158fe13dc14 467 /**
xeon011 0:9158fe13dc14 468 * @ingroup extra_functions
xeon011 0:9158fe13dc14 469 * @brief Get Interrupt mask of WIZCHIP.
xeon011 0:9158fe13dc14 470 * @return : The operated OR vaule of @ref intr_kind. It can type-cast to uint16_t.
xeon011 0:9158fe13dc14 471 */
xeon011 0:9158fe13dc14 472 intr_kind wizchip_getinterruptmask(void);
xeon011 0:9158fe13dc14 473
xeon011 0:9158fe13dc14 474 #if _WIZCHIP_ > 5100
xeon011 0:9158fe13dc14 475 int8_t wizphy_getphylink(void); ///< get the link status of phy in WIZCHIP. No use in W5100
xeon011 0:9158fe13dc14 476 int8_t wizphy_getphypmode(void); ///< get the power mode of PHY in WIZCHIP. No use in W5100
xeon011 0:9158fe13dc14 477 #endif
xeon011 0:9158fe13dc14 478
xeon011 0:9158fe13dc14 479 #if _WIZCHIP_ == 5500
xeon011 0:9158fe13dc14 480 void wizphy_reset(void); ///< Reset phy. Vailid only in W5500
xeon011 0:9158fe13dc14 481 /**
xeon011 0:9158fe13dc14 482 * @ingroup extra_functions
xeon011 0:9158fe13dc14 483 * @brief Set the phy information for WIZCHIP without power mode
xeon011 0:9158fe13dc14 484 * @param phyconf : @ref wiz_PhyConf
xeon011 0:9158fe13dc14 485 */
xeon011 0:9158fe13dc14 486 void wizphy_setphyconf(wiz_PhyConf* phyconf);
xeon011 0:9158fe13dc14 487 /**
xeon011 0:9158fe13dc14 488 * @ingroup extra_functions
xeon011 0:9158fe13dc14 489 * @brief Get phy configuration information.
xeon011 0:9158fe13dc14 490 * @param phyconf : @ref wiz_PhyConf
xeon011 0:9158fe13dc14 491 */
xeon011 0:9158fe13dc14 492 void wizphy_getphyconf(wiz_PhyConf* phyconf);
xeon011 0:9158fe13dc14 493 /**
xeon011 0:9158fe13dc14 494 * @ingroup extra_functions
xeon011 0:9158fe13dc14 495 * @brief Get phy status.
xeon011 0:9158fe13dc14 496 * @param phyconf : @ref wiz_PhyConf
xeon011 0:9158fe13dc14 497 */
xeon011 0:9158fe13dc14 498 void wizphy_getphystat(wiz_PhyConf* phyconf);
xeon011 0:9158fe13dc14 499 /**
xeon011 0:9158fe13dc14 500 * @ingroup extra_functions
xeon011 0:9158fe13dc14 501 * @brief set the power mode of phy inside WIZCHIP. Refer to @ref PHYCFGR in W5500, @ref PHYSTATUS in W5200
xeon011 0:9158fe13dc14 502 * @param pmode Settig value of power down mode.
xeon011 0:9158fe13dc14 503 */
xeon011 0:9158fe13dc14 504 int8_t wizphy_setphypmode(uint8_t pmode);
xeon011 0:9158fe13dc14 505 #endif
xeon011 0:9158fe13dc14 506
xeon011 0:9158fe13dc14 507 /**
xeon011 0:9158fe13dc14 508 * @ingroup extra_functions
xeon011 0:9158fe13dc14 509 * @brief Set the network information for WIZCHIP
xeon011 0:9158fe13dc14 510 * @param pnetinfo : @ref wizNetInfo
xeon011 0:9158fe13dc14 511 */
xeon011 0:9158fe13dc14 512 void wizchip_setnetinfo(wiz_NetInfo* pnetinfo);
xeon011 0:9158fe13dc14 513
xeon011 0:9158fe13dc14 514 /**
xeon011 0:9158fe13dc14 515 * @ingroup extra_functions
xeon011 0:9158fe13dc14 516 * @brief Get the network information for WIZCHIP
xeon011 0:9158fe13dc14 517 * @param pnetinfo : @ref wizNetInfo
xeon011 0:9158fe13dc14 518 */
xeon011 0:9158fe13dc14 519 void wizchip_getnetinfo(wiz_NetInfo* pnetinfo);
xeon011 0:9158fe13dc14 520
xeon011 0:9158fe13dc14 521 /**
xeon011 0:9158fe13dc14 522 * @ingroup extra_functions
xeon011 0:9158fe13dc14 523 * @brief Set the network mode such WOL, PPPoE, Ping Block, and etc.
xeon011 0:9158fe13dc14 524 * @param pnetinfo Value of network mode. Refer to @ref netmode_type.
xeon011 0:9158fe13dc14 525 */
xeon011 0:9158fe13dc14 526 int8_t wizchip_setnetmode(netmode_type netmode);
xeon011 0:9158fe13dc14 527
xeon011 0:9158fe13dc14 528 /**
xeon011 0:9158fe13dc14 529 * @ingroup extra_functions
xeon011 0:9158fe13dc14 530 * @brief Get the network mode such WOL, PPPoE, Ping Block, and etc.
xeon011 0:9158fe13dc14 531 * @return Value of network mode. Refer to @ref netmode_type.
xeon011 0:9158fe13dc14 532 */
xeon011 0:9158fe13dc14 533 netmode_type wizchip_getnetmode(void);
xeon011 0:9158fe13dc14 534
xeon011 0:9158fe13dc14 535 /**
xeon011 0:9158fe13dc14 536 * @ingroup extra_functions
xeon011 0:9158fe13dc14 537 * @brief Set retry time value(@ref RTR) and retry count(@ref RCR).
xeon011 0:9158fe13dc14 538 * @details @ref RTR configures the retransmission timeout period and @ref RCR configures the number of time of retransmission.
xeon011 0:9158fe13dc14 539 * @param nettime @ref RTR value and @ref RCR value. Refer to @ref wiz_NetTimeout.
xeon011 0:9158fe13dc14 540 */
xeon011 0:9158fe13dc14 541 void wizchip_settimeout(wiz_NetTimeout* nettime);
xeon011 0:9158fe13dc14 542
xeon011 0:9158fe13dc14 543 /**
xeon011 0:9158fe13dc14 544 * @ingroup extra_functions
xeon011 0:9158fe13dc14 545 * @brief Get retry time value(@ref RTR) and retry count(@ref RCR).
xeon011 0:9158fe13dc14 546 * @details @ref RTR configures the retransmission timeout period and @ref RCR configures the number of time of retransmission.
xeon011 0:9158fe13dc14 547 * @param nettime @ref RTR value and @ref RCR value. Refer to @ref wiz_NetTimeout.
xeon011 0:9158fe13dc14 548 */
xeon011 0:9158fe13dc14 549 void wizchip_gettimeout(wiz_NetTimeout* nettime);
xeon011 0:9158fe13dc14 550
xeon011 0:9158fe13dc14 551 #endif // _WIZCHIP_CONF_H_
xeon011 0:9158fe13dc14 552
xeon011 0:9158fe13dc14 553 #ifdef __cplusplus
xeon011 0:9158fe13dc14 554 }
xeon011 0:9158fe13dc14 555 #endif