Sensor reporting over USB CDC
Dependencies: MAG3110 MMA8451Q SLCD- TSI USBDevice mbed
MMA8451Q/MMA8451Q.cpp@0:7b58cdacf811, 2014-04-16 (annotated)
- Committer:
- wue
- Date:
- Wed Apr 16 12:20:12 2014 +0000
- Revision:
- 0:7b58cdacf811
Sensor reporting over USB CDC
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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wue | 0:7b58cdacf811 | 1 | /* Copyright (c) 2010-2011 mbed.org, MIT License |
wue | 0:7b58cdacf811 | 2 | * |
wue | 0:7b58cdacf811 | 3 | * Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
wue | 0:7b58cdacf811 | 4 | * and associated documentation files (the "Software"), to deal in the Software without |
wue | 0:7b58cdacf811 | 5 | * restriction, including without limitation the rights to use, copy, modify, merge, publish, |
wue | 0:7b58cdacf811 | 6 | * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the |
wue | 0:7b58cdacf811 | 7 | * Software is furnished to do so, subject to the following conditions: |
wue | 0:7b58cdacf811 | 8 | * |
wue | 0:7b58cdacf811 | 9 | * The above copyright notice and this permission notice shall be included in all copies or |
wue | 0:7b58cdacf811 | 10 | * substantial portions of the Software. |
wue | 0:7b58cdacf811 | 11 | * |
wue | 0:7b58cdacf811 | 12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
wue | 0:7b58cdacf811 | 13 | * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
wue | 0:7b58cdacf811 | 14 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
wue | 0:7b58cdacf811 | 15 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
wue | 0:7b58cdacf811 | 16 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
wue | 0:7b58cdacf811 | 17 | */ |
wue | 0:7b58cdacf811 | 18 | |
wue | 0:7b58cdacf811 | 19 | #include "MMA8451Q.h" |
wue | 0:7b58cdacf811 | 20 | |
wue | 0:7b58cdacf811 | 21 | #define INT_SOURCE 0x0C |
wue | 0:7b58cdacf811 | 22 | #define REG_WHO_AM_I 0x0D |
wue | 0:7b58cdacf811 | 23 | #define HP_FILTER_CUTOFF 0x0F |
wue | 0:7b58cdacf811 | 24 | #define PULSE_CFG 0x21 |
wue | 0:7b58cdacf811 | 25 | #define PULSE_SRC 0x22 |
wue | 0:7b58cdacf811 | 26 | #define PULSE_THSX 0x23 |
wue | 0:7b58cdacf811 | 27 | #define PULSE_THSY 0x24 |
wue | 0:7b58cdacf811 | 28 | #define PULSE_THSZ 0x25 |
wue | 0:7b58cdacf811 | 29 | #define PULSE_TMLT 0x26 |
wue | 0:7b58cdacf811 | 30 | #define PULSE_LTCY 0x27 |
wue | 0:7b58cdacf811 | 31 | #define PULSE_WIND 0x28 |
wue | 0:7b58cdacf811 | 32 | #define REG_CTRL_REG_1 0x2A |
wue | 0:7b58cdacf811 | 33 | #define CTRL_REG2 0x2B |
wue | 0:7b58cdacf811 | 34 | #define CTRL_REG4 0x2D |
wue | 0:7b58cdacf811 | 35 | #define CTRL_REG5 0x2E |
wue | 0:7b58cdacf811 | 36 | #define REG_OUT_X_MSB 0x01 |
wue | 0:7b58cdacf811 | 37 | #define REG_OUT_Y_MSB 0x03 |
wue | 0:7b58cdacf811 | 38 | #define REG_OUT_Z_MSB 0x05 |
wue | 0:7b58cdacf811 | 39 | |
wue | 0:7b58cdacf811 | 40 | #define UINT14_MAX 16383 |
wue | 0:7b58cdacf811 | 41 | |
wue | 0:7b58cdacf811 | 42 | MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) { |
wue | 0:7b58cdacf811 | 43 | // activate the peripheral |
wue | 0:7b58cdacf811 | 44 | uint8_t data[2] = {REG_CTRL_REG_1, 0x01}; |
wue | 0:7b58cdacf811 | 45 | writeRegs(data, 2); |
wue | 0:7b58cdacf811 | 46 | } |
wue | 0:7b58cdacf811 | 47 | |
wue | 0:7b58cdacf811 | 48 | MMA8451Q::~MMA8451Q() { } |
wue | 0:7b58cdacf811 | 49 | |
wue | 0:7b58cdacf811 | 50 | uint8_t MMA8451Q::getWhoAmI() { |
wue | 0:7b58cdacf811 | 51 | uint8_t who_am_i = 0; |
wue | 0:7b58cdacf811 | 52 | readRegs(REG_WHO_AM_I, &who_am_i, 1); |
wue | 0:7b58cdacf811 | 53 | return who_am_i; |
wue | 0:7b58cdacf811 | 54 | } |
wue | 0:7b58cdacf811 | 55 | |
wue | 0:7b58cdacf811 | 56 | float MMA8451Q::getAccX() { |
wue | 0:7b58cdacf811 | 57 | //divide by 4096 b/c MMA output is 4096 counts per g so this f outputs accelorometer value formatted to g (gravity) |
wue | 0:7b58cdacf811 | 58 | return (float(getAccAxis(REG_OUT_X_MSB))/4096.0); |
wue | 0:7b58cdacf811 | 59 | } |
wue | 0:7b58cdacf811 | 60 | |
wue | 0:7b58cdacf811 | 61 | float MMA8451Q::getAccY() { |
wue | 0:7b58cdacf811 | 62 | return (float(getAccAxis(REG_OUT_Y_MSB))/4096.0); |
wue | 0:7b58cdacf811 | 63 | } |
wue | 0:7b58cdacf811 | 64 | |
wue | 0:7b58cdacf811 | 65 | float MMA8451Q::getAccZ() { |
wue | 0:7b58cdacf811 | 66 | return (float(getAccAxis(REG_OUT_Z_MSB))/4096.0); |
wue | 0:7b58cdacf811 | 67 | } |
wue | 0:7b58cdacf811 | 68 | |
wue | 0:7b58cdacf811 | 69 | void MMA8451Q::getAccAllAxis(float * res) { |
wue | 0:7b58cdacf811 | 70 | res[0] = getAccX(); |
wue | 0:7b58cdacf811 | 71 | res[1] = getAccY(); |
wue | 0:7b58cdacf811 | 72 | res[2] = getAccZ(); |
wue | 0:7b58cdacf811 | 73 | } |
wue | 0:7b58cdacf811 | 74 | |
wue | 0:7b58cdacf811 | 75 | int16_t MMA8451Q::getAccAxis(uint8_t addr) { |
wue | 0:7b58cdacf811 | 76 | int16_t acc; |
wue | 0:7b58cdacf811 | 77 | uint8_t res[2]; |
wue | 0:7b58cdacf811 | 78 | readRegs(addr, res, 2); |
wue | 0:7b58cdacf811 | 79 | |
wue | 0:7b58cdacf811 | 80 | acc = (res[0] << 6) | (res[1] >> 2); |
wue | 0:7b58cdacf811 | 81 | if (acc > UINT14_MAX/2) |
wue | 0:7b58cdacf811 | 82 | acc -= UINT14_MAX; |
wue | 0:7b58cdacf811 | 83 | |
wue | 0:7b58cdacf811 | 84 | return acc; |
wue | 0:7b58cdacf811 | 85 | } |
wue | 0:7b58cdacf811 | 86 | |
wue | 0:7b58cdacf811 | 87 | void MMA8451Q::setDoubleTap(void){ |
wue | 0:7b58cdacf811 | 88 | //Implemented directly from Freescale's AN4072 |
wue | 0:7b58cdacf811 | 89 | //Added to MMA8451Q lib |
wue | 0:7b58cdacf811 | 90 | |
wue | 0:7b58cdacf811 | 91 | uint8_t CTRL_REG1_Data; |
wue | 0:7b58cdacf811 | 92 | // int adds; |
wue | 0:7b58cdacf811 | 93 | uint8_t data[2] = {REG_CTRL_REG_1, 0x08}; |
wue | 0:7b58cdacf811 | 94 | |
wue | 0:7b58cdacf811 | 95 | //400 Hz, Standby Mode |
wue | 0:7b58cdacf811 | 96 | writeRegs(data,2); |
wue | 0:7b58cdacf811 | 97 | |
wue | 0:7b58cdacf811 | 98 | //Enable X, Y and Z Double Pulse with DPA = 0 no double pulse abort |
wue | 0:7b58cdacf811 | 99 | data[0]=PULSE_CFG;data[1]=0x2A; |
wue | 0:7b58cdacf811 | 100 | writeRegs(data,2); |
wue | 0:7b58cdacf811 | 101 | |
wue | 0:7b58cdacf811 | 102 | //SetThreshold 3g on X and Y and 5g on Z |
wue | 0:7b58cdacf811 | 103 | //Note: Every step is 0.063g |
wue | 0:7b58cdacf811 | 104 | //3 g/0.063g = 48 counts |
wue | 0:7b58cdacf811 | 105 | //5g/0.063g = 79 counts |
wue | 0:7b58cdacf811 | 106 | data[0]=PULSE_THSX;data[1]=0x30; |
wue | 0:7b58cdacf811 | 107 | writeRegs(data,2);//Set X Threshold to 3g |
wue | 0:7b58cdacf811 | 108 | data[0]=PULSE_THSY;data[1]=0x30; |
wue | 0:7b58cdacf811 | 109 | writeRegs(data,2);//Set Y Threshold to 3g |
wue | 0:7b58cdacf811 | 110 | data[0]=PULSE_THSZ;data[1]=0x4F; |
wue | 0:7b58cdacf811 | 111 | writeRegs(data,2);//Set Z Threshold to 5g |
wue | 0:7b58cdacf811 | 112 | |
wue | 0:7b58cdacf811 | 113 | //Set Time Limit for Tap Detection to 60 ms LP Mode |
wue | 0:7b58cdacf811 | 114 | //Note: 400 Hz ODR, Time step is 1.25 ms per step |
wue | 0:7b58cdacf811 | 115 | //60 ms/1.25 ms = 48 counts |
wue | 0:7b58cdacf811 | 116 | data[0]=PULSE_TMLT;data[1]=0x30; |
wue | 0:7b58cdacf811 | 117 | writeRegs(data,2);//60 ms |
wue | 0:7b58cdacf811 | 118 | |
wue | 0:7b58cdacf811 | 119 | //Set Latency Time to 200 ms |
wue | 0:7b58cdacf811 | 120 | //Note: 400 Hz ODR LPMode, Time step is 2.5 ms per step 00 ms/2.5 ms = 80 counts |
wue | 0:7b58cdacf811 | 121 | data[0]=PULSE_LTCY;data[1]=0x50; |
wue | 0:7b58cdacf811 | 122 | writeRegs(data,2);//200 ms |
wue | 0:7b58cdacf811 | 123 | |
wue | 0:7b58cdacf811 | 124 | //Set Time Window for second tap to 300 ms |
wue | 0:7b58cdacf811 | 125 | //Note: 400 Hz ODR LP Mode, Time step is 2.5 ms per step |
wue | 0:7b58cdacf811 | 126 | //300 ms/2.5 ms = 120 counts |
wue | 0:7b58cdacf811 | 127 | data[0]=PULSE_WIND;data[1]=0x78; |
wue | 0:7b58cdacf811 | 128 | writeRegs(data,2);//300 ms |
wue | 0:7b58cdacf811 | 129 | |
wue | 0:7b58cdacf811 | 130 | //Route INT1 to System Interrupt |
wue | 0:7b58cdacf811 | 131 | data[0]=CTRL_REG4;data[1]=0x08; |
wue | 0:7b58cdacf811 | 132 | writeRegs(data,2);//Enable Pulse Interrupt in System CTRL_REG4 |
wue | 0:7b58cdacf811 | 133 | data[0]=CTRL_REG5;data[1]=0x08; |
wue | 0:7b58cdacf811 | 134 | writeRegs(data,2);//Route Pulse Interrupt to INT1 hardware Pin CTRL_REG5 |
wue | 0:7b58cdacf811 | 135 | |
wue | 0:7b58cdacf811 | 136 | //Set the device to Active Mode |
wue | 0:7b58cdacf811 | 137 | readRegs(0x2A,&CTRL_REG1_Data,1);//Read out the contents of the register |
wue | 0:7b58cdacf811 | 138 | CTRL_REG1_Data |= 0x01; //Change the value in the register to Active Mode. |
wue | 0:7b58cdacf811 | 139 | data[0]=REG_CTRL_REG_1; |
wue | 0:7b58cdacf811 | 140 | data[1]=CTRL_REG1_Data; |
wue | 0:7b58cdacf811 | 141 | writeRegs(data,2);//Write in the updated value to put the device in Active Mode |
wue | 0:7b58cdacf811 | 142 | } |
wue | 0:7b58cdacf811 | 143 | |
wue | 0:7b58cdacf811 | 144 | |
wue | 0:7b58cdacf811 | 145 | void MMA8451Q::readRegs(int addr, uint8_t * data, int len) { |
wue | 0:7b58cdacf811 | 146 | char t[1] = {addr}; |
wue | 0:7b58cdacf811 | 147 | m_i2c.write(m_addr, t, 1, true); |
wue | 0:7b58cdacf811 | 148 | m_i2c.read(m_addr, (char *)data, len); |
wue | 0:7b58cdacf811 | 149 | } |
wue | 0:7b58cdacf811 | 150 | |
wue | 0:7b58cdacf811 | 151 | |
wue | 0:7b58cdacf811 | 152 | |
wue | 0:7b58cdacf811 | 153 | void MMA8451Q::writeRegs(uint8_t * data, int len) { |
wue | 0:7b58cdacf811 | 154 | m_i2c.write(m_addr, (char *)data, len); |
wue | 0:7b58cdacf811 | 155 | } |