mbed library sources that still uses the stm standard peripheral library
Fork of mbed-src by
Revision 434:73d4f6083dd2, committed 2014-12-10
- Comitter:
- mbed_official
- Date:
- Wed Dec 10 08:15:06 2014 +0000
- Parent:
- 433:9eff63c6c55a
- Child:
- 435:53c4d348572c
- Commit message:
- Synchronized with git revision 87c17ed748337226aaa7b4a335fb700e7af21c96
Full URL: https://github.com/mbedmicro/mbed/commit/87c17ed748337226aaa7b4a335fb700e7af21c96/
Targets: NRF51822 - With the old logic if Serial::writeable() was called before and/or used ...
Changed in this revision
--- a/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/nrf51.h Tue Dec 09 15:00:08 2014 +0000 +++ b/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/nrf51.h Wed Dec 10 08:15:06 2014 +0000 @@ -376,7 +376,8 @@ __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout. */ __I uint32_t RESERVED5[46]; __IO uint32_t SHORTS; /*!< Shortcuts for TWI. */ - __I uint32_t RESERVED6[64]; + __I uint32_t RESERVED6[63]; + __IO uint32_t INTEN; /*!< Interrupt enable register. */ __IO uint32_t INTENSET; /*!< Interrupt enable set register. */ __IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */ __I uint32_t RESERVED7[93]; @@ -1213,4 +1214,3 @@ #endif /* nRF51_H */ -
--- a/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c Tue Dec 09 15:00:08 2014 +0000 +++ b/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/serial_api.c Wed Dec 10 08:15:06 2014 +0000 @@ -56,20 +56,12 @@ obj->uart = (NRF_UART_Type *)uart; //pin configurations -- - //outputs NRF_GPIO->DIR |= (1 << tx); //TX_PIN_NUMBER); NRF_GPIO->DIR |= (1 << RTS_PIN_NUMBER); NRF_GPIO->DIR &= ~(1 << rx); //RX_PIN_NUMBER); NRF_GPIO->DIR &= ~(1 << CTS_PIN_NUMBER); - obj->uart->PSELRTS = RTS_PIN_NUMBER; - obj->uart->PSELTXD = tx; //TX_PIN_NUMBER; - - //inputs - obj->uart->PSELCTS = CTS_PIN_NUMBER; - obj->uart->PSELRXD = rx; //RX_PIN_NUMBER; - // set default baud rate and format serial_baud (obj, 9600); @@ -79,8 +71,16 @@ obj->uart->TASKS_STARTTX = 1; obj->uart->TASKS_STARTRX = 1; obj->uart->EVENTS_RXDRDY = 0; + // dummy write needed or TXDRDY trails write rather than leads write. + // pins are disconnected so nothing is physically transmitted on the wire + obj->uart->TXD = 0; obj->index = 0; + + obj->uart->PSELRTS = RTS_PIN_NUMBER; + obj->uart->PSELTXD = tx; //TX_PIN_NUMBER; + obj->uart->PSELCTS = CTS_PIN_NUMBER; + obj->uart->PSELRXD = rx; //RX_PIN_NUMBER; // set rx/tx pins in PullUp mode if (tx != NC) { @@ -194,24 +194,27 @@ if (enable) { switch (irq) { case RxIrq: - obj->uart->INTENSET |= (UART_INTENSET_RXDRDY_Msk); + obj->uart->INTEN |= (UART_INTENSET_RXDRDY_Msk); break; case TxIrq: - obj->uart->INTENSET |= (UART_INTENSET_TXDRDY_Msk); + obj->uart->INTEN |= (UART_INTENSET_TXDRDY_Msk); break; } NVIC_SetPriority(irq_n, 3); NVIC_EnableIRQ(irq_n); } else { // disable + // maseked writes to INTENSET dont disable and masked writes to + // INTENCLR seemed to clear the entire register, not bits. + // Added INTEN to memory map and seems to allow set and clearing of specific bits as desired int all_disabled = 0; switch (irq) { case RxIrq: - obj->uart->INTENSET &= ~(UART_INTENSET_RXDRDY_Msk); - all_disabled = (obj->uart->INTENSET & (UART_INTENSET_TXDRDY_Msk))==0; + obj->uart->INTEN &= ~(UART_INTENCLR_RXDRDY_Msk); + all_disabled = (obj->uart->INTENCLR & (UART_INTENCLR_TXDRDY_Msk)) == 0; break; case TxIrq: - obj->uart->INTENSET &= ~(UART_INTENSET_TXDRDY_Msk); - all_disabled = (obj->uart->INTENSET & (UART_INTENSET_RXDRDY_Msk))==0; + obj->uart->INTEN &= ~(UART_INTENCLR_TXDRDY_Msk); + all_disabled = (obj->uart->INTENCLR & (UART_INTENCLR_RXDRDY_Msk)) == 0; break; } @@ -236,12 +239,11 @@ void serial_putc(serial_t *obj, int c) { - obj->uart->TXD = (uint8_t)c; - while (!serial_writable(obj)) { } obj->uart->EVENTS_TXDRDY = 0; + obj->uart->TXD = (uint8_t)c; } int serial_readable(serial_t *obj) @@ -251,7 +253,7 @@ int serial_writable(serial_t *obj) { - return (obj->uart->EVENTS_TXDRDY ==1); + return (obj->uart->EVENTS_TXDRDY == 1); } void serial_break_set(serial_t *obj)