Wim Huiskamp / Mbed 2 deprecated mbed_bus

Libraries and Example of mbed parallel bus using I2C port expanders

Dependencies:   HDSP253X mbed PCF8574_Bus

MBED_ControlBus.cpp@0:2467aed99127, 2011-08-31 (annotated)

Committer:
wim
Date:
Wed Aug 31 19:45:31 2011 +0000
Revision:
0:2467aed99127
First Version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 0:2467aed99127 1 /* MBED_ControlBus - Use MBED Port Pins for controlling the external Bus
wim 0:2467aed99127 2 * Copyright (c) 2011 Wim Huiskamp
wim 0:2467aed99127 3 *
wim 0:2467aed99127 4 * Released under the MIT License: http://mbed.org/license/mit
wim 0:2467aed99127 5 *
wim 0:2467aed99127 6 * version 0.2 Initial Release
wim 0:2467aed99127 7 */
wim 0:2467aed99127 8 #include "mbed.h"
wim 0:2467aed99127 9 #include "MBED_ControlBus.h"
wim 0:2467aed99127 10
wim 0:2467aed99127 11
wim 0:2467aed99127 12 /** Create an MBED_ControlBus object connected to the specified Pins
wim 0:2467aed99127 13 *
wim 0:2467aed99127 14 * @param PinName WR the Write pin
wim 0:2467aed99127 15 * @param PinName RD the Read pin
wim 0:2467aed99127 16 * @param PinName DTR the databuffer Transmit/Receive direction pin
wim 0:2467aed99127 17 * @param PinName CDBUF the databuffer enable pin
wim 0:2467aed99127 18 * @param PinName CDINT the Keyboard interrupt pin
wim 0:2467aed99127 19 */
wim 0:2467aed99127 20 MBED_ControlBus::MBED_ControlBus(PinName WR, PinName RD, PinName DTR, PinName CDBUF, PinName CDINT) :
wim 0:2467aed99127 21 _WR(WR), // WR pin
wim 0:2467aed99127 22 _RD(RD), // RD pin
wim 0:2467aed99127 23 _DTR(DTR), // DTR pin
wim 0:2467aed99127 24 _CDBUF(CDBUF), // CDBUF pin
wim 0:2467aed99127 25 _CDINT(CDINT){ // CDINT pin
wim 0:2467aed99127 26 _init();
wim 0:2467aed99127 27 }
wim 0:2467aed99127 28
wim 0:2467aed99127 29
wim 0:2467aed99127 30 /** Set or Clear the WR pin on Control Bus
wim 0:2467aed99127 31 *
wim 0:2467aed99127 32 * @param Bit_Level wr_level
wim 0:2467aed99127 33 */
wim 0:2467aed99127 34 void MBED_ControlBus::WR (Bit_Level wr_level) {
wim 0:2467aed99127 35
wim 0:2467aed99127 36 if (wr_level == LOW) {
wim 0:2467aed99127 37 // Make sure that databus buffer is enabled for Write
wim 0:2467aed99127 38 //busctrl(ENABLE, WRITE);
wim 0:2467aed99127 39
wim 0:2467aed99127 40 _RD = 1; // RD Pin High, make sure there is no collision
wim 0:2467aed99127 41 _WR = 0; // WR Pin Low
wim 0:2467aed99127 42 }
wim 0:2467aed99127 43 else {
wim 0:2467aed99127 44 _WR = 1; // WR Pin High
wim 0:2467aed99127 45 }
wim 0:2467aed99127 46 }
wim 0:2467aed99127 47
wim 0:2467aed99127 48
wim 0:2467aed99127 49 /** Set or Clear the RD pin on Control Bus
wim 0:2467aed99127 50 *
wim 0:2467aed99127 51 * @param Bit_Level rd_level
wim 0:2467aed99127 52 */
wim 0:2467aed99127 53 void MBED_ControlBus::RD (Bit_Level rd_level) {
wim 0:2467aed99127 54
wim 0:2467aed99127 55 if (rd_level == LOW) {
wim 0:2467aed99127 56 // Make sure that databus buffer is enabled for Read
wim 0:2467aed99127 57 //busctrl(ENABLE, READ);
wim 0:2467aed99127 58
wim 0:2467aed99127 59 _WR = 1; // WR Pin High, make sure there is no collision
wim 0:2467aed99127 60 _RD = 0; // RD Pin Low
wim 0:2467aed99127 61 }
wim 0:2467aed99127 62 else {
wim 0:2467aed99127 63 _RD = 1; // RD Pin High
wim 0:2467aed99127 64 }
wim 0:2467aed99127 65 }
wim 0:2467aed99127 66
wim 0:2467aed99127 67
wim 0:2467aed99127 68 /** Enable databus buffer for Write or Read
wim 0:2467aed99127 69 *
wim 0:2467aed99127 70 * @param Bus_Dir buf_dir
wim 0:2467aed99127 71 */
wim 0:2467aed99127 72 void MBED_ControlBus::busdir (Bus_Dir buf_dir) {
wim 0:2467aed99127 73
wim 0:2467aed99127 74 if (buf_dir == READ) {
wim 0:2467aed99127 75 // Make sure that databus buffer is enabled for READ
wim 0:2467aed99127 76 _DTR = 0; // DTR Pin Low, Read Direction
wim 0:2467aed99127 77 _CDBUF = 0; // CDBUF Pin Low, Enable Buffer
wim 0:2467aed99127 78 }
wim 0:2467aed99127 79 else {
wim 0:2467aed99127 80 // Make sure that databus buffer is enabled for Write
wim 0:2467aed99127 81 _DTR = 1; // DTR Pin High, Write Direction
wim 0:2467aed99127 82 _CDBUF = 0; // CDBUF Pin Low, Enable Buffer
wim 0:2467aed99127 83 }
wim 0:2467aed99127 84 }
wim 0:2467aed99127 85
wim 0:2467aed99127 86
wim 0:2467aed99127 87 /** Enable/Disable databus buffer and control Write or Read Direction
wim 0:2467aed99127 88 *
wim 0:2467aed99127 89 * @param Bus_Ena buf_ena
wim 0:2467aed99127 90 * @param Bus_Dir buf_dir
wim 0:2467aed99127 91 */
wim 0:2467aed99127 92 void MBED_ControlBus::busctrl (Bus_Ena buf_ena, Bus_Dir buf_dir) {
wim 0:2467aed99127 93
wim 0:2467aed99127 94 if (buf_ena == ENABLE) {
wim 0:2467aed99127 95 _CDBUF = 0; // CDBUF Pin Low, Enable Buffer
wim 0:2467aed99127 96 }
wim 0:2467aed99127 97 else {
wim 0:2467aed99127 98 _CDBUF = 1; // CDBUF Pin High, Disable Buffer
wim 0:2467aed99127 99 }
wim 0:2467aed99127 100
wim 0:2467aed99127 101 if (buf_dir == READ) {
wim 0:2467aed99127 102 _DTR = 0; // DTR Pin Low, Read Direction
wim 0:2467aed99127 103 }
wim 0:2467aed99127 104 else {
wim 0:2467aed99127 105 _DTR = 1; // DTR Pin High, Write Direction
wim 0:2467aed99127 106 }
wim 0:2467aed99127 107 }
wim 0:2467aed99127 108
wim 0:2467aed99127 109
wim 0:2467aed99127 110 /** Get the CDINT pin value from Control Bus
wim 0:2467aed99127 111 *
wim 0:2467aed99127 112 * @returns Bit_Level CDINT_level
wim 0:2467aed99127 113 */
wim 0:2467aed99127 114 Bit_Level MBED_ControlBus::CDINT () {
wim 0:2467aed99127 115
wim 0:2467aed99127 116 // CDINT Pin value, used as regular Pin rather than as interrupt
wim 0:2467aed99127 117 if (_CDINT == 0)
wim 0:2467aed99127 118 return LOW;
wim 0:2467aed99127 119 else
wim 0:2467aed99127 120 return HIGH;
wim 0:2467aed99127 121 }
wim 0:2467aed99127 122
wim 0:2467aed99127 123
wim 0:2467aed99127 124 /** Init MBED_ControlBus
wim 0:2467aed99127 125 * @param
wim 0:2467aed99127 126 * @returns
wim 0:2467aed99127 127 */
wim 0:2467aed99127 128 void MBED_ControlBus::_init() {
wim 0:2467aed99127 129 // Make sure that all Control pins are disabled
wim 0:2467aed99127 130 _RD = 1; // RD Pin High
wim 0:2467aed99127 131 _WR = 1; // WR Pin High
wim 0:2467aed99127 132
wim 0:2467aed99127 133 // Make sure that databus buffer is enabled for Write
wim 0:2467aed99127 134 busctrl(ENABLE, WRITE);
wim 0:2467aed99127 135
wim 0:2467aed99127 136 }