Wim Huiskamp
Landtiger (LPC1768) graphics LCD demo.
See here for more info.
Diff: GLCD_LPC1700.cpp
- Revision:
- 0:a8090b59eb05
- Child:
- 1:ea0f7b1c5daf
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/GLCD_LPC1700.cpp Sun Nov 04 16:49:27 2012 +0000
@@ -0,0 +1,1605 @@
+/******************************************************************************/
+/* GLCD_LPC1700 low-level Graphic LCD (320x240 pixels) for LandTiger */
+/* */
+/******************************************************************************/
+/* This file is modified from the uVision/ARM development tools. */
+/* Copyright (c) 2005-2009 Keil Software. All rights reserved. */
+/* This software may only be used under the terms of a valid, current, */
+/* end user licence from KEIL for a compatible version of KEIL software */
+/* development tools. Nothing else gives you the right to use this software. */
+/******************************************************************************/
+
+#include "mbed.h"
+#include "GLCD.h"
+#include "Font_24x16.h"
+
+/*********************** Hardware specific configuration **********************/
+
+/* LandTiger 8bit to 16bit LCD Interface
+
+ PINS:
+ - EN = P0.19
+ - LE = P0.20
+ - DIR = P0.21
+ - CS = P0.22
+ - RS = P0.23
+ - WR = P0.24
+ - RD = P0.25
+ - DB[0.7] = P2.0...P2.7
+ - DB[8.15]= P2.0...P2.7 */
+
+#define PIN_EN (1 << 19)
+#define PIN_LE (1 << 20)
+#define PIN_DIR (1 << 21)
+#define PIN_CS (1 << 22)
+#define PIN_RS (1 << 23)
+#define PIN_WR (1 << 24)
+#define PIN_RD (1 << 25)
+
+/*------------------------- Speed dependant settings -------------------------*/
+
+/* If processor works on high frequency delay has to be increased, it can be
+ increased by factor 2^N by this constant */
+#define DELAY_2N 18
+
+/*---------------------- Graphic LCD size definitions ------------------------*/
+
+#define WIDTH 320 /* Screen Width (in pixels) */
+#define HEIGHT 240 /* Screen Hight (in pixels) */
+#define BPP 16 /* Bits per pixel */
+#define BYPP ((BPP+7)/8) /* Bytes per pixel */
+
+/*--------------- Graphic LCD interface hardware definitions -----------------*/
+
+/* Pin EN setting to 0 or 1 */
+#define LCD_EN(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_EN) : (LPC_GPIO0->FIOCLR = PIN_EN));
+/* Pin LE setting to 0 or 1 */
+#define LCD_LE(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_LE) : (LPC_GPIO0->FIOCLR = PIN_LE));
+/* Pin DIR setting to 0 or 1 */
+#define LCD_DIR(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_DIR) : (LPC_GPIO0->FIOCLR = PIN_DIR));
+/* Pin CS setting to 0 or 1 */
+#define LCD_CS(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_CS) : (LPC_GPIO0->FIOCLR = PIN_CS));
+/* Pin RS setting to 0 or 1 */
+#define LCD_RS(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_RS) : (LPC_GPIO0->FIOCLR = PIN_RS));
+/* Pin WR setting to 0 or 1 */
+#define LCD_WR(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_WR) : (LPC_GPIO0->FIOCLR = PIN_WR));
+/* Pin RD setting to 0 or 1 */
+#define LCD_RD(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_RD) : (LPC_GPIO0->FIOCLR = PIN_RD));
+
+
+#define swap(type, i, j) {type t = i; i = j; j = t;}
+
+
+/*---------------------------- Global variables ------------------------------*/
+
+/******************************************************************************/
+static volatile unsigned short TextColor = Black, BackColor = White;
+static unsigned short driverCode;
+
+/************************ Local auxiliary functions ***************************/
+
+/*******************************************************************************
+* Delay in while loop cycles *
+* Parameter: cnt: number of while cycles to delay *
+* Return: *
+*******************************************************************************/
+
+static void delay (int cnt) {
+
+ cnt <<= DELAY_2N;
+ while (cnt--);
+}
+
+__asm void wait()
+{
+ nop
+ BX lr
+}
+
+void wait_delay(int count)
+{
+ while(count--);
+}
+
+/*******************************************************************************
+* Send 1 short to LCD *
+* Parameter: data: data to be sent *
+* Return: *
+*******************************************************************************/
+
+static __inline unsigned char lcd_send (unsigned short data) {
+
+ LPC_GPIO2->FIODIR |= 0x000000ff; //P2.0...P2.7 Output
+ LCD_DIR(1) //Interface A->B
+ LCD_EN(0) //Enable 2A->2B
+ LPC_GPIO2->FIOPIN = data; //Write D0..D7
+ LCD_LE(1)
+ LCD_LE(0) //latch D0..D7
+ LPC_GPIO2->FIOPIN = data >> 8; //Write D8..D15
+ return(1);
+}
+
+
+/*******************************************************************************
+* read 1 short from LCD *
+* Parameter: *
+* Return: short data from LCD *
+*******************************************************************************/
+
+static __inline unsigned short lcd_read (void) {
+ unsigned short id;
+ LPC_GPIO2->FIODIR &= 0xffffff00; //P2.0...P2.7 Input
+ LCD_DIR(0) //Interface B->A
+ LCD_EN(0) //Enable 2B->2A
+ wait_delay(80); //delay some times
+ id = LPC_GPIO2->FIOPIN & 0x00ff; //Read D8..D15
+ LCD_EN(1) //Enable 1B->1A
+ wait_delay(80); //delay some times
+ id = (id << 8) | (LPC_GPIO2->FIOPIN & 0x00ff); //Read D0..D7
+ LCD_DIR(1)
+ return(id);
+}
+
+/*******************************************************************************
+* Write command to LCD controller *
+* Parameter: c: command to be written *
+* Return: *
+*******************************************************************************/
+
+static __inline void wr_cmd (unsigned char c) {
+
+ LCD_RS(0)
+ LCD_RD(1)
+ lcd_send(c);
+ LCD_WR(0)
+ wait();
+ LCD_WR(1)
+}
+
+
+/*******************************************************************************
+* Write data to LCD controller *
+* Parameter: c: data to be written *
+* Return: *
+*******************************************************************************/
+
+static __inline void wr_dat (unsigned short c) {
+
+ LCD_RS(1)
+ LCD_RD(1)
+ lcd_send(c);
+ LCD_WR(0)
+ wait();
+ LCD_WR(1)
+}
+
+/*******************************************************************************
+* Read data from LCD controller *
+* Parameter: *
+* Return: read data *
+*******************************************************************************/
+
+static __inline unsigned short rd_dat (void) {
+ unsigned short val = 0;
+
+ LCD_RS(1)
+ LCD_WR(1)
+ LCD_RD(0)
+ val = lcd_read();
+ LCD_RD(1)
+ return val;
+}
+
+/*******************************************************************************
+* Start of data writing to LCD controller *
+* Parameter: *
+* Return: *
+*******************************************************************************/
+
+static __inline void wr_dat_start (void) {
+
+ LCD_CS(0)
+ LCD_RS(1)
+}
+
+
+/*******************************************************************************
+* Stop of data writing to LCD controller *
+* Parameter: *
+* Return: *
+*******************************************************************************/
+
+static __inline void wr_dat_stop (void) {
+
+ LCD_CS(1)
+}
+
+
+/*******************************************************************************
+* Data writing to LCD controller *
+* Parameter: c: data to be written *
+* Return: *
+*******************************************************************************/
+
+static __inline void wr_dat_only (unsigned short c) {
+
+ lcd_send(c);
+ LCD_WR(0)
+ wait();
+ LCD_WR(1)
+}
+
+
+/*******************************************************************************
+* Write to LCD register *
+* Parameter: reg: register to be read *
+* val: value to write to register *
+*******************************************************************************/
+
+static __inline void wr_reg (unsigned char reg, unsigned short val) {
+
+ LCD_CS(0)
+ wr_cmd(reg);
+ wr_dat(val);
+ LCD_CS(1)
+}
+
+
+/*******************************************************************************
+* Read from LCD register *
+* Parameter: reg: register to be read *
+* Return: value read from register *
+*******************************************************************************/
+
+static unsigned short rd_reg (unsigned short reg) {
+ unsigned short val = 0;
+
+ LCD_CS(0)
+ wr_cmd(reg);
+ val = rd_dat();
+ LCD_CS(1)
+ return (val);
+}
+
+
+/************************ Exported functions **********************************/
+
+/*******************************************************************************
+* Initialize the Graphic LCD controller *
+* Parameter: *
+* Return: *
+*******************************************************************************/
+
+void GLCD_Init (void) {
+
+ /* Configure the LCD Control pins */
+ LPC_GPIO0->FIODIR |= 0x03f80000;
+ LPC_GPIO0->FIOSET = 0x03f80000;
+
+ delay(5); /* Delay 50 ms */
+
+ driverCode = rd_reg(0x00);
+
+ switch (driverCode) {
+
+ case LGDP4531_ID: { //2.8" TFT LCD Module, DriverIC is LGDP4531
+
+ wr_reg(0x00,0x0001);
+ wr_reg(0x10,0x0628);
+ wr_reg(0x12,0x0006);
+ wr_reg(0x13,0x0A32);
+ wr_reg(0x11,0x0040);
+ wr_reg(0x15,0x0050);
+ wr_reg(0x12,0x0016);
+ delay(15);
+ wr_reg(0x10,0x5660);
+ delay(15);
+ wr_reg(0x13,0x2A4E);
+ wr_reg(0x01,0x0100);
+ wr_reg(0x02,0x0300);
+
+ wr_reg(0x03,0x1030);
+
+ wr_reg(0x08,0x0202);
+ wr_reg(0x0A,0x0000);
+ wr_reg(0x30,0x0000);
+ wr_reg(0x31,0x0402);
+ wr_reg(0x32,0x0106);
+ wr_reg(0x33,0x0700);
+ wr_reg(0x34,0x0104);
+ wr_reg(0x35,0x0301);
+ wr_reg(0x36,0x0707);
+ wr_reg(0x37,0x0305);
+ wr_reg(0x38,0x0208);
+ wr_reg(0x39,0x0F0B);
+ delay(15);
+ wr_reg(0x41,0x0002);
+ wr_reg(0x60,0x2700);
+ wr_reg(0x61,0x0001);
+ wr_reg(0x90,0x0119);
+ wr_reg(0x92,0x010A);
+ wr_reg(0x93,0x0004);
+ wr_reg(0xA0,0x0100);
+ delay(15);
+ wr_reg(0xA0,0x0000);
+ delay(20);
+
+ break;
+ }
+
+case ILI9328_ID:
+case ILI9325_ID: { //2.8" TFT LCD Module, DriverIC is ILI9325
+
+ wr_reg(0x00e7,0x0010);
+ wr_reg(0x0000,0x0001); //start internal osc
+ wr_reg(0x0001,0x0100);
+ wr_reg(0x0002,0x0700); //power on sequence
+ wr_reg(0x0003,(1<<12)|(1<<5)|(1<<4) ); //65K
+ wr_reg(0x0004,0x0000);
+ wr_reg(0x0008,0x0207);
+ wr_reg(0x0009,0x0000);
+ wr_reg(0x000a,0x0000); //display setting
+ wr_reg(0x000c,0x0001); //display setting
+ wr_reg(0x000d,0x0000); //0f3c
+ wr_reg(0x000f,0x0000);
+//Power On sequence //
+ wr_reg(0x0010,0x0000);
+ wr_reg(0x0011,0x0007);
+ wr_reg(0x0012,0x0000);
+ wr_reg(0x0013,0x0000);
+ delay(15);
+ wr_reg(0x0010,0x1590);
+ wr_reg(0x0011,0x0227);
+ delay(15);
+ wr_reg(0x0012,0x009c);
+ delay(15);
+ wr_reg(0x0013,0x1900);
+ wr_reg(0x0029,0x0023);
+ wr_reg(0x002b,0x000e);
+ delay(15);
+ wr_reg(0x0020,0x0000);
+ wr_reg(0x0021,0x0000);
+///////////////////////////////////////////////////////
+ delay(15);
+ wr_reg(0x0030,0x0007);
+ wr_reg(0x0031,0x0707);
+ wr_reg(0x0032,0x0006);
+ wr_reg(0x0035,0x0704);
+ wr_reg(0x0036,0x1f04);
+ wr_reg(0x0037,0x0004);
+ wr_reg(0x0038,0x0000);
+ wr_reg(0x0039,0x0706);
+ wr_reg(0x003c,0x0701);
+ wr_reg(0x003d,0x000f);
+ delay(15);
+ wr_reg(0x0050,0x0000);
+ wr_reg(0x0051,0x00ef);
+ wr_reg(0x0052,0x0000);
+ wr_reg(0x0053,0x013f);
+ wr_reg(0x0060,0xa700);
+ wr_reg(0x0061,0x0001);
+ wr_reg(0x006a,0x0000);
+ wr_reg(0x0080,0x0000);
+ wr_reg(0x0081,0x0000);
+ wr_reg(0x0082,0x0000);
+ wr_reg(0x0083,0x0000);
+ wr_reg(0x0084,0x0000);
+ wr_reg(0x0085,0x0000);
+
+ wr_reg(0x0090,0x0010);
+ wr_reg(0x0092,0x0000);
+ wr_reg(0x0093,0x0003);
+ wr_reg(0x0095,0x0110);
+ wr_reg(0x0097,0x0000);
+ wr_reg(0x0098,0x0000);
+ //display on sequence
+ wr_reg(0x0007,0x0133);
+ wr_reg(0x0020,0x0000);
+ wr_reg(0x0021,0x0000);
+
+ break;
+}
+
+ case ILI9320_ID: { //3.2" TFT LCD Module,DriverIC is ILI9320
+ /* Start Initial Sequence --------------------------------------------------*/
+ wr_reg(0xE5, 0x8000); /* Set the internal vcore voltage */
+ wr_reg(0x00, 0x0001); /* Start internal OSC */
+ wr_reg(0x01, 0x0100); /* Set SS and SM bit */
+ wr_reg(0x02, 0x0700); /* Set 1 line inversion */
+ wr_reg(0x03, 0x1030); /* Set GRAM write direction and BGR=1 */
+ wr_reg(0x04, 0x0000); /* Resize register */
+ wr_reg(0x08, 0x0202); /* 2 lines each, back and front porch */
+ wr_reg(0x09, 0x0000); /* Set non-disp area refresh cyc ISC */
+ wr_reg(0x0A, 0x0000); /* FMARK function */
+ wr_reg(0x0C, 0x0000); /* RGB interface setting */
+ wr_reg(0x0D, 0x0000); /* Frame marker Position */
+ wr_reg(0x0F, 0x0000); /* RGB interface polarity */
+
+ /* Power On sequence -------------------------------------------------------*/
+ wr_reg(0x10, 0x0000); /* Reset Power Control 1 */
+ wr_reg(0x11, 0x0000); /* Reset Power Control 2 */
+ wr_reg(0x12, 0x0000); /* Reset Power Control 3 */
+ wr_reg(0x13, 0x0000); /* Reset Power Control 4 */
+ delay(20); /* Discharge cap power voltage (200ms)*/
+ wr_reg(0x10, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
+ wr_reg(0x11, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */
+ delay(5); /* Delay 50 ms */
+ wr_reg(0x12, 0x0139); /* VREG1OUT voltage */
+ delay(5); /* Delay 50 ms */
+ wr_reg(0x13, 0x1D00); /* VDV[4:0] for VCOM amplitude */
+ wr_reg(0x29, 0x0013); /* VCM[4:0] for VCOMH */
+ delay(5); /* Delay 50 ms */
+ wr_reg(0x20, 0x0000); /* GRAM horizontal Address */
+ wr_reg(0x21, 0x0000); /* GRAM Vertical Address */
+
+ /* Adjust the Gamma Curve --------------------------------------------------*/
+ wr_reg(0x30, 0x0006);
+ wr_reg(0x31, 0x0101);
+ wr_reg(0x32, 0x0003);
+ wr_reg(0x35, 0x0106);
+ wr_reg(0x36, 0x0B02);
+ wr_reg(0x37, 0x0302);
+ wr_reg(0x38, 0x0707);
+ wr_reg(0x39, 0x0007);
+ wr_reg(0x3C, 0x0600);
+ wr_reg(0x3D, 0x020B);
+
+ /* Set GRAM area -----------------------------------------------------------*/
+ wr_reg(0x50, 0x0000); /* Horizontal GRAM Start Address */
+ wr_reg(0x51, (HEIGHT-1)); /* Horizontal GRAM End Address */
+ wr_reg(0x52, 0x0000); /* Vertical GRAM Start Address */
+ wr_reg(0x53, (WIDTH-1)); /* Vertical GRAM End Address */
+ wr_reg(0x60, 0x2700); /* Gate Scan Line */
+ wr_reg(0x61, 0x0001); /* NDL,VLE, REV */
+ wr_reg(0x6A, 0x0000); /* Set scrolling line */
+
+ /* Partial Display Control -------------------------------------------------*/
+ wr_reg(0x80, 0x0000);
+ wr_reg(0x81, 0x0000);
+ wr_reg(0x82, 0x0000);
+ wr_reg(0x83, 0x0000);
+ wr_reg(0x84, 0x0000);
+ wr_reg(0x85, 0x0000);
+
+ /* Panel Control -----------------------------------------------------------*/
+ wr_reg(0x90, 0x0010);
+ wr_reg(0x92, 0x0000);
+ wr_reg(0x93, 0x0003);
+ wr_reg(0x95, 0x0110);
+ wr_reg(0x97, 0x0000);
+ wr_reg(0x98, 0x0000);
+
+ break;
+ }
+
+ case ILI9331_ID: {
+ wr_reg(0x00E7, 0x1014);
+ wr_reg(0x0001, 0x0100); /* set SS and SM bit */
+ wr_reg(0x0002, 0x0200); /* set 1 line inversion */
+ wr_reg(0x0003, 0x1030); /* set GRAM write direction and BGR=1 */
+ wr_reg(0x0008, 0x0202); /* set the back porch and front porch */
+ wr_reg(0x0009, 0x0000); /* set non-display area refresh cycle ISC[3:0] */
+ wr_reg(0x000A, 0x0000); /* FMARK function */
+ wr_reg(0x000C, 0x0000); /* RGB interface setting */
+ wr_reg(0x000D, 0x0000); /* Frame marker Position */
+ wr_reg(0x000F, 0x0000); /* RGB interface polarity */
+ /* Power On sequence */
+ wr_reg(0x0010, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
+ wr_reg(0x0011, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */
+ wr_reg(0x0012, 0x0000); /* VREG1OUT voltage */
+ wr_reg(0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */
+ delay(200); /* delay 200 ms */
+ wr_reg(0x0010, 0x1690); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
+ wr_reg(0x0011, 0x0227); /* DC1[2:0], DC0[2:0], VC[2:0] */
+ delay(50); /* delay 50 ms */
+ wr_reg(0x0012, 0x000C); /* Internal reference voltage= Vci */
+ delay(50); /* delay 50 ms */
+ wr_reg(0x0013, 0x0800); /* Set VDV[4:0] for VCOM amplitude */
+ wr_reg(0x0029, 0x0011); /* Set VCM[5:0] for VCOMH */
+ wr_reg(0x002B, 0x000B); /* Set Frame Rate */
+ delay(50); /* delay 50 ms */
+ wr_reg(0x0020, 0x0000); /* GRAM horizontal Address */
+ wr_reg(0x0021, 0x0000); /* GRAM Vertical Address */
+ /* Adjust the Gamma Curve */
+ wr_reg(0x0030, 0x0000);
+ wr_reg(0x0031, 0x0106);
+ wr_reg(0x0032, 0x0000);
+ wr_reg(0x0035, 0x0204);
+ wr_reg(0x0036, 0x160A);
+ wr_reg(0x0037, 0x0707);
+ wr_reg(0x0038, 0x0106);
+ wr_reg(0x0039, 0x0707);
+ wr_reg(0x003C, 0x0402);
+ wr_reg(0x003D, 0x0C0F);
+ /* Set GRAM area */
+ wr_reg(0x0050, 0x0000); /* Horizontal GRAM Start Address */
+ wr_reg(0x0051, 0x00EF); /* Horizontal GRAM End Address */
+ wr_reg(0x0052, 0x0000); /* Vertical GRAM Start Address */
+ wr_reg(0x0053, 0x013F); /* Vertical GRAM Start Address */
+ wr_reg(0x0060, 0x2700); /* Gate Scan Line */
+ wr_reg(0x0061, 0x0001); /* NDL,VLE, REV */
+ wr_reg(0x006A, 0x0000); /* set scrolling line */
+ /* Partial Display Control */
+ wr_reg(0x0080, 0x0000);
+ wr_reg(0x0081, 0x0000);
+ wr_reg(0x0082, 0x0000);
+ wr_reg(0x0083, 0x0000);
+ wr_reg(0x0084, 0x0000);
+ wr_reg(0x0085, 0x0000);
+ /* Panel Control */
+ wr_reg(0x0090, 0x0010);
+ wr_reg(0x0092, 0x0600);
+ wr_reg(0x0007,0x0021);
+ delay(50); /* delay 50 ms */
+ wr_reg(0x0007,0x0061);
+ delay(50); /* delay 50 ms */
+ wr_reg(0x0007,0x0133); /* 262K color and display ON */
+ break;
+ }
+
+ case SSD1289_ID: { //3.2" TFT LCD Module,DriverIC is SSD1289
+
+ /* Set GRAM write direction and BGR = 1
+ I/D=10 (Horizontal : increment, Vertical : increment)
+ AM=1 (address is updated in vertical writing direction) */
+ wr_reg(0x03, 0x1038);
+ wr_reg(0x07, 0x0173); /* 262K color and display ON */
+
+/// case SSD1289_ID: { //3.2" TFT LCD Module,DriverIC is SSD1289
+
+ wr_reg(0x0000,0x0001); delay(5); // osc en
+
+ wr_reg(0x0003,0xA8A4); delay(5); // powercontrol 1 0xA8A4
+ wr_reg(0x000C,0x0000); delay(5); // powercontrol 2
+ wr_reg(0x000D,0x080C); delay(5); // powercontrol 3
+ wr_reg(0x000E,0x2B00); delay(5); // powercontrol 4
+ wr_reg(0x001E,0x00B0); delay(5); // powercontrol 5
+
+//orig wr_reg(0x0001,0x2b3F); delay(5); // 0x2b3f Mux=320, BGR, RL=0, TB=1
+ wr_reg(0x0001,0x6B3F); delay(5); // 0x6B3F Mux=320, BGR, RL=1, TB=1
+// wr_reg(0x0001,0x293F); delay(5); // 0x293f Mux=320, BGR, RL=0, TB=0
+
+
+ wr_reg(0x0002,0x0600); delay(5); // Driver AC mode
+ wr_reg(0x0010,0x0000); delay(5); // Exit Sleep
+
+ wr_reg(0x0011,0x6078); delay(5); // Entry mode 0x6078 = 65k colors, Hor and Vert Addr Incr, AM=1 vert writing dir
+// wr_reg(0x0011,0x4030); delay(5); // Entry mode 0x4030 = 262k colors, Hor and Vert Addr Incr. AM=0 hor writing dir
+
+ wr_reg(0x0005,0x0000); delay(5); // Compare Regs (default)
+ wr_reg(0x0006,0x0000); delay(5);
+
+ wr_reg(0x0016,0xEF1C); delay(5); // Hor Porch (default)
+ wr_reg(0x0017,0x0003); delay(5); // Ver Porch (default 0103)
+ wr_reg(0x0007,0x0233); delay(5); //0x0233
+ wr_reg(0x000B,0x0000); delay(5); // Frame cycle control default 5308)
+
+ wr_reg(0x000F,0x0000); delay(5); // Gate scan start position
+
+ wr_reg(0x0041,0x0000); delay(5); // Vert Scroll control
+ wr_reg(0x0042,0x0000); delay(5);
+
+ wr_reg(0x0048,0x0000); delay(5); // First screen pos (default)
+ wr_reg(0x0049,0x013F); delay(5);
+
+ wr_reg(0x004A,0x0000); delay(5); // Second screen pos
+ wr_reg(0x004B,0x0000); delay(5);
+
+ wr_reg(0x0044,0xEF00); delay(5); // Hor addr pos
+ wr_reg(0x0045,0x0000); delay(5); // Vert Addr pos
+ wr_reg(0x0046,0x013F); delay(5);
+
+ wr_reg(0x0030,0x0707); delay(5); // Gamma
+ wr_reg(0x0031,0x0204); delay(5);
+ wr_reg(0x0032,0x0204); delay(5);
+ wr_reg(0x0033,0x0502); delay(5);
+ wr_reg(0x0034,0x0507); delay(5);
+ wr_reg(0x0035,0x0204); delay(5);
+ wr_reg(0x0036,0x0204); delay(5);
+ wr_reg(0x0037,0x0502); delay(5);
+ wr_reg(0x003A,0x0302); delay(5);
+ wr_reg(0x003B,0x0302); delay(5);
+
+ wr_reg(0x0023,0x0000); delay(5); // Write data mask (default)
+ wr_reg(0x0024,0x0000); delay(5);
+
+ wr_reg(0x0025,0x8000); delay(5); // Frame freq 65 Hz
+ wr_reg(0x004e,0); // Start x
+ wr_reg(0x004f,0); // Start y
+
+ break;
+ }
+
+
+ case SSD1298_ID: {
+ wr_reg(0x0028,0x0006);
+ wr_reg(0x0000,0x0001);
+ wr_reg(0x0003,0xaea4); /* power control 1---line frequency and VHG,VGL voltage */
+ wr_reg(0x000c,0x0004); /* power control 2---VCIX2 output voltage */
+ wr_reg(0x000d,0x000c); /* power control 3---Vlcd63 voltage */
+ wr_reg(0x000e,0x2800); /* power control 4---VCOMA voltage VCOML=VCOMH*0.9475-VCOMA */
+ wr_reg(0x001e,0x00b5); /* POWER CONTROL 5---VCOMH voltage */
+ wr_reg(0x0001,0x3b3f);
+ wr_reg(0x0002,0x0600);
+ wr_reg(0x0010,0x0000);
+ wr_reg(0x0011,0x6830);
+ wr_reg(0x0005,0x0000);
+ wr_reg(0x0006,0x0000);
+ wr_reg(0x0016,0xef1c);
+ wr_reg(0x0007,0x0033); /* Display control 1 */
+ /* when GON=1 and DTE=0,all gate outputs become VGL */
+ /* when GON=1 and DTE=0,all gate outputs become VGH */
+ /* non-selected gate wires become VGL */
+ wr_reg(0x000b,0x0000);
+ wr_reg(0x000f,0x0000);
+ wr_reg(0x0041,0x0000);
+ wr_reg(0x0042,0x0000);
+ wr_reg(0x0048,0x0000);
+ wr_reg(0x0049,0x013f);
+ wr_reg(0x004a,0x0000);
+ wr_reg(0x004b,0x0000);
+ wr_reg(0x0044,0xef00); /* Horizontal RAM start and end address */
+ wr_reg(0x0045,0x0000); /* Vretical RAM start address */
+ wr_reg(0x0046,0x013f); /* Vretical RAM end address */
+ wr_reg(0x004e,0x0000); /* set GDDRAM x address counter */
+ wr_reg(0x004f,0x0000); /* set GDDRAM y address counter */
+ /* y control */
+ wr_reg(0x0030,0x0707);
+ wr_reg(0x0031,0x0202);
+ wr_reg(0x0032,0x0204);
+ wr_reg(0x0033,0x0502);
+ wr_reg(0x0034,0x0507);
+ wr_reg(0x0035,0x0204);
+ wr_reg(0x0036,0x0204);
+ wr_reg(0x0037,0x0502);
+ wr_reg(0x003a,0x0302);
+ wr_reg(0x003b,0x0302);
+ wr_reg(0x0023,0x0000);
+ wr_reg(0x0024,0x0000);
+ wr_reg(0x0025,0x8000);
+ wr_reg(0x0026,0x7000);
+ wr_reg(0x0020,0xb0eb);
+ wr_reg(0x0027,0x007c);
+ break;
+ }
+
+case SSD2119_ID: {
+ /* POWER ON & RESET DISPLAY OFF */
+ wr_reg(0x28,0x0006);
+ wr_reg(0x00,0x0001);
+ wr_reg(0x10,0x0000);
+ wr_reg(0x01,0x72ef);
+ wr_reg(0x02,0x0600);
+ wr_reg(0x03,0x6a38);
+ wr_reg(0x11,0x6874);
+ wr_reg(0x0f,0x0000); /* RAM WRITE DATA MASK */
+ wr_reg(0x0b,0x5308); /* RAM WRITE DATA MASK */
+ wr_reg(0x0c,0x0003);
+ wr_reg(0x0d,0x000a);
+ wr_reg(0x0e,0x2e00);
+ wr_reg(0x1e,0x00be);
+ wr_reg(0x25,0x8000);
+ wr_reg(0x26,0x7800);
+ wr_reg(0x27,0x0078);
+ wr_reg(0x4e,0x0000);
+ wr_reg(0x4f,0x0000);
+ wr_reg(0x12,0x08d9);
+ /* Adjust the Gamma Curve */
+ wr_reg(0x30,0x0000);
+ wr_reg(0x31,0x0104);
+ wr_reg(0x32,0x0100);
+ wr_reg(0x33,0x0305);
+ wr_reg(0x34,0x0505);
+ wr_reg(0x35,0x0305);
+ wr_reg(0x36,0x0707);
+ wr_reg(0x37,0x0300);
+ wr_reg(0x3a,0x1200);
+ wr_reg(0x3b,0x0800);
+ wr_reg(0x07,0x0033);
+ break;
+ }
+
+
+
+#if(0)
+
+// Note: unprintable char hidden as space and as nl !!!
+ case R61505U_ID1:
+ case R61505U_ID2: {
+
+ /* second release on 3/5 ,luminance is acceptable,water wave appear during camera preview */
+ wr_reg(0x0007,0x0000);
+ delay(50); /* delay 50 ms */
+ wr_reg(0x0012,0x011C); /* why need to set several times? */
+ wr_reg(0x00A4,0x0001); /* NVM */
+ wr_reg(0x0008,0x000F);
+ wr_reg(0x000A,0x0008);
+ wr_reg(0x000D,0x0008);
+ /* GAMMA CONTROL */
+ wr_reg(0x0030,0x0707);
+ wr_reg(0x0031,0x0007);
+ wr_reg(0x0032,0x0603);
+ wr_reg(0x0033,0x0700);
+ wr_reg(0x0034,0x0202);
+ wr_reg(0x0035,0x0002);
+ wr_reg(0x0036,0x1F0F);
+ wr_reg(0x0037,0x0707);
+ wr_reg(0x0038,0x0000);
+ wr_reg(0x0039,0x0000);
+ wr_reg(0x003A,0x0707);
+ wr_reg(0x003B,0x0000);
+ wr_reg(0x003C,0x0007);
+ wr_reg(0x003D,0x0000);
+ delay(50); /* delay 50 ms */
+ wr_reg(0x0007,0x0001);
+ wr_reg(0x0017,0x0001); /* Power supply startup enable */
+ delay(50); /* delay 50 ms */
+ /* power control */
+ wr_reg(0x0010,0x17A0);
+ wr_reg(0x0011,0x0217); /* reference voltage VC[2:0] Vciout = 1.00*Vcivl */
+ wr_reg(0x0012,0x011E); /* Vreg1out = Vcilvl*1.80 is it the same as Vgama1out ? */
+ wr_reg(0x0013,0x0F00); /* VDV[4:0]-->VCOM Amplitude VcomL = VcomH - Vcom Ampl */
+ wr_reg(0x002A,0x0000);
+ wr_reg(0x0029,0x000A); /* Vcomh = VCM1[4:0]*Vreg1out gate source voltage?? */
+ wr_reg(0x0012,0x013E); /* power supply on */
+ /* Coordinates Control */
+ wr_reg(0x0050,0x0000);
+ wr_reg(0x0051,0x00EF);
+ wr_reg(0x0052,0x0000);
+ wr_reg(0x0053,0x013F);
+ /* Pannel Image Control */
+ wr_reg(0x0060,0x2700);
+ wr_reg(0x0061,0x0001);
+ wr_reg(0x006A,0x0000);
+ wr_reg(0x0080,0x0000);
+ /* Partial Image Control */
+ wr_reg(0x0081,0x0000);
+ wr_reg(0x0082,0x0000);
+ wr_reg(0x0083,0x0000);
+ wr_reg(0x0084,0x0000);
+ wr_reg(0x0085,0x0000);
+ /* Panel Interface Control */
+ wr_reg(0x0090,0x0013); /* frenqucy */
+ wr_reg(0x0092,0x0300);
+ wr_reg(0x0093,0x0005);
+ wr_reg(0x0095,0x0000);
+ wr_reg(0x0097,0x0000);
+ wr_reg(0x0098,0x0000);
+
+ wr_reg(0x0001,0x0100);
+ wr_reg(0x0002,0x0700);
+ wr_reg(0x0003,0x1030);
+ wr_reg(0x0004,0x0000);
+ wr_reg(0x000C,0x0000);
+ wr_reg(0x000F,0x0000);
+ wr_reg(0x0020,0x0000);
+ wr_reg(0x0021,0x0000);
+ wr_reg(0x0007,0x0021);
+ delay(200); /* delay 200 ms */
+ wr_reg(0x0007,0x0061);
+ delay(200); /* delay 200 ms */
+ wr_reg(0x0007,0x0173);
+ break;
+ }
+
+ case SPFD5408B_ID: {
+
+ wr_reg(0x0001,0x0100); /* Driver Output Contral Register */
+ wr_reg(0x0002,0x0700); /* LCD Driving Waveform Contral */
+ wr_reg(0x0003,0x1030); /* Entry ModeÉèÖÃ */
+
+ wr_reg(0x0004,0x0000); /* Scalling Control register */
+ wr_reg(0x0008,0x0207); /* Display Control 2 */
+ wr_reg(0x0009,0x0000); /* Display Control 3 */
+ wr_reg(0x000A,0x0000); /* Frame Cycle Control */
+ wr_reg(0x000C,0x0000); /* External Display Interface Control 1 */
+ wr_reg(0x000D,0x0000); /* Frame Maker Position */
+ wr_reg(0x000F,0x0000); /* External Display Interface Control 2 */
+ delay(50);
+ wr_reg(0x0007,0x0101); /* Display Control */
+ delay(50);
+ wr_reg(0x0010,0x16B0); /* Power Control 1 */
+ wr_reg(0x0011,0x0001); /* Power Control 2 */
+ wr_reg(0x0017,0x0001); /* Power Control 3 */
+ wr_reg(0x0012,0x0138); /* Power Control 4 */
+ wr_reg(0x0013,0x0800); /* Power Control 5 */
+ wr_reg(0x0029,0x0009); /* NVM read data 2 */
+ wr_reg(0x002a,0x0009); /* NVM read data 3 */
+ wr_reg(0x00a4,0x0000);
+ wr_reg(0x0050,0x0000); /* ÉèÖòÙ×÷´°¿ÚµÄXÖῪʼÁÐ */
+ wr_reg(0x0051,0x00EF); /* ÉèÖòÙ×÷´°¿ÚµÄXÖá½áÊøÁÐ */
+ wr_reg(0x0052,0x0000); /* ÉèÖòÙ×÷´°¿ÚµÄYÖῪʼÐÐ */
+ wr_reg(0x0053,0x013F); /* ÉèÖòÙ×÷´°¿ÚµÄYÖá½áÊøÐÐ */
+
+ wr_reg(0x0060,0x2700); /* Driver Output Control */
+ /* ÉèÖÃÆÁÄ»µÄµãÊýÒÔ¼°É¨ÃèµÄÆðʼÐÐ */
+ wr_reg(0x0061,0x0003); /* Driver Output Control */
+ wr_reg(0x006A,0x0000); /* Vertical Scroll Control */
+
+ wr_reg(0x0080,0x0000); /* Display Position ¨C Partial Display 1 */
+ wr_reg(0x0081,0x0000); /* RAM Address Start ¨C Partial Display 1 */
+ wr_reg(0x0082,0x0000); /* RAM address End - Partial Display 1 */
+ wr_reg(0x0083,0x0000); /* Display Position ¨C Partial Display 2 */
+ wr_reg(0x0084,0x0000); /* RAM Address Start ¨C Partial Display 2 */
+ wr_reg(0x0085,0x0000); /* RAM address End ¨C Partail Display2 */
+ wr_reg(0x0090,0x0013); /* Frame Cycle Control */
+ wr_reg(0x0092,0x0000); /* Panel Interface Control 2 */
+ wr_reg(0x0093,0x0003); /* Panel Interface control 3 */
+ wr_reg(0x0095,0x0110); /* Frame Cycle Control */
+ wr_reg(0x0007,0x0173);
+ break;
+ }
+
+ case LGDP4531_ID: {
+ /* Setup display */
+ wr_reg(0x00,0x0001);
+ wr_reg(0x10,0x0628);
+ wr_reg(0x12,0x0006);
+ wr_reg(0x13,0x0A32);
+ wr_reg(0x11,0x0040);
+ wr_reg(0x15,0x0050);
+ wr_reg(0x12,0x0016);
+ delay(50);
+ wr_reg(0x10,0x5660);
+ delay(50);
+ wr_reg(0x13,0x2A4E);
+ wr_reg(0x01,0x0100);
+ wr_reg(0x02,0x0300);
+ wr_reg(0x03,0x1030);
+ wr_reg(0x08,0x0202);
+ wr_reg(0x0A,0x0000);
+ wr_reg(0x30,0x0000);
+ wr_reg(0x31,0x0402);
+ wr_reg(0x32,0x0106);
+ wr_reg(0x33,0x0700);
+ wr_reg(0x34,0x0104);
+ wr_reg(0x35,0x0301);
+ wr_reg(0x36,0x0707);
+ wr_reg(0x37,0x0305);
+ wr_reg(0x38,0x0208);
+ wr_reg(0x39,0x0F0B);
+ delay(50);
+ wr_reg(0x41,0x0002);
+ wr_reg(0x60,0x2700);
+ wr_reg(0x61,0x0001);
+ wr_reg(0x90,0x0119);
+ wr_reg(0x92,0x010A);
+ wr_reg(0x93,0x0004);
+ wr_reg(0xA0,0x0100);
+ delay(50);
+ wr_reg(0x07,0x0133);
+ delay(50);
+ wr_reg(0xA0,0x0000);
+ break;
+ }
+
+ case LGDP4535_ID: {
+ wr_reg(0x15, 0x0030); /* Set the internal vcore voltage */
+ wr_reg(0x9A, 0x0010); /* Start internal OSC */
+ wr_reg(0x11, 0x0020); /* set SS and SM bit */
+ wr_reg(0x10, 0x3428); /* set 1 line inversion */
+ wr_reg(0x12, 0x0002); /* set GRAM write direction and BGR=1 */
+ wr_reg(0x13, 0x1038); /* Resize register */
+ delay(40);
+ wr_reg(0x12, 0x0012); /* set the back porch and front porch */
+ delay(40);
+ wr_reg(0x10, 0x3420); /* set non-display area refresh cycle ISC[3:0] */
+ wr_reg(0x13, 0x3045); /* FMARK function */
+ delay(70);
+ wr_reg(0x30, 0x0000); /* RGB interface setting */
+ wr_reg(0x31, 0x0402); /* Frame marker Position */
+ wr_reg(0x32, 0x0307); /* RGB interface polarity */
+ wr_reg(0x33, 0x0304); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
+ wr_reg(0x34, 0x0004); /* DC1[2:0], DC0[2:0], VC[2:0] */
+ wr_reg(0x35, 0x0401); /* VREG1OUT voltage */
+ wr_reg(0x36, 0x0707); /* VDV[4:0] for VCOM amplitude */
+ wr_reg(0x37, 0x0305); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
+ wr_reg(0x38, 0x0610); /* DC1[2:0], DC0[2:0], VC[2:0] */
+ wr_reg(0x39, 0x0610); /* VREG1OUT voltage */
+ wr_reg(0x01, 0x0100); /* VDV[4:0] for VCOM amplitude */
+ wr_reg(0x02, 0x0300); /* VCM[4:0] for VCOMH */
+ wr_reg(0x03, 0x1030); /* GRAM horizontal Address */
+ wr_reg(0x08, 0x0808); /* GRAM Vertical Address */
+ wr_reg(0x0A, 0x0008);
+ wr_reg(0x60, 0x2700); /* Gate Scan Line */
+ wr_reg(0x61, 0x0001); /* NDL,VLE, REV */
+ wr_reg(0x90, 0x013E);
+ wr_reg(0x92, 0x0100);
+ wr_reg(0x93, 0x0100);
+ wr_reg(0xA0, 0x3000);
+ wr_reg(0xA3, 0x0010);
+ wr_reg(0x07, 0x0001);
+ wr_reg(0x07, 0x0021);
+ wr_reg(0x07, 0x0023);
+ wr_reg(0x07, 0x0033);
+ wr_reg(0x07, 0x0133);
+ break;
+ }
+
+ case HX8347D_ID: {
+ /* Start Initial Sequence */
+ wr_reg(0xEA,0x00);
+ wr_reg(0xEB,0x20);
+ wr_reg(0xEC,0x0C);
+ wr_reg(0xED,0xC4);
+ wr_reg(0xE8,0x40);
+ wr_reg(0xE9,0x38);
+ wr_reg(0xF1,0x01);
+ wr_reg(0xF2,0x10);
+ wr_reg(0x27,0xA3);
+ /* GAMMA SETTING */
+ wr_reg(0x40,0x01);
+ wr_reg(0x41,0x00);
+ wr_reg(0x42,0x00);
+ wr_reg(0x43,0x10);
+ wr_reg(0x44,0x0E);
+ wr_reg(0x45,0x24);
+ wr_reg(0x46,0x04);
+ wr_reg(0x47,0x50);
+ wr_reg(0x48,0x02);
+ wr_reg(0x49,0x13);
+ wr_reg(0x4A,0x19);
+ wr_reg(0x4B,0x19);
+ wr_reg(0x4C,0x16);
+ wr_reg(0x50,0x1B);
+ wr_reg(0x51,0x31);
+ wr_reg(0x52,0x2F);
+ wr_reg(0x53,0x3F);
+ wr_reg(0x54,0x3F);
+ wr_reg(0x55,0x3E);
+ wr_reg(0x56,0x2F);
+ wr_reg(0x57,0x7B);
+ wr_reg(0x58,0x09);
+ wr_reg(0x59,0x06);
+ wr_reg(0x5A,0x06);
+ wr_reg(0x5B,0x0C);
+ wr_reg(0x5C,0x1D);
+ wr_reg(0x5D,0xCC);
+ /* Power Voltage Setting */
+ wr_reg(0x1B,0x18);
+ wr_reg(0x1A,0x01);
+ wr_reg(0x24,0x15);
+ wr_reg(0x25,0x50);
+ wr_reg(0x23,0x8B);
+ wr_reg(0x18,0x36);
+ wr_reg(0x19,0x01);
+ wr_reg(0x01,0x00);
+ wr_reg(0x1F,0x88);
+ delay(50);
+ wr_reg(0x1F,0x80);
+ delay(50);
+ wr_reg(0x1F,0x90);
+ delay(50);
+ wr_reg(0x1F,0xD0);
+ delay(50);
+ wr_reg(0x17,0x05);
+ wr_reg(0x36,0x00);
+ wr_reg(0x28,0x38);
+ delay(50);
+ wr_reg(0x28,0x3C);
+ break;
+ }
+
+ case ST7781_ID: {
+ /* Start Initial Sequence */
+ wr_reg(0x00FF,0x0001);
+ wr_reg(0x00F3,0x0008);
+ wr_reg(0x0001,0x0100);
+ wr_reg(0x0002,0x0700);
+ wr_reg(0x0003,0x1030);
+ wr_reg(0x0008,0x0302);
+ wr_reg(0x0008,0x0207);
+ wr_reg(0x0009,0x0000);
+ wr_reg(0x000A,0x0000);
+ wr_reg(0x0010,0x0000);
+ wr_reg(0x0011,0x0005);
+ wr_reg(0x0012,0x0000);
+ wr_reg(0x0013,0x0000);
+ delay(50);
+ wr_reg(0x0010,0x12B0);
+ delay(50);
+ wr_reg(0x0011,0x0007);
+ delay(50);
+ wr_reg(0x0012,0x008B);
+ delay(50);
+ wr_reg(0x0013,0x1700);
+ delay(50);
+ wr_reg(0x0029,0x0022);
+ wr_reg(0x0030,0x0000);
+ wr_reg(0x0031,0x0707);
+ wr_reg(0x0032,0x0505);
+ wr_reg(0x0035,0x0107);
+ wr_reg(0x0036,0x0008);
+ wr_reg(0x0037,0x0000);
+ wr_reg(0x0038,0x0202);
+ wr_reg(0x0039,0x0106);
+ wr_reg(0x003C,0x0202);
+ wr_reg(0x003D,0x0408);
+ delay(50);
+ wr_reg(0x0050,0x0000);
+ wr_reg(0x0051,0x00EF);
+ wr_reg(0x0052,0x0000);
+ wr_reg(0x0053,0x013F);
+ wr_reg(0x0060,0xA700);
+ wr_reg(0x0061,0x0001);
+ wr_reg(0x0090,0x0033);
+ wr_reg(0x002B,0x000B);
+ wr_reg(0x0007,0x0133);
+ break;
+ }
+#endif
+
+ default: {
+ /* special ID */
+ driverCode = rd_reg(0x67);
+ if (driverCode == HX8347A_ID) {
+ wr_reg(0x0042,0x0008);
+ /* Gamma setting */
+ wr_reg(0x0046,0x00B4);
+ wr_reg(0x0047,0x0043);
+ wr_reg(0x0048,0x0013);
+ wr_reg(0x0049,0x0047);
+ wr_reg(0x004A,0x0014);
+ wr_reg(0x004B,0x0036);
+ wr_reg(0x004C,0x0003);
+ wr_reg(0x004D,0x0046);
+ wr_reg(0x004E,0x0005);
+ wr_reg(0x004F,0x0010);
+ wr_reg(0x0050,0x0008);
+ wr_reg(0x0051,0x000a);
+ /* Window Setting */
+ wr_reg(0x0002,0x0000);
+ wr_reg(0x0003,0x0000);
+ wr_reg(0x0004,0x0000);
+ wr_reg(0x0005,0x00EF);
+ wr_reg(0x0006,0x0000);
+ wr_reg(0x0007,0x0000);
+ wr_reg(0x0008,0x0001);
+ wr_reg(0x0009,0x003F);
+ delay(10);
+ wr_reg(0x0001,0x0006);
+ wr_reg(0x0016,0x00C8);
+ wr_reg(0x0023,0x0095);
+ wr_reg(0x0024,0x0095);
+ wr_reg(0x0025,0x00FF);
+ wr_reg(0x0027,0x0002);
+ wr_reg(0x0028,0x0002);
+ wr_reg(0x0029,0x0002);
+ wr_reg(0x002A,0x0002);
+ wr_reg(0x002C,0x0002);
+ wr_reg(0x002D,0x0002);
+ wr_reg(0x003A,0x0001);
+ wr_reg(0x003B,0x0001);
+ wr_reg(0x003C,0x00F0);
+ wr_reg(0x003D,0x0000);
+ delay(20);
+ wr_reg(0x0035,0x0038);
+ wr_reg(0x0036,0x0078);
+ wr_reg(0x003E,0x0038);
+ wr_reg(0x0040,0x000F);
+ wr_reg(0x0041,0x00F0);
+ wr_reg(0x0038,0x0000);
+ /* Power Setting */
+ wr_reg(0x0019,0x0049);
+ wr_reg(0x0093,0x000A);
+ delay(10);
+ wr_reg(0x0020,0x0020);
+ wr_reg(0x001D,0x0003);
+ wr_reg(0x001E,0x0000);
+ wr_reg(0x001F,0x0009);
+ wr_reg(0x0044,0x0053);
+ wr_reg(0x0045,0x0010);
+ delay(10);
+ wr_reg(0x001C,0x0004);
+ delay(20);
+ wr_reg(0x0043,0x0080);
+ delay(5);
+ wr_reg(0x001B,0x000a);
+ delay(40);
+ wr_reg(0x001B,0x0012);
+ delay(40);
+ /* Display On Setting */
+ wr_reg(0x0090,0x007F);
+ wr_reg(0x0026,0x0004);
+ delay(40);
+ wr_reg(0x0026,0x0024);
+ wr_reg(0x0026,0x002C);
+ delay(40);
+ wr_reg(0x0070,0x0008);
+ wr_reg(0x0026,0x003C);
+ wr_reg(0x0057,0x0002);
+ wr_reg(0x0055,0x0000);
+ wr_reg(0x0057,0x0000);
+ } // if
+ break;
+ } // default case
+
+ } // end switch
+
+
+}
+
+
+
+
+
+/*******************************************************************************
+* Get LCD Controller ID *
+* Parameter: *
+* Return: short Controller ID *
+*******************************************************************************/
+unsigned short GLCD_DriverCode () {
+
+ return (driverCode);
+}
+
+
+/*******************************************************************************
+* Set draw window region to whole screen *
+* Parameter: *
+* Return: *
+*******************************************************************************/
+
+void GLCD_WindowMax (void) {
+
+ if(driverCode==0x8989)
+ {
+ wr_reg(0x44, 0); /* Horizontal GRAM Start Address */
+ wr_reg(0x44, 0 |((HEIGHT-1)<<8)); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x45, 0); /* Vertical GRAM Start Address */
+ wr_reg(0x46, WIDTH-1); /* Vertical GRAM End Address (-1) */
+ }
+ else
+ {
+ wr_reg(0x50, 0); /* Horizontal GRAM Start Address */
+ wr_reg(0x51, HEIGHT-1); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x52, 0); /* Vertical GRAM Start Address */
+ wr_reg(0x53, WIDTH-1); /* Vertical GRAM End Address (-1) */
+ }
+}
+
+/*******************************************************************************
+* Set draw window region *
+* Parameter: *
+* Return: *
+*******************************************************************************/
+
+void GLCD_Window (int x1, int y1, int x2, int y2) {
+
+ if(driverCode==0x8989)
+ {
+// wr_reg(0x44, x1); /* Horizontal GRAM Start Address */
+// wr_reg(0x44, 0 | (x2<<8)); /* Horizontal GRAM End Address */
+
+//Note x,y flipped
+ wr_reg(0x44, ((y2 & 0xFF) <<8) | (y1 & 0xFF)); /* Horizontal GRAM End Address | Start Address */
+ wr_reg(0x45, x1); /* Vertical GRAM Start Address */
+ wr_reg(0x46, x2); /* Vertical GRAM End Address */
+
+ wr_reg(0x4e, y1); // Init x,y to start of window
+ wr_reg(0x4f, x1);
+ }
+ else
+ {
+ wr_reg(0x50, x1); /* Horizontal GRAM Start Address */
+ wr_reg(0x51, x2); /* Horizontal GRAM End Address */
+ wr_reg(0x52, y1); /* Vertical GRAM Start Address */
+ wr_reg(0x53, y2); /* Vertical GRAM End Address */
+ }
+}
+
+/*******************************************************************************
+* Draw a pixel in foreground color *
+* Parameter: x: horizontal position *
+* y: vertical position *
+* Return: *
+*******************************************************************************/
+
+void GLCD_PutPixel (unsigned int x, unsigned int y) {
+ // Set Cursor
+ if(driverCode==0x8989)
+ {
+ wr_reg(0x4e, y);
+ wr_reg(0x4f, WIDTH-1-x);
+ }
+ else
+ {
+ wr_reg(0x20, y);
+ wr_reg(0x21, WIDTH-1-x);
+ }
+ LCD_CS(0)
+ wr_cmd(0x22);
+ wr_dat(TextColor);
+ LCD_CS(1)
+}
+
+
+/*******************************************************************************
+* Set foreground color *
+* Parameter: color: foreground color *
+* Return: *
+*******************************************************************************/
+
+void GLCD_SetTextColor (unsigned short color) {
+
+ TextColor = color;
+}
+
+
+/*******************************************************************************
+* Set background color *
+* Parameter: color: background color *
+* Return: *
+*******************************************************************************/
+
+void GLCD_SetBackColor (unsigned short color) {
+
+ BackColor = color;
+}
+
+
+/*******************************************************************************
+* Clear display *
+* Parameter: color: display clearing color *
+* Return: *
+*******************************************************************************/
+
+void GLCD_Clear (unsigned short color) {
+ unsigned int i;
+
+ GLCD_WindowMax();
+
+ // Set Cursor
+ if(driverCode==0x8989)
+ {
+ wr_reg(0x4e, 0);
+ wr_reg(0x4f, 0);
+ }
+ else
+ {
+ wr_reg(0x20, 0);
+ wr_reg(0x21, 0);
+ }
+ LCD_CS(0)
+ wr_cmd(0x22);
+ wr_dat_start();
+ for(i = 0; i < (WIDTH*HEIGHT); i++)
+ wr_dat_only(color);
+ wr_dat_stop();
+}
+
+
+/*******************************************************************************
+* Draw character on given position *
+* Parameter: x: horizontal position *
+* y: vertical position *
+* c: pointer to character bitmap *
+* Return: *
+*******************************************************************************/
+
+void GLCD_DrawChar (unsigned int x, unsigned int y, unsigned short *c) {
+ int idx = 0, i, j;
+
+ x = WIDTH-x-CHAR_W;
+
+ if(driverCode==0x8989)
+ {
+ wr_reg(0x44, y); /* Horizontal GRAM Start Address */
+ wr_reg(0x44, y |((y+CHAR_H-1)<<8)); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x45, x); /* Vertical GRAM Start Address */
+ wr_reg(0x46, x+CHAR_W-1); /* Vertical GRAM End Address (-1) */
+
+ wr_reg(0x4e, y);
+ wr_reg(0x4f, x);
+ }
+ else
+ {
+ wr_reg(0x50, y); /* Horizontal GRAM Start Address */
+ wr_reg(0x51, y+CHAR_H-1); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x52, x); /* Vertical GRAM Start Address */
+ wr_reg(0x53, x+CHAR_W-1); /* Vertical GRAM End Address (-1) */
+
+ wr_reg(0x20, y);
+ wr_reg(0x21, x);
+ }
+ LCD_CS(0)
+ wr_cmd(0x22);
+ wr_dat_start();
+ for (j = 0; j < CHAR_H; j++) {
+ for (i = CHAR_W-1; i >= 0; i--) {
+ if((c[idx] & (1 << i)) == 0x00) {
+ wr_dat_only(BackColor);
+ } else {
+ wr_dat_only(TextColor);
+ }
+ }
+ c++;
+ }
+ wr_dat_stop();
+}
+
+
+/*******************************************************************************
+* Display character on given line *
+* Parameter: ln: line number *
+* col: column number *
+* c: ascii character *
+* Return: *
+*******************************************************************************/
+
+void GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char c) {
+
+ c -= 32;
+ GLCD_DrawChar(col * CHAR_W, ln * CHAR_H, (unsigned short *)&Font_24x16[c * CHAR_H]);
+}
+
+
+/*******************************************************************************
+* Disply string on given line *
+* Parameter: ln: line number *
+* col: column number *
+* s: pointer to string *
+* Return: *
+*******************************************************************************/
+
+void GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char *s) {
+
+ GLCD_WindowMax();
+ while (*s) {
+ GLCD_DisplayChar(ln, col++, *s++);
+ }
+}
+
+
+/*******************************************************************************
+* Clear given line *
+* Parameter: ln: line number *
+* Return: *
+*******************************************************************************/
+
+void GLCD_ClearLn (unsigned int ln) {
+
+ GLCD_WindowMax();
+ GLCD_DisplayString(ln, 0, (unsigned char*) " ");
+}
+
+//SSD1289
+//static void lcd_SetCursor(unsigned int x,unsigned int y)
+//{
+// write_reg(0x004e,x); /* 0-239 */
+// write_reg(0x004f,y); /* 0-319 */
+//}
+
+
+void GLCD_drawHLine(int x, int y, int l)
+{
+// char ch, cl;
+
+// ch=((fcolorr&248)|fcolorg>>5);
+// cl=((fcolorg&28)<<3|fcolorb>>3);
+
+// cbi(P_CS, B_CS);
+
+ GLCD_Window (x, y, x+l, y);
+
+// for (int i=0; i<l+1; i++)
+// {
+// LCD_Write_DATA(ch, cl);
+// }
+
+ LCD_CS(0)
+ wr_cmd(0x22);
+
+ wr_dat_start();
+ for (int i=0; i<l; i++)
+ wr_dat_only(TextColor);
+ wr_dat_stop();
+
+// sbi(P_CS, B_CS);
+// clrXY();
+ GLCD_WindowMax();
+}
+
+void GLCD_drawVLine(int x, int y, int l)
+{
+// char ch, cl;
+
+// ch=((fcolorr&248)|fcolorg>>5);
+// cl=((fcolorg&28)<<3|fcolorb>>3);
+
+// cbi(P_CS, B_CS);
+ GLCD_Window(x, y, x, y+l);
+// for (int i=0; i<l; i++)
+// {
+// GLCD_wr_dat(ch, cl);
+// }
+ LCD_CS(0)
+ wr_cmd(0x22);
+
+ wr_dat_start();
+ for (int i=0; i<l; i++)
+ wr_dat_only(TextColor);
+ wr_dat_stop();
+
+
+// sbi(P_CS, B_CS);
+// clrXY();
+ GLCD_WindowMax();
+}
+
+
+void GLCD_drawRect(int x1, int y1, int x2, int y2)
+{
+ int tmp;
+
+ if (x1>x2)
+ {
+ swap(int, x1, x2);
+ }
+ if (y1>y2)
+ {
+ swap(int, y1, y2);
+ }
+
+ GLCD_drawHLine(x1, y1, x2-x1);
+ GLCD_drawHLine(x1, y2, x2-x1);
+ GLCD_drawVLine(x1, y1, y2-y1);
+ GLCD_drawVLine(x2, y1, y2-y1);
+}
+
+
+
+
+/*******************************************************************************
+* Draw bargraph *
+* Parameter: x: horizontal position *
+* y: vertical position *
+* w: maximum width of bargraph (in pixels) *
+* val: value of active bargraph (in 1/1024) *
+* Return: *
+*******************************************************************************/
+
+void GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val) {
+ int i,j;
+
+ x = WIDTH-x-w;
+ if(driverCode==0x8989)
+ {
+ wr_reg(0x44, y); /* Horizontal GRAM Start Address */
+ wr_reg(0x44, y |((y+CHAR_H-1)<<8)); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x45, x); /* Vertical GRAM Start Address */
+ wr_reg(0x46, x+w-1); /* Vertical GRAM End Address (-1) */
+ }
+ else
+ {
+ wr_reg(0x50, y); /* Horizontal GRAM Start Address */
+ wr_reg(0x51, y+CHAR_H-1); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x52, x); /* Vertical GRAM Start Address */
+ wr_reg(0x53, x+w-1); /* Vertical GRAM End Address (-1) */
+ }
+
+ val = (val * w) >> 10; /* Scale value for 24x12 characters */
+ if(driverCode==0x8989)
+ {
+ wr_reg(0x4e, y);
+ wr_reg(0x4f, x);
+ }
+ else
+ {
+ wr_reg(0x20, y);
+ wr_reg(0x21, x);
+ }
+ LCD_CS(0)
+ wr_cmd(0x22);
+ wr_dat_start();
+ for (i = 0; i < h; i++) {
+ for (j = w-1; j >= 0; j--) {
+ if(j >= val) {
+ wr_dat_only(BackColor);
+ } else {
+ wr_dat_only(TextColor);
+ }
+ }
+ }
+ wr_dat_stop();
+}
+
+
+/*******************************************************************************
+* Display graphical bitmap image at position x horizontally and y vertically *
+* (This function is optimized for 16 bits per pixel format, it has to be *
+* adapted for any other bits per pixel format) *
+* Parameter: x: horizontal position *
+* y: vertical position *
+* w: width of bitmap *
+* h: height of bitmap *
+* bitmap: address at which the bitmap data resides *
+* Return: *
+*******************************************************************************/
+
+void GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap) {
+ unsigned int i, j;
+ unsigned short *bitmap_ptr = (unsigned short *)bitmap;
+
+ x = WIDTH-x-w;
+ if(driverCode==0x8989)
+ {
+ wr_reg(0x44, y); /* Horizontal GRAM Start Address */
+ wr_reg(0x44, y |((y+h-1)<<8)); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x45, x); /* Vertical GRAM Start Address */
+ wr_reg(0x46, x+w-1); /* Vertical GRAM End Address (-1) */
+ wr_reg(0x4e, y);
+ wr_reg(0x4f, x);
+ }
+ else
+ {
+ wr_reg(0x50, y); /* Horizontal GRAM Start Address */
+ wr_reg(0x51, y+h-1); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x52, x); /* Vertical GRAM Start Address */
+ wr_reg(0x53, x+w-1); /* Vertical GRAM End Address (-1) */
+ wr_reg(0x20, y);
+ wr_reg(0x21, x);
+ }
+ LCD_CS(0)
+ wr_cmd(0x22);
+ wr_dat_start();
+ for (j = 0; j < h; j++) {
+ bitmap_ptr += w-1;
+ for (i = 0; i < w; i++) {
+ wr_dat_only(*bitmap_ptr--);
+ }
+ bitmap_ptr += w+1;
+ }
+ wr_dat_stop();
+}
+
+
+/*******************************************************************************
+* Display graphical bmp file image at position x horizontally and y vertically *
+* (This function is optimized for 16 bits per pixel format, it has to be *
+* adapted for any other bits per pixel format) *
+* Parameter: x: horizontal position *
+* y: vertical position *
+* w: width of bitmap *
+* h: height of bitmap *
+* bmp: address at which the bmp data resides *
+* Return: *
+*******************************************************************************/
+
+void GLCD_Bmp (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bmp) {
+ unsigned int i, j;
+ unsigned short *bitmap_ptr = (unsigned short *)bmp;
+
+ x = WIDTH-x-w;
+
+ if(driverCode==0x8989)
+ {
+ wr_reg(0x44, y); /* Horizontal GRAM Start Address */
+ wr_reg(0x44, y |((y+h-1)<<8)); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x45, x); /* Vertical GRAM Start Address */
+ wr_reg(0x46, x+w-1); /* Vertical GRAM End Address (-1) */
+ wr_reg(0x4e, y);
+ wr_reg(0x4f, x);
+ }
+ else
+ {
+ wr_reg(0x50, y); /* Horizontal GRAM Start Address */
+ wr_reg(0x51, y+h-1); /* Horizontal GRAM End Address (-1) */
+ wr_reg(0x52, x); /* Vertical GRAM Start Address */
+ wr_reg(0x53, x+w-1); /* Vertical GRAM End Address (-1) */
+ wr_reg(0x20, y);
+ wr_reg(0x21, x);
+ }
+ LCD_CS(0)
+ wr_cmd(0x22);
+ wr_dat_start();
+ bitmap_ptr += (h*w)-1;
+ for (j = 0; j < h; j++) {
+ for (i = 0; i < w; i++) {
+ wr_dat_only(*bitmap_ptr--);
+ }
+ }
+ wr_dat_stop();
+}
+
+/******************************************************************************/