Wim Huiskamp / PCF8574_Bus

PCF8574 I2C Portexpanders used to provide data, address and controlbus interface

Dependents:   mbed_bus

PCF8574_EnableBus.h@0:12207c70f4ea, 2015-01-25 (annotated)

Committer:
wim
Date:
Sun Jan 25 17:50:03 2015 +0000
Revision:
0:12207c70f4ea
PCF8574 Bus Class. First release, converted into lib.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 0:12207c70f4ea 1 /* PCF8574_EnableBus - Use the PCF8574 I2C Port Extender for controlling the Chip Enable Bus
wim 0:12207c70f4ea 2 * Copyright (c) 2011 Wim Huiskamp
wim 0:12207c70f4ea 3 *
wim 0:12207c70f4ea 4 * Released under the MIT License: http://mbed.org/license/mit
wim 0:12207c70f4ea 5 *
wim 0:12207c70f4ea 6 * version 0.2 Initial Release
wim 0:12207c70f4ea 7 */
wim 0:12207c70f4ea 8 #ifndef _PCF8574_ENABLEBUS_H
wim 0:12207c70f4ea 9 #define _PCF8574_ENABLEBUS_H
wim 0:12207c70f4ea 10
wim 0:12207c70f4ea 11 //Pin Defines for PCF8574 Enable Bus
wim 0:12207c70f4ea 12 //Note: 'Reset' causes all devices on the 'Control & Display Unit' to be reset!
wim 0:12207c70f4ea 13 #define D_CS_SWITCH 0x01
wim 0:12207c70f4ea 14 #define D_LATCHEN_1 0x02
wim 0:12207c70f4ea 15 #define D_LATCHEN_2 0x04
wim 0:12207c70f4ea 16 #define D_CS_BRIGHT 0x08
wim 0:12207c70f4ea 17 #define D_CS_DISP 0x10
wim 0:12207c70f4ea 18 #define D_CS_SPARE 0x20
wim 0:12207c70f4ea 19 #define D_RESET 0x40
wim 0:12207c70f4ea 20 #define D_NOGO 0x80
wim 0:12207c70f4ea 21
wim 0:12207c70f4ea 22 #define D_ENABLE_MSK 0x3F
wim 0:12207c70f4ea 23
wim 0:12207c70f4ea 24 //Enums for Enable Bus
wim 0:12207c70f4ea 25 #include "BusEnums.h"
wim 0:12207c70f4ea 26 enum CS_Pin { CS_SWITCH, LATCHEN_1, LATCHEN_2, CS_BRIGHT, CS_DISP, CS_SPARE };
wim 0:12207c70f4ea 27
wim 0:12207c70f4ea 28
wim 0:12207c70f4ea 29 /** Create an PCF8574_EnableBus object connected to the specified I2C object and using the specified deviceAddress
wim 0:12207c70f4ea 30 *
wim 0:12207c70f4ea 31 * @param I2C &i2c the I2C port to connect to
wim 0:12207c70f4ea 32 * @param char deviceAddress the address of the PCF8574
wim 0:12207c70f4ea 33 */
wim 0:12207c70f4ea 34 class PCF8574_EnableBus {
wim 0:12207c70f4ea 35 public:
wim 0:12207c70f4ea 36 PCF8574_EnableBus(I2C &i2c, char deviceAddress);
wim 0:12207c70f4ea 37 void chipselect (CS_Pin cs_pin, Bit_Level cs_level);
wim 0:12207c70f4ea 38 void reset (Bit_Level rst_level);
wim 0:12207c70f4ea 39 void nogo (Bit_Level nogo_level);
wim 0:12207c70f4ea 40 protected:
wim 0:12207c70f4ea 41 I2C &_i2c;
wim 0:12207c70f4ea 42 char _readOpcode;
wim 0:12207c70f4ea 43 char _writeOpcode;
wim 0:12207c70f4ea 44 char _enable_bus;
wim 0:12207c70f4ea 45 char _reset_pin;
wim 0:12207c70f4ea 46 char _nogo_pin;
wim 0:12207c70f4ea 47 // char _read();
wim 0:12207c70f4ea 48 void _write();
wim 0:12207c70f4ea 49 void _write(char byte);
wim 0:12207c70f4ea 50 void _init();
wim 0:12207c70f4ea 51 };
wim 0:12207c70f4ea 52
wim 0:12207c70f4ea 53 #endif