stephen mathenge
/
Level_estimation_Maesurement
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Dependencies: Cayenne-LPP SDBlockDevice
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sx1272Regs-Fsk.h
00001 /** 00002 / _____) _ | | 00003 ( (____ _____ ____ _| |_ _____ ____| |__ 00004 \____ \| ___ | (_ _) ___ |/ ___) _ \ 00005 _____) ) ____| | | || |_| ____( (___| | | | 00006 (______/|_____)_|_|_| \__)_____)\____)_| |_| 00007 (C) 2015 Semtech 00008 00009 Description: SX1272 FSK modem registers and bits definitions 00010 00011 License: Revised BSD License, see LICENSE.TXT file include in the project 00012 00013 Maintainer: Miguel Luis and Gregory Cristian 00014 00015 Copyright (c) 2017, Arm Limited and affiliates. 00016 00017 SPDX-License-Identifier: BSD-3-Clause 00018 */ 00019 #ifndef __SX1272_REGS_FSK_H__ 00020 #define __SX1272_REGS_FSK_H__ 00021 00022 /*! 00023 * ============================================================================ 00024 * SX1272 Internal registers Address 00025 * ============================================================================ 00026 */ 00027 #define REG_FIFO 0x00 00028 // Common settings 00029 #define REG_OPMODE 0x01 00030 #define REG_BITRATEMSB 0x02 00031 #define REG_BITRATELSB 0x03 00032 #define REG_FDEVMSB 0x04 00033 #define REG_FDEVLSB 0x05 00034 #define REG_FRFMSB 0x06 00035 #define REG_FRFMID 0x07 00036 #define REG_FRFLSB 0x08 00037 // Tx settings 00038 #define REG_PACONFIG 0x09 00039 #define REG_PARAMP 0x0A 00040 #define REG_OCP 0x0B 00041 // Rx settings 00042 #define REG_LNA 0x0C 00043 #define REG_RXCONFIG 0x0D 00044 #define REG_RSSICONFIG 0x0E 00045 #define REG_RSSICOLLISION 0x0F 00046 #define REG_RSSITHRESH 0x10 00047 #define REG_RSSIVALUE 0x11 00048 #define REG_RXBW 0x12 00049 #define REG_AFCBW 0x13 00050 #define REG_OOKPEAK 0x14 00051 #define REG_OOKFIX 0x15 00052 #define REG_OOKAVG 0x16 00053 #define REG_RES17 0x17 00054 #define REG_RES18 0x18 00055 #define REG_RES19 0x19 00056 #define REG_AFCFEI 0x1A 00057 #define REG_AFCMSB 0x1B 00058 #define REG_AFCLSB 0x1C 00059 #define REG_FEIMSB 0x1D 00060 #define REG_FEILSB 0x1E 00061 #define REG_PREAMBLEDETECT 0x1F 00062 #define REG_RXTIMEOUT1 0x20 00063 #define REG_RXTIMEOUT2 0x21 00064 #define REG_RXTIMEOUT3 0x22 00065 #define REG_RXDELAY 0x23 00066 // Oscillator settings 00067 #define REG_OSC 0x24 00068 // Packet handler settings 00069 #define REG_PREAMBLEMSB 0x25 00070 #define REG_PREAMBLELSB 0x26 00071 #define REG_SYNCCONFIG 0x27 00072 #define REG_SYNCVALUE1 0x28 00073 #define REG_SYNCVALUE2 0x29 00074 #define REG_SYNCVALUE3 0x2A 00075 #define REG_SYNCVALUE4 0x2B 00076 #define REG_SYNCVALUE5 0x2C 00077 #define REG_SYNCVALUE6 0x2D 00078 #define REG_SYNCVALUE7 0x2E 00079 #define REG_SYNCVALUE8 0x2F 00080 #define REG_PACKETCONFIG1 0x30 00081 #define REG_PACKETCONFIG2 0x31 00082 #define REG_PAYLOADLENGTH 0x32 00083 #define REG_NODEADRS 0x33 00084 #define REG_BROADCASTADRS 0x34 00085 #define REG_FIFOTHRESH 0x35 00086 // SM settings 00087 #define REG_SEQCONFIG1 0x36 00088 #define REG_SEQCONFIG2 0x37 00089 #define REG_TIMERRESOL 0x38 00090 #define REG_TIMER1COEF 0x39 00091 #define REG_TIMER2COEF 0x3A 00092 // Service settings 00093 #define REG_IMAGECAL 0x3B 00094 #define REG_TEMP 0x3C 00095 #define REG_LOWBAT 0x3D 00096 // Status 00097 #define REG_IRQFLAGS1 0x3E 00098 #define REG_IRQFLAGS2 0x3F 00099 // I/O settings 00100 #define REG_DIOMAPPING1 0x40 00101 #define REG_DIOMAPPING2 0x41 00102 // Version 00103 #define REG_VERSION 0x42 00104 // Additional settings 00105 #define REG_AGCREF 0x43 00106 #define REG_AGCTHRESH1 0x44 00107 #define REG_AGCTHRESH2 0x45 00108 #define REG_AGCTHRESH3 0x46 00109 #define REG_PLLHOP 0x4B 00110 #define REG_TCXO 0x58 00111 #define REG_PADAC 0x5A 00112 #define REG_PLL 0x5C 00113 #define REG_PLLLOWPN 0x5E 00114 #define REG_FORMERTEMP 0x6C 00115 #define REG_BITRATEFRAC 0x70 00116 00117 /*! 00118 * ============================================================================ 00119 * SX1272 FSK bits control definition 00120 * ============================================================================ 00121 */ 00122 00123 /*! 00124 * RegFifo 00125 */ 00126 00127 /*! 00128 * RegOpMode 00129 */ 00130 #define RF_OPMODE_LONGRANGEMODE_MASK 0x7F 00131 #define RF_OPMODE_LONGRANGEMODE_OFF 0x00 00132 #define RF_OPMODE_LONGRANGEMODE_ON 0x80 00133 00134 #define RF_OPMODE_MODULATIONTYPE_MASK 0x9F 00135 #define RF_OPMODE_MODULATIONTYPE_FSK 0x00 // Default 00136 #define RF_OPMODE_MODULATIONTYPE_OOK 0x20 00137 00138 #define RF_OPMODE_MODULATIONSHAPING_MASK 0xE7 00139 #define RF_OPMODE_MODULATIONSHAPING_00 0x00 // Default 00140 #define RF_OPMODE_MODULATIONSHAPING_01 0x08 00141 #define RF_OPMODE_MODULATIONSHAPING_10 0x10 00142 #define RF_OPMODE_MODULATIONSHAPING_11 0x18 00143 00144 #define RF_OPMODE_MASK 0xF8 00145 #define RF_OPMODE_SLEEP 0x00 00146 #define RF_OPMODE_STANDBY 0x01 // Default 00147 #define RF_OPMODE_SYNTHESIZER_TX 0x02 00148 #define RF_OPMODE_TRANSMITTER 0x03 00149 #define RF_OPMODE_SYNTHESIZER_RX 0x04 00150 #define RF_OPMODE_RECEIVER 0x05 00151 00152 /*! 00153 * RegBitRate (bits/sec) 00154 */ 00155 #define RF_BITRATEMSB_1200_BPS 0x68 00156 #define RF_BITRATELSB_1200_BPS 0x2B 00157 #define RF_BITRATEMSB_2400_BPS 0x34 00158 #define RF_BITRATELSB_2400_BPS 0x15 00159 #define RF_BITRATEMSB_4800_BPS 0x1A // Default 00160 #define RF_BITRATELSB_4800_BPS 0x0B // Default 00161 #define RF_BITRATEMSB_9600_BPS 0x0D 00162 #define RF_BITRATELSB_9600_BPS 0x05 00163 #define RF_BITRATEMSB_15000_BPS 0x08 00164 #define RF_BITRATELSB_15000_BPS 0x55 00165 #define RF_BITRATEMSB_19200_BPS 0x06 00166 #define RF_BITRATELSB_19200_BPS 0x83 00167 #define RF_BITRATEMSB_38400_BPS 0x03 00168 #define RF_BITRATELSB_38400_BPS 0x41 00169 #define RF_BITRATEMSB_76800_BPS 0x01 00170 #define RF_BITRATELSB_76800_BPS 0xA1 00171 #define RF_BITRATEMSB_153600_BPS 0x00 00172 #define RF_BITRATELSB_153600_BPS 0xD0 00173 #define RF_BITRATEMSB_57600_BPS 0x02 00174 #define RF_BITRATELSB_57600_BPS 0x2C 00175 #define RF_BITRATEMSB_115200_BPS 0x01 00176 #define RF_BITRATELSB_115200_BPS 0x16 00177 #define RF_BITRATEMSB_12500_BPS 0x0A 00178 #define RF_BITRATELSB_12500_BPS 0x00 00179 #define RF_BITRATEMSB_25000_BPS 0x05 00180 #define RF_BITRATELSB_25000_BPS 0x00 00181 #define RF_BITRATEMSB_50000_BPS 0x02 00182 #define RF_BITRATELSB_50000_BPS 0x80 00183 #define RF_BITRATEMSB_100000_BPS 0x01 00184 #define RF_BITRATELSB_100000_BPS 0x40 00185 #define RF_BITRATEMSB_150000_BPS 0x00 00186 #define RF_BITRATELSB_150000_BPS 0xD5 00187 #define RF_BITRATEMSB_200000_BPS 0x00 00188 #define RF_BITRATELSB_200000_BPS 0xA0 00189 #define RF_BITRATEMSB_250000_BPS 0x00 00190 #define RF_BITRATELSB_250000_BPS 0x80 00191 #define RF_BITRATEMSB_32768_BPS 0x03 00192 #define RF_BITRATELSB_32768_BPS 0xD1 00193 00194 /*! 00195 * RegFdev (Hz) 00196 */ 00197 #define RF_FDEVMSB_2000_HZ 0x00 00198 #define RF_FDEVLSB_2000_HZ 0x21 00199 #define RF_FDEVMSB_5000_HZ 0x00 // Default 00200 #define RF_FDEVLSB_5000_HZ 0x52 // Default 00201 #define RF_FDEVMSB_10000_HZ 0x00 00202 #define RF_FDEVLSB_10000_HZ 0xA4 00203 #define RF_FDEVMSB_15000_HZ 0x00 00204 #define RF_FDEVLSB_15000_HZ 0xF6 00205 #define RF_FDEVMSB_20000_HZ 0x01 00206 #define RF_FDEVLSB_20000_HZ 0x48 00207 #define RF_FDEVMSB_25000_HZ 0x01 00208 #define RF_FDEVLSB_25000_HZ 0x9A 00209 #define RF_FDEVMSB_30000_HZ 0x01 00210 #define RF_FDEVLSB_30000_HZ 0xEC 00211 #define RF_FDEVMSB_35000_HZ 0x02 00212 #define RF_FDEVLSB_35000_HZ 0x3D 00213 #define RF_FDEVMSB_40000_HZ 0x02 00214 #define RF_FDEVLSB_40000_HZ 0x8F 00215 #define RF_FDEVMSB_45000_HZ 0x02 00216 #define RF_FDEVLSB_45000_HZ 0xE1 00217 #define RF_FDEVMSB_50000_HZ 0x03 00218 #define RF_FDEVLSB_50000_HZ 0x33 00219 #define RF_FDEVMSB_55000_HZ 0x03 00220 #define RF_FDEVLSB_55000_HZ 0x85 00221 #define RF_FDEVMSB_60000_HZ 0x03 00222 #define RF_FDEVLSB_60000_HZ 0xD7 00223 #define RF_FDEVMSB_65000_HZ 0x04 00224 #define RF_FDEVLSB_65000_HZ 0x29 00225 #define RF_FDEVMSB_70000_HZ 0x04 00226 #define RF_FDEVLSB_70000_HZ 0x7B 00227 #define RF_FDEVMSB_75000_HZ 0x04 00228 #define RF_FDEVLSB_75000_HZ 0xCD 00229 #define RF_FDEVMSB_80000_HZ 0x05 00230 #define RF_FDEVLSB_80000_HZ 0x1F 00231 #define RF_FDEVMSB_85000_HZ 0x05 00232 #define RF_FDEVLSB_85000_HZ 0x71 00233 #define RF_FDEVMSB_90000_HZ 0x05 00234 #define RF_FDEVLSB_90000_HZ 0xC3 00235 #define RF_FDEVMSB_95000_HZ 0x06 00236 #define RF_FDEVLSB_95000_HZ 0x14 00237 #define RF_FDEVMSB_100000_HZ 0x06 00238 #define RF_FDEVLSB_100000_HZ 0x66 00239 #define RF_FDEVMSB_110000_HZ 0x07 00240 #define RF_FDEVLSB_110000_HZ 0x0A 00241 #define RF_FDEVMSB_120000_HZ 0x07 00242 #define RF_FDEVLSB_120000_HZ 0xAE 00243 #define RF_FDEVMSB_130000_HZ 0x08 00244 #define RF_FDEVLSB_130000_HZ 0x52 00245 #define RF_FDEVMSB_140000_HZ 0x08 00246 #define RF_FDEVLSB_140000_HZ 0xF6 00247 #define RF_FDEVMSB_150000_HZ 0x09 00248 #define RF_FDEVLSB_150000_HZ 0x9A 00249 #define RF_FDEVMSB_160000_HZ 0x0A 00250 #define RF_FDEVLSB_160000_HZ 0x3D 00251 #define RF_FDEVMSB_170000_HZ 0x0A 00252 #define RF_FDEVLSB_170000_HZ 0xE1 00253 #define RF_FDEVMSB_180000_HZ 0x0B 00254 #define RF_FDEVLSB_180000_HZ 0x85 00255 #define RF_FDEVMSB_190000_HZ 0x0C 00256 #define RF_FDEVLSB_190000_HZ 0x29 00257 #define RF_FDEVMSB_200000_HZ 0x0C 00258 #define RF_FDEVLSB_200000_HZ 0xCD 00259 00260 /*! 00261 * RegFrf (MHz) 00262 */ 00263 #define RF_FRFMSB_863_MHZ 0xD7 00264 #define RF_FRFMID_863_MHZ 0xC0 00265 #define RF_FRFLSB_863_MHZ 0x00 00266 #define RF_FRFMSB_864_MHZ 0xD8 00267 #define RF_FRFMID_864_MHZ 0x00 00268 #define RF_FRFLSB_864_MHZ 0x00 00269 #define RF_FRFMSB_865_MHZ 0xD8 00270 #define RF_FRFMID_865_MHZ 0x40 00271 #define RF_FRFLSB_865_MHZ 0x00 00272 #define RF_FRFMSB_866_MHZ 0xD8 00273 #define RF_FRFMID_866_MHZ 0x80 00274 #define RF_FRFLSB_866_MHZ 0x00 00275 #define RF_FRFMSB_867_MHZ 0xD8 00276 #define RF_FRFMID_867_MHZ 0xC0 00277 #define RF_FRFLSB_867_MHZ 0x00 00278 #define RF_FRFMSB_868_MHZ 0xD9 00279 #define RF_FRFMID_868_MHZ 0x00 00280 #define RF_FRFLSB_868_MHZ 0x00 00281 #define RF_FRFMSB_869_MHZ 0xD9 00282 #define RF_FRFMID_869_MHZ 0x40 00283 #define RF_FRFLSB_869_MHZ 0x00 00284 #define RF_FRFMSB_870_MHZ 0xD9 00285 #define RF_FRFMID_870_MHZ 0x80 00286 #define RF_FRFLSB_870_MHZ 0x00 00287 00288 #define RF_FRFMSB_902_MHZ 0xE1 00289 #define RF_FRFMID_902_MHZ 0x80 00290 #define RF_FRFLSB_902_MHZ 0x00 00291 #define RF_FRFMSB_903_MHZ 0xE1 00292 #define RF_FRFMID_903_MHZ 0xC0 00293 #define RF_FRFLSB_903_MHZ 0x00 00294 #define RF_FRFMSB_904_MHZ 0xE2 00295 #define RF_FRFMID_904_MHZ 0x00 00296 #define RF_FRFLSB_904_MHZ 0x00 00297 #define RF_FRFMSB_905_MHZ 0xE2 00298 #define RF_FRFMID_905_MHZ 0x40 00299 #define RF_FRFLSB_905_MHZ 0x00 00300 #define RF_FRFMSB_906_MHZ 0xE2 00301 #define RF_FRFMID_906_MHZ 0x80 00302 #define RF_FRFLSB_906_MHZ 0x00 00303 #define RF_FRFMSB_907_MHZ 0xE2 00304 #define RF_FRFMID_907_MHZ 0xC0 00305 #define RF_FRFLSB_907_MHZ 0x00 00306 #define RF_FRFMSB_908_MHZ 0xE3 00307 #define RF_FRFMID_908_MHZ 0x00 00308 #define RF_FRFLSB_908_MHZ 0x00 00309 #define RF_FRFMSB_909_MHZ 0xE3 00310 #define RF_FRFMID_909_MHZ 0x40 00311 #define RF_FRFLSB_909_MHZ 0x00 00312 #define RF_FRFMSB_910_MHZ 0xE3 00313 #define RF_FRFMID_910_MHZ 0x80 00314 #define RF_FRFLSB_910_MHZ 0x00 00315 #define RF_FRFMSB_911_MHZ 0xE3 00316 #define RF_FRFMID_911_MHZ 0xC0 00317 #define RF_FRFLSB_911_MHZ 0x00 00318 #define RF_FRFMSB_912_MHZ 0xE4 00319 #define RF_FRFMID_912_MHZ 0x00 00320 #define RF_FRFLSB_912_MHZ 0x00 00321 #define RF_FRFMSB_913_MHZ 0xE4 00322 #define RF_FRFMID_913_MHZ 0x40 00323 #define RF_FRFLSB_913_MHZ 0x00 00324 #define RF_FRFMSB_914_MHZ 0xE4 00325 #define RF_FRFMID_914_MHZ 0x80 00326 #define RF_FRFLSB_914_MHZ 0x00 00327 #define RF_FRFMSB_915_MHZ 0xE4 // Default 00328 #define RF_FRFMID_915_MHZ 0xC0 // Default 00329 #define RF_FRFLSB_915_MHZ 0x00 // Default 00330 #define RF_FRFMSB_916_MHZ 0xE5 00331 #define RF_FRFMID_916_MHZ 0x00 00332 #define RF_FRFLSB_916_MHZ 0x00 00333 #define RF_FRFMSB_917_MHZ 0xE5 00334 #define RF_FRFMID_917_MHZ 0x40 00335 #define RF_FRFLSB_917_MHZ 0x00 00336 #define RF_FRFMSB_918_MHZ 0xE5 00337 #define RF_FRFMID_918_MHZ 0x80 00338 #define RF_FRFLSB_918_MHZ 0x00 00339 #define RF_FRFMSB_919_MHZ 0xE5 00340 #define RF_FRFMID_919_MHZ 0xC0 00341 #define RF_FRFLSB_919_MHZ 0x00 00342 #define RF_FRFMSB_920_MHZ 0xE6 00343 #define RF_FRFMID_920_MHZ 0x00 00344 #define RF_FRFLSB_920_MHZ 0x00 00345 #define RF_FRFMSB_921_MHZ 0xE6 00346 #define RF_FRFMID_921_MHZ 0x40 00347 #define RF_FRFLSB_921_MHZ 0x00 00348 #define RF_FRFMSB_922_MHZ 0xE6 00349 #define RF_FRFMID_922_MHZ 0x80 00350 #define RF_FRFLSB_922_MHZ 0x00 00351 #define RF_FRFMSB_923_MHZ 0xE6 00352 #define RF_FRFMID_923_MHZ 0xC0 00353 #define RF_FRFLSB_923_MHZ 0x00 00354 #define RF_FRFMSB_924_MHZ 0xE7 00355 #define RF_FRFMID_924_MHZ 0x00 00356 #define RF_FRFLSB_924_MHZ 0x00 00357 #define RF_FRFMSB_925_MHZ 0xE7 00358 #define RF_FRFMID_925_MHZ 0x40 00359 #define RF_FRFLSB_925_MHZ 0x00 00360 #define RF_FRFMSB_926_MHZ 0xE7 00361 #define RF_FRFMID_926_MHZ 0x80 00362 #define RF_FRFLSB_926_MHZ 0x00 00363 #define RF_FRFMSB_927_MHZ 0xE7 00364 #define RF_FRFMID_927_MHZ 0xC0 00365 #define RF_FRFLSB_927_MHZ 0x00 00366 #define RF_FRFMSB_928_MHZ 0xE8 00367 #define RF_FRFMID_928_MHZ 0x00 00368 #define RF_FRFLSB_928_MHZ 0x00 00369 00370 /*! 00371 * RegPaConfig 00372 */ 00373 #define RF_PACONFIG_PASELECT_MASK 0x7F 00374 #define RF_PACONFIG_PASELECT_PABOOST 0x80 00375 #define RF_PACONFIG_PASELECT_RFO 0x00 // Default 00376 00377 #define RF_PACONFIG_OUTPUTPOWER_MASK 0xF0 00378 00379 /*! 00380 * RegPaRamp 00381 */ 00382 #define RF_PARAMP_LOWPNTXPLL_MASK 0xEF 00383 #define RF_PARAMP_LOWPNTXPLL_OFF 0x10 // Default 00384 #define RF_PARAMP_LOWPNTXPLL_ON 0x00 00385 00386 #define RF_PARAMP_MASK 0xF0 00387 #define RF_PARAMP_3400_US 0x00 00388 #define RF_PARAMP_2000_US 0x01 00389 #define RF_PARAMP_1000_US 0x02 00390 #define RF_PARAMP_0500_US 0x03 00391 #define RF_PARAMP_0250_US 0x04 00392 #define RF_PARAMP_0125_US 0x05 00393 #define RF_PARAMP_0100_US 0x06 00394 #define RF_PARAMP_0062_US 0x07 00395 #define RF_PARAMP_0050_US 0x08 00396 #define RF_PARAMP_0040_US 0x09 // Default 00397 #define RF_PARAMP_0031_US 0x0A 00398 #define RF_PARAMP_0025_US 0x0B 00399 #define RF_PARAMP_0020_US 0x0C 00400 #define RF_PARAMP_0015_US 0x0D 00401 #define RF_PARAMP_0012_US 0x0E 00402 #define RF_PARAMP_0010_US 0x0F 00403 00404 /*! 00405 * RegOcp 00406 */ 00407 #define RF_OCP_MASK 0xDF 00408 #define RF_OCP_ON 0x20 // Default 00409 #define RF_OCP_OFF 0x00 00410 00411 #define RF_OCP_TRIM_MASK 0xE0 00412 #define RF_OCP_TRIM_045_MA 0x00 00413 #define RF_OCP_TRIM_050_MA 0x01 00414 #define RF_OCP_TRIM_055_MA 0x02 00415 #define RF_OCP_TRIM_060_MA 0x03 00416 #define RF_OCP_TRIM_065_MA 0x04 00417 #define RF_OCP_TRIM_070_MA 0x05 00418 #define RF_OCP_TRIM_075_MA 0x06 00419 #define RF_OCP_TRIM_080_MA 0x07 00420 #define RF_OCP_TRIM_085_MA 0x08 00421 #define RF_OCP_TRIM_090_MA 0x09 00422 #define RF_OCP_TRIM_095_MA 0x0A 00423 #define RF_OCP_TRIM_100_MA 0x0B // Default 00424 #define RF_OCP_TRIM_105_MA 0x0C 00425 #define RF_OCP_TRIM_110_MA 0x0D 00426 #define RF_OCP_TRIM_115_MA 0x0E 00427 #define RF_OCP_TRIM_120_MA 0x0F 00428 #define RF_OCP_TRIM_130_MA 0x10 00429 #define RF_OCP_TRIM_140_MA 0x11 00430 #define RF_OCP_TRIM_150_MA 0x12 00431 #define RF_OCP_TRIM_160_MA 0x13 00432 #define RF_OCP_TRIM_170_MA 0x14 00433 #define RF_OCP_TRIM_180_MA 0x15 00434 #define RF_OCP_TRIM_190_MA 0x16 00435 #define RF_OCP_TRIM_200_MA 0x17 00436 #define RF_OCP_TRIM_210_MA 0x18 00437 #define RF_OCP_TRIM_220_MA 0x19 00438 #define RF_OCP_TRIM_230_MA 0x1A 00439 #define RF_OCP_TRIM_240_MA 0x1B 00440 00441 /*! 00442 * RegLna 00443 */ 00444 #define RF_LNA_GAIN_MASK 0x1F 00445 #define RF_LNA_GAIN_G1 0x20 // Default 00446 #define RF_LNA_GAIN_G2 0x40 00447 #define RF_LNA_GAIN_G3 0x60 00448 #define RF_LNA_GAIN_G4 0x80 00449 #define RF_LNA_GAIN_G5 0xA0 00450 #define RF_LNA_GAIN_G6 0xC0 00451 00452 #define RF_LNA_BOOST_MASK 0xFC 00453 #define RF_LNA_BOOST_OFF 0x00 // Default 00454 #define RF_LNA_BOOST_ON 0x03 00455 00456 /*! 00457 * RegRxConfig 00458 */ 00459 #define RF_RXCONFIG_RESTARTRXONCOLLISION_MASK 0x7F 00460 #define RF_RXCONFIG_RESTARTRXONCOLLISION_ON 0x80 00461 #define RF_RXCONFIG_RESTARTRXONCOLLISION_OFF 0x00 // Default 00462 00463 #define RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK 0x40 // Write only 00464 00465 #define RF_RXCONFIG_RESTARTRXWITHPLLLOCK 0x20 // Write only 00466 00467 #define RF_RXCONFIG_AFCAUTO_MASK 0xEF 00468 #define RF_RXCONFIG_AFCAUTO_ON 0x10 00469 #define RF_RXCONFIG_AFCAUTO_OFF 0x00 // Default 00470 00471 #define RF_RXCONFIG_AGCAUTO_MASK 0xF7 00472 #define RF_RXCONFIG_AGCAUTO_ON 0x08 // Default 00473 #define RF_RXCONFIG_AGCAUTO_OFF 0x00 00474 00475 #define RF_RXCONFIG_RXTRIGER_MASK 0xF8 00476 #define RF_RXCONFIG_RXTRIGER_OFF 0x00 00477 #define RF_RXCONFIG_RXTRIGER_RSSI 0x01 00478 #define RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT 0x06 // Default 00479 #define RF_RXCONFIG_RXTRIGER_RSSI_PREAMBLEDETECT 0x07 00480 00481 /*! 00482 * RegRssiConfig 00483 */ 00484 #define RF_RSSICONFIG_OFFSET_MASK 0x07 00485 #define RF_RSSICONFIG_OFFSET_P_00_DB 0x00 // Default 00486 #define RF_RSSICONFIG_OFFSET_P_01_DB 0x08 00487 #define RF_RSSICONFIG_OFFSET_P_02_DB 0x10 00488 #define RF_RSSICONFIG_OFFSET_P_03_DB 0x18 00489 #define RF_RSSICONFIG_OFFSET_P_04_DB 0x20 00490 #define RF_RSSICONFIG_OFFSET_P_05_DB 0x28 00491 #define RF_RSSICONFIG_OFFSET_P_06_DB 0x30 00492 #define RF_RSSICONFIG_OFFSET_P_07_DB 0x38 00493 #define RF_RSSICONFIG_OFFSET_P_08_DB 0x40 00494 #define RF_RSSICONFIG_OFFSET_P_09_DB 0x48 00495 #define RF_RSSICONFIG_OFFSET_P_10_DB 0x50 00496 #define RF_RSSICONFIG_OFFSET_P_11_DB 0x58 00497 #define RF_RSSICONFIG_OFFSET_P_12_DB 0x60 00498 #define RF_RSSICONFIG_OFFSET_P_13_DB 0x68 00499 #define RF_RSSICONFIG_OFFSET_P_14_DB 0x70 00500 #define RF_RSSICONFIG_OFFSET_P_15_DB 0x78 00501 #define RF_RSSICONFIG_OFFSET_M_16_DB 0x80 00502 #define RF_RSSICONFIG_OFFSET_M_15_DB 0x88 00503 #define RF_RSSICONFIG_OFFSET_M_14_DB 0x90 00504 #define RF_RSSICONFIG_OFFSET_M_13_DB 0x98 00505 #define RF_RSSICONFIG_OFFSET_M_12_DB 0xA0 00506 #define RF_RSSICONFIG_OFFSET_M_11_DB 0xA8 00507 #define RF_RSSICONFIG_OFFSET_M_10_DB 0xB0 00508 #define RF_RSSICONFIG_OFFSET_M_09_DB 0xB8 00509 #define RF_RSSICONFIG_OFFSET_M_08_DB 0xC0 00510 #define RF_RSSICONFIG_OFFSET_M_07_DB 0xC8 00511 #define RF_RSSICONFIG_OFFSET_M_06_DB 0xD0 00512 #define RF_RSSICONFIG_OFFSET_M_05_DB 0xD8 00513 #define RF_RSSICONFIG_OFFSET_M_04_DB 0xE0 00514 #define RF_RSSICONFIG_OFFSET_M_03_DB 0xE8 00515 #define RF_RSSICONFIG_OFFSET_M_02_DB 0xF0 00516 #define RF_RSSICONFIG_OFFSET_M_01_DB 0xF8 00517 00518 #define RF_RSSICONFIG_SMOOTHING_MASK 0xF8 00519 #define RF_RSSICONFIG_SMOOTHING_2 0x00 00520 #define RF_RSSICONFIG_SMOOTHING_4 0x01 00521 #define RF_RSSICONFIG_SMOOTHING_8 0x02 // Default 00522 #define RF_RSSICONFIG_SMOOTHING_16 0x03 00523 #define RF_RSSICONFIG_SMOOTHING_32 0x04 00524 #define RF_RSSICONFIG_SMOOTHING_64 0x05 00525 #define RF_RSSICONFIG_SMOOTHING_128 0x06 00526 #define RF_RSSICONFIG_SMOOTHING_256 0x07 00527 00528 /*! 00529 * RegRssiCollision 00530 */ 00531 #define RF_RSSICOLISION_THRESHOLD 0x0A // Default 00532 00533 /*! 00534 * RegRssiThresh 00535 */ 00536 #define RF_RSSITHRESH_THRESHOLD 0xFF // Default 00537 00538 /*! 00539 * RegRssiValue (Read Only) 00540 */ 00541 00542 /*! 00543 * RegRxBw 00544 */ 00545 #define RF_RXBW_MANT_MASK 0xE7 00546 #define RF_RXBW_MANT_16 0x00 00547 #define RF_RXBW_MANT_20 0x08 00548 #define RF_RXBW_MANT_24 0x10 // Default 00549 00550 #define RF_RXBW_EXP_MASK 0xF8 00551 #define RF_RXBW_EXP_0 0x00 00552 #define RF_RXBW_EXP_1 0x01 00553 #define RF_RXBW_EXP_2 0x02 00554 #define RF_RXBW_EXP_3 0x03 00555 #define RF_RXBW_EXP_4 0x04 00556 #define RF_RXBW_EXP_5 0x05 // Default 00557 #define RF_RXBW_EXP_6 0x06 00558 #define RF_RXBW_EXP_7 0x07 00559 00560 /*! 00561 * RegAfcBw 00562 */ 00563 #define RF_AFCBW_MANTAFC_MASK 0xE7 00564 #define RF_AFCBW_MANTAFC_16 0x00 00565 #define RF_AFCBW_MANTAFC_20 0x08 // Default 00566 #define RF_AFCBW_MANTAFC_24 0x10 00567 00568 #define RF_AFCBW_EXPAFC_MASK 0xF8 00569 #define RF_AFCBW_EXPAFC_0 0x00 00570 #define RF_AFCBW_EXPAFC_1 0x01 00571 #define RF_AFCBW_EXPAFC_2 0x02 00572 #define RF_AFCBW_EXPAFC_3 0x03 // Default 00573 #define RF_AFCBW_EXPAFC_4 0x04 00574 #define RF_AFCBW_EXPAFC_5 0x05 00575 #define RF_AFCBW_EXPAFC_6 0x06 00576 #define RF_AFCBW_EXPAFC_7 0x07 00577 00578 /*! 00579 * RegOokPeak 00580 */ 00581 #define RF_OOKPEAK_BITSYNC_MASK 0xDF // Default 00582 #define RF_OOKPEAK_BITSYNC_ON 0x20 // Default 00583 #define RF_OOKPEAK_BITSYNC_OFF 0x00 00584 00585 #define RF_OOKPEAK_OOKTHRESHTYPE_MASK 0xE7 00586 #define RF_OOKPEAK_OOKTHRESHTYPE_FIXED 0x00 00587 #define RF_OOKPEAK_OOKTHRESHTYPE_PEAK 0x08 // Default 00588 #define RF_OOKPEAK_OOKTHRESHTYPE_AVERAGE 0x10 00589 00590 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_MASK 0xF8 00591 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_0_5_DB 0x00 // Default 00592 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_0_DB 0x01 00593 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_5_DB 0x02 00594 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_2_0_DB 0x03 00595 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_3_0_DB 0x04 00596 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_4_0_DB 0x05 00597 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_5_0_DB 0x06 00598 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_6_0_DB 0x07 00599 00600 /*! 00601 * RegOokFix 00602 */ 00603 #define RF_OOKFIX_OOKFIXEDTHRESHOLD 0x0C // Default 00604 00605 /*! 00606 * RegOokAvg 00607 */ 00608 #define RF_OOKAVG_OOKPEAKTHRESHDEC_MASK 0x1F 00609 #define RF_OOKAVG_OOKPEAKTHRESHDEC_000 0x00 // Default 00610 #define RF_OOKAVG_OOKPEAKTHRESHDEC_001 0x20 00611 #define RF_OOKAVG_OOKPEAKTHRESHDEC_010 0x40 00612 #define RF_OOKAVG_OOKPEAKTHRESHDEC_011 0x60 00613 #define RF_OOKAVG_OOKPEAKTHRESHDEC_100 0x80 00614 #define RF_OOKAVG_OOKPEAKTHRESHDEC_101 0xA0 00615 #define RF_OOKAVG_OOKPEAKTHRESHDEC_110 0xC0 00616 #define RF_OOKAVG_OOKPEAKTHRESHDEC_111 0xE0 00617 00618 #define RF_OOKAVG_AVERAGEOFFSET_MASK 0xF3 00619 #define RF_OOKAVG_AVERAGEOFFSET_0_DB 0x00 // Default 00620 #define RF_OOKAVG_AVERAGEOFFSET_2_DB 0x04 00621 #define RF_OOKAVG_AVERAGEOFFSET_4_DB 0x08 00622 #define RF_OOKAVG_AVERAGEOFFSET_6_DB 0x0C 00623 00624 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_MASK 0xFC 00625 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_00 0x00 00626 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_01 0x01 00627 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_10 0x02 // Default 00628 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_11 0x03 00629 00630 /*! 00631 * RegAfcFei 00632 */ 00633 #define RF_AFCFEI_AGCSTART 0x10 00634 00635 #define RF_AFCFEI_AFCCLEAR 0x02 00636 00637 #define RF_AFCFEI_AFCAUTOCLEAR_MASK 0xFE 00638 #define RF_AFCFEI_AFCAUTOCLEAR_ON 0x01 00639 #define RF_AFCFEI_AFCAUTOCLEAR_OFF 0x00 // Default 00640 00641 /*! 00642 * RegAfcMsb (Read Only) 00643 */ 00644 00645 /*! 00646 * RegAfcLsb (Read Only) 00647 */ 00648 00649 /*! 00650 * RegFeiMsb (Read Only) 00651 */ 00652 00653 /*! 00654 * RegFeiLsb (Read Only) 00655 */ 00656 00657 /*! 00658 * RegPreambleDetect 00659 */ 00660 #define RF_PREAMBLEDETECT_DETECTOR_MASK 0x7F 00661 #define RF_PREAMBLEDETECT_DETECTOR_ON 0x80 // Default 00662 #define RF_PREAMBLEDETECT_DETECTOR_OFF 0x00 00663 00664 #define RF_PREAMBLEDETECT_DETECTORSIZE_MASK 0x9F 00665 #define RF_PREAMBLEDETECT_DETECTORSIZE_1 0x00 00666 #define RF_PREAMBLEDETECT_DETECTORSIZE_2 0x20 // Default 00667 #define RF_PREAMBLEDETECT_DETECTORSIZE_3 0x40 00668 #define RF_PREAMBLEDETECT_DETECTORSIZE_4 0x60 00669 00670 #define RF_PREAMBLEDETECT_DETECTORTOL_MASK 0xE0 00671 #define RF_PREAMBLEDETECT_DETECTORTOL_0 0x00 00672 #define RF_PREAMBLEDETECT_DETECTORTOL_1 0x01 00673 #define RF_PREAMBLEDETECT_DETECTORTOL_2 0x02 00674 #define RF_PREAMBLEDETECT_DETECTORTOL_3 0x03 00675 #define RF_PREAMBLEDETECT_DETECTORTOL_4 0x04 00676 #define RF_PREAMBLEDETECT_DETECTORTOL_5 0x05 00677 #define RF_PREAMBLEDETECT_DETECTORTOL_6 0x06 00678 #define RF_PREAMBLEDETECT_DETECTORTOL_7 0x07 00679 #define RF_PREAMBLEDETECT_DETECTORTOL_8 0x08 00680 #define RF_PREAMBLEDETECT_DETECTORTOL_9 0x09 00681 #define RF_PREAMBLEDETECT_DETECTORTOL_10 0x0A // Default 00682 #define RF_PREAMBLEDETECT_DETECTORTOL_11 0x0B 00683 #define RF_PREAMBLEDETECT_DETECTORTOL_12 0x0C 00684 #define RF_PREAMBLEDETECT_DETECTORTOL_13 0x0D 00685 #define RF_PREAMBLEDETECT_DETECTORTOL_14 0x0E 00686 #define RF_PREAMBLEDETECT_DETECTORTOL_15 0x0F 00687 #define RF_PREAMBLEDETECT_DETECTORTOL_16 0x10 00688 #define RF_PREAMBLEDETECT_DETECTORTOL_17 0x11 00689 #define RF_PREAMBLEDETECT_DETECTORTOL_18 0x12 00690 #define RF_PREAMBLEDETECT_DETECTORTOL_19 0x13 00691 #define RF_PREAMBLEDETECT_DETECTORTOL_20 0x14 00692 #define RF_PREAMBLEDETECT_DETECTORTOL_21 0x15 00693 #define RF_PREAMBLEDETECT_DETECTORTOL_22 0x16 00694 #define RF_PREAMBLEDETECT_DETECTORTOL_23 0x17 00695 #define RF_PREAMBLEDETECT_DETECTORTOL_24 0x18 00696 #define RF_PREAMBLEDETECT_DETECTORTOL_25 0x19 00697 #define RF_PREAMBLEDETECT_DETECTORTOL_26 0x1A 00698 #define RF_PREAMBLEDETECT_DETECTORTOL_27 0x1B 00699 #define RF_PREAMBLEDETECT_DETECTORTOL_28 0x1C 00700 #define RF_PREAMBLEDETECT_DETECTORTOL_29 0x1D 00701 #define RF_PREAMBLEDETECT_DETECTORTOL_30 0x1E 00702 #define RF_PREAMBLEDETECT_DETECTORTOL_31 0x1F 00703 00704 /*! 00705 * RegRxTimeout1 00706 */ 00707 #define RF_RXTIMEOUT1_TIMEOUTRXRSSI 0x00 // Default 00708 00709 /*! 00710 * RegRxTimeout2 00711 */ 00712 #define RF_RXTIMEOUT2_TIMEOUTRXPREAMBLE 0x00 // Default 00713 00714 /*! 00715 * RegRxTimeout3 00716 */ 00717 #define RF_RXTIMEOUT3_TIMEOUTSIGNALSYNC 0x00 // Default 00718 00719 /*! 00720 * RegRxDelay 00721 */ 00722 #define RF_RXDELAY_INTERPACKETRXDELAY 0x00 // Default 00723 00724 /*! 00725 * RegOsc 00726 */ 00727 #define RF_OSC_RCCALSTART 0x08 00728 00729 #define RF_OSC_CLKOUT_MASK 0xF8 00730 #define RF_OSC_CLKOUT_32_MHZ 0x00 00731 #define RF_OSC_CLKOUT_16_MHZ 0x01 00732 #define RF_OSC_CLKOUT_8_MHZ 0x02 00733 #define RF_OSC_CLKOUT_4_MHZ 0x03 00734 #define RF_OSC_CLKOUT_2_MHZ 0x04 00735 #define RF_OSC_CLKOUT_1_MHZ 0x05 00736 #define RF_OSC_CLKOUT_RC 0x06 00737 #define RF_OSC_CLKOUT_OFF 0x07 // Default 00738 00739 /*! 00740 * RegPreambleMsb/RegPreambleLsb 00741 */ 00742 #define RF_PREAMBLEMSB_SIZE 0x00 // Default 00743 #define RF_PREAMBLELSB_SIZE 0x03 // Default 00744 00745 /*! 00746 * RegSyncConfig 00747 */ 00748 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_MASK 0x3F 00749 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_ON 0x80 // Default 00750 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_OFF 0x40 00751 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_OFF 0x00 00752 00753 00754 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_MASK 0xDF 00755 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_55 0x20 00756 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_AA 0x00 // Default 00757 00758 #define RF_SYNCCONFIG_SYNC_MASK 0xEF 00759 #define RF_SYNCCONFIG_SYNC_ON 0x10 // Default 00760 #define RF_SYNCCONFIG_SYNC_OFF 0x00 00761 00762 #define RF_SYNCCONFIG_FIFOFILLCONDITION_MASK 0xF7 00763 #define RF_SYNCCONFIG_FIFOFILLCONDITION_AUTO 0x00 // Default 00764 #define RF_SYNCCONFIG_FIFOFILLCONDITION_MANUAL 0x08 00765 00766 #define RF_SYNCCONFIG_SYNCSIZE_MASK 0xF8 00767 #define RF_SYNCCONFIG_SYNCSIZE_1 0x00 00768 #define RF_SYNCCONFIG_SYNCSIZE_2 0x01 00769 #define RF_SYNCCONFIG_SYNCSIZE_3 0x02 00770 #define RF_SYNCCONFIG_SYNCSIZE_4 0x03 // Default 00771 #define RF_SYNCCONFIG_SYNCSIZE_5 0x04 00772 #define RF_SYNCCONFIG_SYNCSIZE_6 0x05 00773 #define RF_SYNCCONFIG_SYNCSIZE_7 0x06 00774 #define RF_SYNCCONFIG_SYNCSIZE_8 0x07 00775 00776 /*! 00777 * RegSyncValue1-8 00778 */ 00779 #define RF_SYNCVALUE1_SYNCVALUE 0x01 // Default 00780 #define RF_SYNCVALUE2_SYNCVALUE 0x01 // Default 00781 #define RF_SYNCVALUE3_SYNCVALUE 0x01 // Default 00782 #define RF_SYNCVALUE4_SYNCVALUE 0x01 // Default 00783 #define RF_SYNCVALUE5_SYNCVALUE 0x01 // Default 00784 #define RF_SYNCVALUE6_SYNCVALUE 0x01 // Default 00785 #define RF_SYNCVALUE7_SYNCVALUE 0x01 // Default 00786 #define RF_SYNCVALUE8_SYNCVALUE 0x01 // Default 00787 00788 /*! 00789 * RegPacketConfig1 00790 */ 00791 #define RF_PACKETCONFIG1_PACKETFORMAT_MASK 0x7F 00792 #define RF_PACKETCONFIG1_PACKETFORMAT_FIXED 0x00 00793 #define RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE 0x80 // Default 00794 00795 #define RF_PACKETCONFIG1_DCFREE_MASK 0x9F 00796 #define RF_PACKETCONFIG1_DCFREE_OFF 0x00 // Default 00797 #define RF_PACKETCONFIG1_DCFREE_MANCHESTER 0x20 00798 #define RF_PACKETCONFIG1_DCFREE_WHITENING 0x40 00799 00800 #define RF_PACKETCONFIG1_CRC_MASK 0xEF 00801 #define RF_PACKETCONFIG1_CRC_ON 0x10 // Default 00802 #define RF_PACKETCONFIG1_CRC_OFF 0x00 00803 00804 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_MASK 0xF7 00805 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_ON 0x00 // Default 00806 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_OFF 0x08 00807 00808 #define RF_PACKETCONFIG1_ADDRSFILTERING_MASK 0xF9 00809 #define RF_PACKETCONFIG1_ADDRSFILTERING_OFF 0x00 // Default 00810 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODE 0x02 00811 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODEBROADCAST 0x04 00812 00813 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_MASK 0xFE 00814 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_CCITT 0x00 // Default 00815 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_IBM 0x01 00816 00817 /*! 00818 * RegPacketConfig2 00819 */ 00820 #define RF_PACKETCONFIG2_DATAMODE_MASK 0xBF 00821 #define RF_PACKETCONFIG2_DATAMODE_CONTINUOUS 0x00 00822 #define RF_PACKETCONFIG2_DATAMODE_PACKET 0x40 // Default 00823 00824 #define RF_PACKETCONFIG2_IOHOME_MASK 0xDF 00825 #define RF_PACKETCONFIG2_IOHOME_ON 0x20 00826 #define RF_PACKETCONFIG2_IOHOME_OFF 0x00 // Default 00827 00828 #define RF_PACKETCONFIG2_BEACON_MASK 0xF7 00829 #define RF_PACKETCONFIG2_BEACON_ON 0x08 00830 #define RF_PACKETCONFIG2_BEACON_OFF 0x00 // Default 00831 00832 #define RF_PACKETCONFIG2_PAYLOADLENGTH_MSB_MASK 0xF8 00833 00834 /*! 00835 * RegPayloadLength 00836 */ 00837 #define RF_PAYLOADLENGTH_LENGTH 0x40 // Default 00838 00839 /*! 00840 * RegNodeAdrs 00841 */ 00842 #define RF_NODEADDRESS_ADDRESS 0x00 00843 00844 /*! 00845 * RegBroadcastAdrs 00846 */ 00847 #define RF_BROADCASTADDRESS_ADDRESS 0x00 00848 00849 /*! 00850 * RegFifoThresh 00851 */ 00852 #define RF_FIFOTHRESH_TXSTARTCONDITION_MASK 0x7F 00853 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFOTHRESH 0x00 00854 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY 0x80 // Default 00855 00856 #define RF_FIFOTHRESH_FIFOTHRESHOLD_MASK 0xC0 00857 #define RF_FIFOTHRESH_FIFOTHRESHOLD_THRESHOLD 0x0F // Default 00858 00859 /*! 00860 * RegSeqConfig1 00861 */ 00862 #define RF_SEQCONFIG1_SEQUENCER_START 0x80 00863 00864 #define RF_SEQCONFIG1_SEQUENCER_STOP 0x40 00865 00866 #define RF_SEQCONFIG1_IDLEMODE_MASK 0xDF 00867 #define RF_SEQCONFIG1_IDLEMODE_SLEEP 0x20 00868 #define RF_SEQCONFIG1_IDLEMODE_STANDBY 0x00 // Default 00869 00870 #define RF_SEQCONFIG1_FROMSTART_MASK 0xE7 00871 #define RF_SEQCONFIG1_FROMSTART_TOLPS 0x00 // Default 00872 #define RF_SEQCONFIG1_FROMSTART_TORX 0x08 00873 #define RF_SEQCONFIG1_FROMSTART_TOTX 0x10 00874 #define RF_SEQCONFIG1_FROMSTART_TOTX_ONFIFOLEVEL 0x18 00875 00876 #define RF_SEQCONFIG1_LPS_MASK 0xFB 00877 #define RF_SEQCONFIG1_LPS_SEQUENCER_OFF 0x00 // Default 00878 #define RF_SEQCONFIG1_LPS_IDLE 0x04 00879 00880 #define RF_SEQCONFIG1_FROMIDLE_MASK 0xFD 00881 #define RF_SEQCONFIG1_FROMIDLE_TOTX 0x00 // Default 00882 #define RF_SEQCONFIG1_FROMIDLE_TORX 0x02 00883 00884 #define RF_SEQCONFIG1_FROMTX_MASK 0xFE 00885 #define RF_SEQCONFIG1_FROMTX_TOLPS 0x00 // Default 00886 #define RF_SEQCONFIG1_FROMTX_TORX 0x01 00887 00888 /*! 00889 * RegSeqConfig2 00890 */ 00891 #define RF_SEQCONFIG2_FROMRX_MASK 0x1F 00892 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_000 0x00 // Default 00893 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONPLDRDY 0x20 00894 #define RF_SEQCONFIG2_FROMRX_TOLPS_ONPLDRDY 0x40 00895 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONCRCOK 0x60 00896 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONRSSI 0x80 00897 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONSYNC 0xA0 00898 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONPREAMBLE 0xC0 00899 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_111 0xE0 00900 00901 #define RF_SEQCONFIG2_FROMRXTIMEOUT_MASK 0xE7 00902 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TORXRESTART 0x00 // Default 00903 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOTX 0x08 00904 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOLPS 0x10 00905 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOSEQUENCEROFF 0x18 00906 00907 #define RF_SEQCONFIG2_FROMRXPKT_MASK 0xF8 00908 #define RF_SEQCONFIG2_FROMRXPKT_TOSEQUENCEROFF 0x00 // Default 00909 #define RF_SEQCONFIG2_FROMRXPKT_TOTX_ONFIFOEMPTY 0x01 00910 #define RF_SEQCONFIG2_FROMRXPKT_TOLPS 0x02 00911 #define RF_SEQCONFIG2_FROMRXPKT_TOSYNTHESIZERRX 0x03 00912 #define RF_SEQCONFIG2_FROMRXPKT_TORX 0x04 00913 00914 /*! 00915 * RegTimerResol 00916 */ 00917 #define RF_TIMERRESOL_TIMER1RESOL_MASK 0xF3 00918 #define RF_TIMERRESOL_TIMER1RESOL_OFF 0x00 // Default 00919 #define RF_TIMERRESOL_TIMER1RESOL_000064_US 0x04 00920 #define RF_TIMERRESOL_TIMER1RESOL_004100_US 0x08 00921 #define RF_TIMERRESOL_TIMER1RESOL_262000_US 0x0C 00922 00923 #define RF_TIMERRESOL_TIMER2RESOL_MASK 0xFC 00924 #define RF_TIMERRESOL_TIMER2RESOL_OFF 0x00 // Default 00925 #define RF_TIMERRESOL_TIMER2RESOL_000064_US 0x01 00926 #define RF_TIMERRESOL_TIMER2RESOL_004100_US 0x02 00927 #define RF_TIMERRESOL_TIMER2RESOL_262000_US 0x03 00928 00929 /*! 00930 * RegTimer1Coef 00931 */ 00932 #define RF_TIMER1COEF_TIMER1COEFFICIENT 0xF5 // Default 00933 00934 /*! 00935 * RegTimer2Coef 00936 */ 00937 #define RF_TIMER2COEF_TIMER2COEFFICIENT 0x20 // Default 00938 00939 /*! 00940 * RegImageCal 00941 */ 00942 #define RF_IMAGECAL_AUTOIMAGECAL_MASK 0x7F 00943 #define RF_IMAGECAL_AUTOIMAGECAL_ON 0x80 00944 #define RF_IMAGECAL_AUTOIMAGECAL_OFF 0x00 // Default 00945 00946 #define RF_IMAGECAL_IMAGECAL_MASK 0xBF 00947 #define RF_IMAGECAL_IMAGECAL_START 0x40 00948 00949 #define RF_IMAGECAL_IMAGECAL_RUNNING 0x20 00950 #define RF_IMAGECAL_IMAGECAL_DONE 0x00 // Default 00951 00952 #define RF_IMAGECAL_TEMPCHANGE_HIGHER 0x08 00953 #define RF_IMAGECAL_TEMPCHANGE_LOWER 0x00 00954 00955 #define RF_IMAGECAL_TEMPTHRESHOLD_MASK 0xF9 00956 #define RF_IMAGECAL_TEMPTHRESHOLD_05 0x00 00957 #define RF_IMAGECAL_TEMPTHRESHOLD_10 0x02 // Default 00958 #define RF_IMAGECAL_TEMPTHRESHOLD_15 0x04 00959 #define RF_IMAGECAL_TEMPTHRESHOLD_20 0x06 00960 00961 #define RF_IMAGECAL_TEMPMONITOR_MASK 0xFE 00962 #define RF_IMAGECAL_TEMPMONITOR_ON 0x00 // Default 00963 #define RF_IMAGECAL_TEMPMONITOR_OFF 0x01 00964 00965 /*! 00966 * RegTemp (Read Only) 00967 */ 00968 00969 /*! 00970 * RegLowBat 00971 */ 00972 #define RF_LOWBAT_MASK 0xF7 00973 #define RF_LOWBAT_ON 0x08 00974 #define RF_LOWBAT_OFF 0x00 // Default 00975 00976 #define RF_LOWBAT_TRIM_MASK 0xF8 00977 #define RF_LOWBAT_TRIM_1695 0x00 00978 #define RF_LOWBAT_TRIM_1764 0x01 00979 #define RF_LOWBAT_TRIM_1835 0x02 // Default 00980 #define RF_LOWBAT_TRIM_1905 0x03 00981 #define RF_LOWBAT_TRIM_1976 0x04 00982 #define RF_LOWBAT_TRIM_2045 0x05 00983 #define RF_LOWBAT_TRIM_2116 0x06 00984 #define RF_LOWBAT_TRIM_2185 0x07 00985 00986 /*! 00987 * RegIrqFlags1 00988 */ 00989 #define RF_IRQFLAGS1_MODEREADY 0x80 00990 00991 #define RF_IRQFLAGS1_RXREADY 0x40 00992 00993 #define RF_IRQFLAGS1_TXREADY 0x20 00994 00995 #define RF_IRQFLAGS1_PLLLOCK 0x10 00996 00997 #define RF_IRQFLAGS1_RSSI 0x08 00998 00999 #define RF_IRQFLAGS1_TIMEOUT 0x04 01000 01001 #define RF_IRQFLAGS1_PREAMBLEDETECT 0x02 01002 01003 #define RF_IRQFLAGS1_SYNCADDRESSMATCH 0x01 01004 01005 /*! 01006 * RegIrqFlags2 01007 */ 01008 #define RF_IRQFLAGS2_FIFOFULL 0x80 01009 01010 #define RF_IRQFLAGS2_FIFOEMPTY 0x40 01011 01012 #define RF_IRQFLAGS2_FIFOLEVEL 0x20 01013 01014 #define RF_IRQFLAGS2_FIFOOVERRUN 0x10 01015 01016 #define RF_IRQFLAGS2_PACKETSENT 0x08 01017 01018 #define RF_IRQFLAGS2_PAYLOADREADY 0x04 01019 01020 #define RF_IRQFLAGS2_CRCOK 0x02 01021 01022 #define RF_IRQFLAGS2_LOWBAT 0x01 01023 01024 /*! 01025 * RegDioMapping1 01026 */ 01027 #define RF_DIOMAPPING1_DIO0_MASK 0x3F 01028 #define RF_DIOMAPPING1_DIO0_00 0x00 // Default 01029 #define RF_DIOMAPPING1_DIO0_01 0x40 01030 #define RF_DIOMAPPING1_DIO0_10 0x80 01031 #define RF_DIOMAPPING1_DIO0_11 0xC0 01032 01033 #define RF_DIOMAPPING1_DIO1_MASK 0xCF 01034 #define RF_DIOMAPPING1_DIO1_00 0x00 // Default 01035 #define RF_DIOMAPPING1_DIO1_01 0x10 01036 #define RF_DIOMAPPING1_DIO1_10 0x20 01037 #define RF_DIOMAPPING1_DIO1_11 0x30 01038 01039 #define RF_DIOMAPPING1_DIO2_MASK 0xF3 01040 #define RF_DIOMAPPING1_DIO2_00 0x00 // Default 01041 #define RF_DIOMAPPING1_DIO2_01 0x04 01042 #define RF_DIOMAPPING1_DIO2_10 0x08 01043 #define RF_DIOMAPPING1_DIO2_11 0x0C 01044 01045 #define RF_DIOMAPPING1_DIO3_MASK 0xFC 01046 #define RF_DIOMAPPING1_DIO3_00 0x00 // Default 01047 #define RF_DIOMAPPING1_DIO3_01 0x01 01048 #define RF_DIOMAPPING1_DIO3_10 0x02 01049 #define RF_DIOMAPPING1_DIO3_11 0x03 01050 01051 /*! 01052 * RegDioMapping2 01053 */ 01054 #define RF_DIOMAPPING2_DIO4_MASK 0x3F 01055 #define RF_DIOMAPPING2_DIO4_00 0x00 // Default 01056 #define RF_DIOMAPPING2_DIO4_01 0x40 01057 #define RF_DIOMAPPING2_DIO4_10 0x80 01058 #define RF_DIOMAPPING2_DIO4_11 0xC0 01059 01060 #define RF_DIOMAPPING2_DIO5_MASK 0xCF 01061 #define RF_DIOMAPPING2_DIO5_00 0x00 // Default 01062 #define RF_DIOMAPPING2_DIO5_01 0x10 01063 #define RF_DIOMAPPING2_DIO5_10 0x20 01064 #define RF_DIOMAPPING2_DIO5_11 0x30 01065 01066 #define RF_DIOMAPPING2_MAP_MASK 0xFE 01067 #define RF_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01 01068 #define RF_DIOMAPPING2_MAP_RSSI 0x00 // Default 01069 01070 /*! 01071 * RegVersion (Read Only) 01072 */ 01073 01074 /*! 01075 * RegAgcRef 01076 */ 01077 01078 /*! 01079 * RegAgcThresh1 01080 */ 01081 01082 /*! 01083 * RegAgcThresh2 01084 */ 01085 01086 /*! 01087 * RegAgcThresh3 01088 */ 01089 01090 /*! 01091 * RegPllHop 01092 */ 01093 #define RF_PLLHOP_FASTHOP_MASK 0x7F 01094 #define RF_PLLHOP_FASTHOP_ON 0x80 01095 #define RF_PLLHOP_FASTHOP_OFF 0x00 // Default 01096 01097 /*! 01098 * RegTcxo 01099 */ 01100 #define RF_TCXO_TCXOINPUT_MASK 0xEF 01101 #define RF_TCXO_TCXOINPUT_ON 0x10 01102 #define RF_TCXO_TCXOINPUT_OFF 0x00 // Default 01103 01104 /*! 01105 * RegPaDac 01106 */ 01107 #define RF_PADAC_20DBM_MASK 0xF8 01108 #define RF_PADAC_20DBM_ON 0x07 01109 #define RF_PADAC_20DBM_OFF 0x04 // Default 01110 01111 /*! 01112 * RegPll 01113 */ 01114 #define RF_PLL_BANDWIDTH_MASK 0x3F 01115 #define RF_PLL_BANDWIDTH_75 0x00 01116 #define RF_PLL_BANDWIDTH_150 0x40 01117 #define RF_PLL_BANDWIDTH_225 0x80 01118 #define RF_PLL_BANDWIDTH_300 0xC0 // Default 01119 01120 /*! 01121 * RegPllLowPn 01122 */ 01123 #define RF_PLLLOWPN_BANDWIDTH_MASK 0x3F 01124 #define RF_PLLLOWPN_BANDWIDTH_75 0x00 01125 #define RF_PLLLOWPN_BANDWIDTH_150 0x40 01126 #define RF_PLLLOWPN_BANDWIDTH_225 0x80 01127 #define RF_PLLLOWPN_BANDWIDTH_300 0xC0 // Default 01128 01129 /*! 01130 * RegFormerTemp 01131 */ 01132 01133 /*! 01134 * RegBitrateFrac 01135 */ 01136 #define RF_BITRATEFRAC_MASK 0xF0 01137 01138 #endif // __SX1272_REGS_FSK_H__
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