ADXL355.h

00001 
00002 #ifndef ADXL355_H_
00003 #define ADXL355_H_
00004 
00005 class ADXL355
00006 {
00007 public: 
00008 
00009     // -------------------------- //
00010     // REGISTERS                  // 
00011     // -------------------------- //
00012     typedef enum {
00013         DEVID_AD = 0x00,
00014         DEVID_MST = 0x01,
00015         PARTID = 0x02,
00016         REVID = 0x03,
00017         STATUS = 0x04,
00018         FIFO_ENTRIES = 0x05,
00019         TEMP2 = 0x06,
00020         TEMP1 = 0x07,
00021         XDATA3 = 0x08,
00022         XDATA2 = 0x09,
00023         XDATA1 = 0x0A,
00024         YDATA3 = 0x0B,
00025         YDATA2 = 0x0C,
00026         YDATA1 = 0x0D,
00027         ZDATA3 = 0x0E,
00028         ZDATA2 = 0x0F,
00029         ZDATA1 = 0x10,
00030         FIFO_DATA = 0x11,
00031         OFFSET_X_H = 0x1E,
00032         OFFSET_X_L = 0x1F,
00033         OFFSET_Y_H = 0x20,
00034         OFFSET_Y_L = 0x21,
00035         OFFSET_Z_H = 0x22,
00036         OFFSET_Z_L = 0x23,
00037         ACT_EN = 0x24,
00038         ACT_THRESH_H = 0x25,
00039         ACT_THRESH_L = 0x26,
00040         ACT_COUNT = 0x27,
00041         FILTER = 0x28,
00042         FIFO_SAMPLES = 0x29,
00043         INT_MAP = 0x2A,
00044         SYNC = 0x2B,
00045         RANGE = 0x2C,
00046         POWER_CTL = 0x2D,
00047         SELF_TEST = 0x2E,
00048         RESET = 0x2F
00049     } ADXL355_register_t;
00050     
00051     // -------------------------- //
00052     // REGISTERS - DEFAULT VALUES //
00053     // -------------------------- //
00054     // Modes - POWER_CTL  
00055     typedef enum {
00056         DRDY_OFF = 0x04,
00057         TEMP_OFF = 0x02,
00058         STANDBY = 0x01,
00059         MEASUREMENT = 0x00
00060     } ADXL355_modes_t;    
00061     // Activate Threshold - ACT_EN  
00062     typedef enum {
00063         ACT_Z = 0x04,
00064         ACT_Y = 0x02,
00065         ACT_X = 0x01
00066     } ADXL355_act_ctl_t;
00067     // High-Pass and Low-Pass Filter - FILTER 
00068     typedef enum {
00069         HPFOFF = 0x00,
00070         HPF247 = 0x10,
00071         HPF62 = 0x20,
00072         HPF15 = 0x30,
00073         HPF3 = 0x40,
00074         HPF09 = 0x50,
00075         HPF02 = 0x60,
00076         ODR4000HZ = 0x00,
00077         ODR2000HZ = 0x01,
00078         ODR1000HZ = 0x02,
00079         ODR500HZ = 0x03,
00080         ODR250HZ = 0x04,
00081         ODR125Hz = 0x05,
00082         ODR62HZ = 0x06,
00083         ODR31Hz = 0x07,
00084         ODR15Hz = 0x08,
00085         ODR7Hz = 0x09,
00086         ODR3HZ = 0x0A
00087     } ADXL355_filter_ctl_t;
00088     // External timing register - INT_MAP 
00089     typedef enum {
00090         OVR_EN = 0x04,
00091         FULL_EN = 0x02,
00092         RDY_EN = 0x01
00093     } ADXL355_intmap_ctl_t;
00094     // External timing register - SYNC 
00095     typedef enum {
00096         EXT_CLK = 0x04,
00097         INT_SYNC = 0x00,
00098         EXT_SYNC_NO_INT = 0x01,
00099         EXT_SYNC_INT = 0x02
00100     } ADXL355_sync_ctl_t; 
00101     // polarity and range - RANGE 
00102     typedef enum {
00103         RANGE2G = 0x01,
00104         RANGE4G = 0x02,
00105         RANGE8G = 0x03,
00106         RANGE10 = 0x00,
00107         RANGE20 = 0x02,
00108         RANGE40 = 0x03
00109     } ADXL355_range_ctl_t;
00110     // self test interrupt - INT 
00111     typedef enum {
00112         ST2 = 0x02,
00113         ST1 = 0x01
00114     } ADXL355_int_ctl_t;
00115     
00116     // -------------------------- //
00117     // FUNCTIONS                  //  
00118     // -------------------------- //
00119     // SPI configuration & constructor 
00120     ADXL355(PinName cs_pin , PinName MOSI , PinName MISO , PinName SCK );
00121     void frequency(int hz);
00122     // Low level SPI bus comm methods 
00123     void reset(void);
00124     void write_reg(ADXL355_register_t reg, uint8_t data);
00125     void write_reg_u16(ADXL355_register_t reg, uint16_t data);
00126     uint8_t read_reg(ADXL355_register_t reg);
00127     uint16_t read_reg_u16(ADXL355_register_t reg);
00128     uint32_t read_reg_u32(ADXL355_register_t reg);
00129     // ADXL general register R/W methods 
00130     void set_power_ctl_reg(uint8_t data);
00131     void set_filter_ctl_reg(ADXL355_filter_ctl_t hpf, ADXL355_filter_ctl_t odr);
00132     void set_clk(ADXL355_sync_ctl_t data);
00133     void set_device(ADXL355_range_ctl_t range);
00134     uint8_t read_status();
00135     // ADXL X/Y/Z/T scanning methods   
00136     uint32_t scanx();
00137     uint32_t scany();
00138     uint32_t scanz();
00139     uint16_t scant();
00140     // ADXL activity methods 
00141     void set_activity_axis(ADXL355_act_ctl_t axis);
00142     void set_activity_cnt(uint8_t count);
00143     void set_activity_threshold(uint8_t data_h, uint8_t data_l);
00144     void set_inactivity();
00145     // ADXL interrupt methods 
00146     void set_interrupt1_pin(PinName in, ADXL355_intmap_ctl_t mode);
00147     void set_interrupt2_pin(PinName in, ADXL355_intmap_ctl_t mode);
00148     void enable_interrupt1();
00149     void enable_interrupt2();
00150     void disable_interrupt1();
00151     void disable_interrupt2();
00152     void set_polling_interrupt1_pin(uint8_t data);
00153     void set_polling_interrupt2_pin(uint8_t data);
00154     bool get_int1();
00155     bool get_int2();
00156     // ADXL FIFO methods 
00157     uint8_t fifo_read_nr_of_entries();
00158     void fifo_setup(uint8_t nr_of_entries);
00159     uint32_t fifo_read_u32();
00160     uint64_t fifo_scan();
00161     // ADXL tilt methods and calibration
00162     // TBD
00163 private:
00164     // SPI adxl355;                 ///< SPI instance of the ADXL
00165     SPI adxl355; DigitalOut cs;
00166     const static uint8_t _DEVICE_AD = 0xAD;     // contect of DEVID_AD (only-read) register 
00167     const static uint8_t _RESET = 0x52;         // reset code 
00168     const static uint8_t _DUMMY_BYTE = 0xAA;    // 10101010
00169     const static uint8_t _WRITE_REG_CMD = 0x00; // write register
00170     const static uint8_t _READ_REG_CMD = 0x01;  // read register
00171     const static uint8_t _READ_FIFO_CMD = 0x23; // read FIFO
00172     const static uint8_t _SPI_MODE = 0;         // timing scheme
00173 };
00174  
00175 #endif