Vergil Cola / SDFileSystem

SDFileSystem with mutex for multiple SPI devices on the same SPI bus

Dependencies:   FATFileSystem

Dependents:   CC3000Nucleo401REProject

Fork of SDFileSystem by Mbed

SDFileSystem.cpp@4:f0bd1dfd6f62, 2014-10-16 (annotated)

Committer:
vpcola
Date:
Thu Oct 16 13:40:12 2014 +0000
Revision:
4:f0bd1dfd6f62
Parent:
3:7b35d1709458 
Added mutex for multiple devices on the same SPI bus

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:7153ee70df01 1 /* mbed Microcontroller Library
emilmont 1:7153ee70df01 2 * Copyright (c) 2006-2012 ARM Limited
emilmont 1:7153ee70df01 3 *
emilmont 1:7153ee70df01 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
emilmont 1:7153ee70df01 5 * of this software and associated documentation files (the "Software"), to deal
emilmont 1:7153ee70df01 6 * in the Software without restriction, including without limitation the rights
emilmont 1:7153ee70df01 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
emilmont 1:7153ee70df01 8 * copies of the Software, and to permit persons to whom the Software is
emilmont 1:7153ee70df01 9 * furnished to do so, subject to the following conditions:
emilmont 1:7153ee70df01 10 *
emilmont 1:7153ee70df01 11 * The above copyright notice and this permission notice shall be included in
emilmont 1:7153ee70df01 12 * all copies or substantial portions of the Software.
emilmont 1:7153ee70df01 13 *
emilmont 1:7153ee70df01 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
emilmont 1:7153ee70df01 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
emilmont 1:7153ee70df01 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
emilmont 1:7153ee70df01 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
emilmont 1:7153ee70df01 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
emilmont 1:7153ee70df01 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
emilmont 1:7153ee70df01 20 * SOFTWARE.
emilmont 1:7153ee70df01 21 */
screamer 3:7b35d1709458 22
emilmont 1:7153ee70df01 23 /* Introduction
emilmont 1:7153ee70df01 24 * ------------
emilmont 1:7153ee70df01 25 * SD and MMC cards support a number of interfaces, but common to them all
emilmont 1:7153ee70df01 26 * is one based on SPI. This is the one I'm implmenting because it means
emilmont 1:7153ee70df01 27 * it is much more portable even though not so performant, and we already
emilmont 1:7153ee70df01 28 * have the mbed SPI Interface!
emilmont 1:7153ee70df01 29 *
emilmont 1:7153ee70df01 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
emilmont 1:7153ee70df01 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
emilmont 1:7153ee70df01 32 *
emilmont 1:7153ee70df01 33 * SPI Startup
emilmont 1:7153ee70df01 34 * -----------
emilmont 1:7153ee70df01 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
emilmont 1:7153ee70df01 36 * asserting CS low and sending the reset command (CMD0). The card will
emilmont 1:7153ee70df01 37 * respond with a (R1) response.
emilmont 1:7153ee70df01 38 *
emilmont 1:7153ee70df01 39 * CMD8 is optionally sent to determine the voltage range supported, and
emilmont 1:7153ee70df01 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
emilmont 1:7153ee70df01 41 * version 2.x. I'll just ignore this for now.
emilmont 1:7153ee70df01 42 *
emilmont 1:7153ee70df01 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
emilmont 1:7153ee70df01 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
emilmont 1:7153ee70df01 45 *
emilmont 1:7153ee70df01 46 * You should also indicate whether the host supports High Capicity cards,
emilmont 1:7153ee70df01 47 * and check whether the card is high capacity - i'll also ignore this
emilmont 1:7153ee70df01 48 *
emilmont 1:7153ee70df01 49 * SPI Protocol
emilmont 1:7153ee70df01 50 * ------------
emilmont 1:7153ee70df01 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
emilmont 1:7153ee70df01 52 * the host starting every bus transaction by asserting the CS signal low. The
emilmont 1:7153ee70df01 53 * card always responds to commands, data blocks and errors.
emilmont 1:7153ee70df01 54 *
emilmont 1:7153ee70df01 55 * The protocol supports a CRC, but by default it is off (except for the
emilmont 1:7153ee70df01 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
emilmont 1:7153ee70df01 57 * I'll leave the CRC off I think!
emilmont 1:7153ee70df01 58 *
emilmont 1:7153ee70df01 59 * Standard capacity cards have variable data block sizes, whereas High
emilmont 1:7153ee70df01 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
emilmont 1:7153ee70df01 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
emilmont 1:7153ee70df01 62 * This is set with CMD16.
emilmont 1:7153ee70df01 63 *
emilmont 1:7153ee70df01 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
emilmont 1:7153ee70df01 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
emilmont 1:7153ee70df01 66 * the card gets a read command, it responds with a response token, and then
emilmont 1:7153ee70df01 67 * a data token or an error.
emilmont 1:7153ee70df01 68 *
emilmont 1:7153ee70df01 69 * SPI Command Format
emilmont 1:7153ee70df01 70 * ------------------
emilmont 1:7153ee70df01 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
emilmont 1:7153ee70df01 72 *
emilmont 1:7153ee70df01 73 * +---------------+------------+------------+-----------+----------+--------------+
emilmont 1:7153ee70df01 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
emilmont 1:7153ee70df01 75 * +---------------+------------+------------+-----------+----------+--------------+
emilmont 1:7153ee70df01 76 *
emilmont 1:7153ee70df01 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
emilmont 1:7153ee70df01 78 *
emilmont 1:7153ee70df01 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
emilmont 1:7153ee70df01 80 *
emilmont 1:7153ee70df01 81 * SPI Response Format
emilmont 1:7153ee70df01 82 * -------------------
emilmont 1:7153ee70df01 83 * The main response format (R1) is a status byte (normally zero). Key flags:
emilmont 1:7153ee70df01 84 * idle - 1 if the card is in an idle state/initialising
emilmont 1:7153ee70df01 85 * cmd - 1 if an illegal command code was detected
emilmont 1:7153ee70df01 86 *
emilmont 1:7153ee70df01 87 * +-------------------------------------------------+
emilmont 1:7153ee70df01 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
emilmont 1:7153ee70df01 89 * +-------------------------------------------------+
emilmont 1:7153ee70df01 90 *
emilmont 1:7153ee70df01 91 * R1b is the same, except it is followed by a busy signal (zeros) until
emilmont 1:7153ee70df01 92 * the first non-zero byte when it is ready again.
emilmont 1:7153ee70df01 93 *
emilmont 1:7153ee70df01 94 * Data Response Token
emilmont 1:7153ee70df01 95 * -------------------
emilmont 1:7153ee70df01 96 * Every data block written to the card is acknowledged by a byte
emilmont 1:7153ee70df01 97 * response token
emilmont 1:7153ee70df01 98 *
emilmont 1:7153ee70df01 99 * +----------------------+
emilmont 1:7153ee70df01 100 * | xxx | 0 | status | 1 |
emilmont 1:7153ee70df01 101 * +----------------------+
emilmont 1:7153ee70df01 102 * 010 - OK!
emilmont 1:7153ee70df01 103 * 101 - CRC Error
emilmont 1:7153ee70df01 104 * 110 - Write Error
emilmont 1:7153ee70df01 105 *
emilmont 1:7153ee70df01 106 * Single Block Read and Write
emilmont 1:7153ee70df01 107 * ---------------------------
emilmont 1:7153ee70df01 108 *
emilmont 1:7153ee70df01 109 * Block transfers have a byte header, followed by the data, followed
emilmont 1:7153ee70df01 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
emilmont 1:7153ee70df01 111 *
emilmont 1:7153ee70df01 112 * +------+---------+---------+- - - -+---------+-----------+----------+
emilmont 1:7153ee70df01 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
emilmont 1:7153ee70df01 114 * +------+---------+---------+- - - -+---------+-----------+----------+
emilmont 1:7153ee70df01 115 */
emilmont 1:7153ee70df01 116 #include "SDFileSystem.h"
emilmont 2:c8f66dc765d4 117 #include "mbed_debug.h"
emilmont 1:7153ee70df01 118
emilmont 1:7153ee70df01 119 #define SD_COMMAND_TIMEOUT 5000
emilmont 1:7153ee70df01 120
emilmont 1:7153ee70df01 121 #define SD_DBG 0
emilmont 1:7153ee70df01 122
vpcola 4:f0bd1dfd6f62 123 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, Mutex & mutex, const char* name) :
vpcola 4:f0bd1dfd6f62 124 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _mutex(mutex) {
emilmont 1:7153ee70df01 125 _cs = 1;
emilmont 1:7153ee70df01 126 }
emilmont 1:7153ee70df01 127
emilmont 1:7153ee70df01 128 #define R1_IDLE_STATE (1 << 0)
emilmont 1:7153ee70df01 129 #define R1_ERASE_RESET (1 << 1)
emilmont 1:7153ee70df01 130 #define R1_ILLEGAL_COMMAND (1 << 2)
emilmont 1:7153ee70df01 131 #define R1_COM_CRC_ERROR (1 << 3)
emilmont 1:7153ee70df01 132 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
emilmont 1:7153ee70df01 133 #define R1_ADDRESS_ERROR (1 << 5)
emilmont 1:7153ee70df01 134 #define R1_PARAMETER_ERROR (1 << 6)
emilmont 1:7153ee70df01 135
emilmont 1:7153ee70df01 136 // Types
screamer 3:7b35d1709458 137 #define SDCARD_FAIL 0 //!< v1.x Standard Capacity
screamer 3:7b35d1709458 138 #define SDCARD_V1 1 //!< v2.x Standard Capacity
screamer 3:7b35d1709458 139 #define SDCARD_V2 2 //!< v2.x High Capacity
screamer 3:7b35d1709458 140 #define SDCARD_V2HC 3 //!< Not recognised as an SD Card
emilmont 1:7153ee70df01 141
emilmont 1:7153ee70df01 142 int SDFileSystem::initialise_card() {
emilmont 1:7153ee70df01 143 // Set to 100kHz for initialisation, and clock card with cs = 1
emilmont 1:7153ee70df01 144 _spi.frequency(100000);
vpcola 4:f0bd1dfd6f62 145 _mutex.lock();
emilmont 1:7153ee70df01 146 _cs = 1;
emilmont 1:7153ee70df01 147 for (int i = 0; i < 16; i++) {
emilmont 1:7153ee70df01 148 _spi.write(0xFF);
emilmont 1:7153ee70df01 149 }
vpcola 4:f0bd1dfd6f62 150 _mutex.unlock();
emilmont 1:7153ee70df01 151
emilmont 1:7153ee70df01 152 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
emilmont 1:7153ee70df01 153 if (_cmd(0, 0) != R1_IDLE_STATE) {
emilmont 1:7153ee70df01 154 debug("No disk, or could not put SD card in to SPI idle state\n");
emilmont 1:7153ee70df01 155 return SDCARD_FAIL;
emilmont 1:7153ee70df01 156 }
emilmont 1:7153ee70df01 157
emilmont 1:7153ee70df01 158 // send CMD8 to determine whther it is ver 2.x
emilmont 1:7153ee70df01 159 int r = _cmd8();
emilmont 1:7153ee70df01 160 if (r == R1_IDLE_STATE) {
emilmont 1:7153ee70df01 161 return initialise_card_v2();
emilmont 1:7153ee70df01 162 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
emilmont 1:7153ee70df01 163 return initialise_card_v1();
emilmont 1:7153ee70df01 164 } else {
emilmont 1:7153ee70df01 165 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
emilmont 1:7153ee70df01 166 return SDCARD_FAIL;
emilmont 1:7153ee70df01 167 }
emilmont 1:7153ee70df01 168 }
emilmont 1:7153ee70df01 169
emilmont 1:7153ee70df01 170 int SDFileSystem::initialise_card_v1() {
emilmont 1:7153ee70df01 171 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 172 _cmd(55, 0);
emilmont 1:7153ee70df01 173 if (_cmd(41, 0) == 0) {
emilmont 1:7153ee70df01 174 cdv = 512;
emilmont 1:7153ee70df01 175 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
emilmont 1:7153ee70df01 176 return SDCARD_V1;
emilmont 1:7153ee70df01 177 }
emilmont 1:7153ee70df01 178 }
emilmont 1:7153ee70df01 179
emilmont 1:7153ee70df01 180 debug("Timeout waiting for v1.x card\n");
emilmont 1:7153ee70df01 181 return SDCARD_FAIL;
emilmont 1:7153ee70df01 182 }
emilmont 1:7153ee70df01 183
emilmont 1:7153ee70df01 184 int SDFileSystem::initialise_card_v2() {
emilmont 1:7153ee70df01 185 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 186 wait_ms(50);
emilmont 1:7153ee70df01 187 _cmd58();
emilmont 1:7153ee70df01 188 _cmd(55, 0);
emilmont 1:7153ee70df01 189 if (_cmd(41, 0x40000000) == 0) {
emilmont 1:7153ee70df01 190 _cmd58();
emilmont 1:7153ee70df01 191 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
emilmont 1:7153ee70df01 192 cdv = 1;
emilmont 1:7153ee70df01 193 return SDCARD_V2;
emilmont 1:7153ee70df01 194 }
emilmont 1:7153ee70df01 195 }
emilmont 1:7153ee70df01 196
emilmont 1:7153ee70df01 197 debug("Timeout waiting for v2.x card\n");
emilmont 1:7153ee70df01 198 return SDCARD_FAIL;
emilmont 1:7153ee70df01 199 }
emilmont 1:7153ee70df01 200
emilmont 1:7153ee70df01 201 int SDFileSystem::disk_initialize() {
emilmont 1:7153ee70df01 202 int i = initialise_card();
emilmont 1:7153ee70df01 203 debug_if(SD_DBG, "init card = %d\n", i);
emilmont 1:7153ee70df01 204 _sectors = _sd_sectors();
emilmont 1:7153ee70df01 205
emilmont 1:7153ee70df01 206 // Set block length to 512 (CMD16)
emilmont 1:7153ee70df01 207 if (_cmd(16, 512) != 0) {
emilmont 1:7153ee70df01 208 debug("Set 512-byte block timed out\n");
emilmont 1:7153ee70df01 209 return 1;
emilmont 1:7153ee70df01 210 }
emilmont 1:7153ee70df01 211
emilmont 1:7153ee70df01 212 _spi.frequency(1000000); // Set to 1MHz for data transfer
emilmont 1:7153ee70df01 213 return 0;
emilmont 1:7153ee70df01 214 }
emilmont 1:7153ee70df01 215
emilmont 1:7153ee70df01 216 int SDFileSystem::disk_write(const uint8_t *buffer, uint64_t block_number) {
emilmont 1:7153ee70df01 217 // set write address for single block (CMD24)
emilmont 1:7153ee70df01 218 if (_cmd(24, block_number * cdv) != 0) {
emilmont 1:7153ee70df01 219 return 1;
emilmont 1:7153ee70df01 220 }
emilmont 1:7153ee70df01 221
emilmont 1:7153ee70df01 222 // send the data block
emilmont 1:7153ee70df01 223 _write(buffer, 512);
emilmont 1:7153ee70df01 224 return 0;
emilmont 1:7153ee70df01 225 }
emilmont 1:7153ee70df01 226
emilmont 1:7153ee70df01 227 int SDFileSystem::disk_read(uint8_t *buffer, uint64_t block_number) {
emilmont 1:7153ee70df01 228 // set read address for single block (CMD17)
emilmont 1:7153ee70df01 229 if (_cmd(17, block_number * cdv) != 0) {
emilmont 1:7153ee70df01 230 return 1;
emilmont 1:7153ee70df01 231 }
emilmont 1:7153ee70df01 232
emilmont 1:7153ee70df01 233 // receive the data
emilmont 1:7153ee70df01 234 _read(buffer, 512);
emilmont 1:7153ee70df01 235 return 0;
emilmont 1:7153ee70df01 236 }
emilmont 1:7153ee70df01 237
emilmont 1:7153ee70df01 238 int SDFileSystem::disk_status() { return 0; }
emilmont 1:7153ee70df01 239 int SDFileSystem::disk_sync() { return 0; }
emilmont 1:7153ee70df01 240 uint64_t SDFileSystem::disk_sectors() { return _sectors; }
emilmont 1:7153ee70df01 241
emilmont 1:7153ee70df01 242
emilmont 1:7153ee70df01 243 // PRIVATE FUNCTIONS
emilmont 1:7153ee70df01 244 int SDFileSystem::_cmd(int cmd, int arg) {
vpcola 4:f0bd1dfd6f62 245 _mutex.lock();
emilmont 1:7153ee70df01 246 _cs = 0;
emilmont 1:7153ee70df01 247
emilmont 1:7153ee70df01 248 // send a command
emilmont 1:7153ee70df01 249 _spi.write(0x40 | cmd);
emilmont 1:7153ee70df01 250 _spi.write(arg >> 24);
emilmont 1:7153ee70df01 251 _spi.write(arg >> 16);
emilmont 1:7153ee70df01 252 _spi.write(arg >> 8);
emilmont 1:7153ee70df01 253 _spi.write(arg >> 0);
emilmont 1:7153ee70df01 254 _spi.write(0x95);
emilmont 1:7153ee70df01 255
emilmont 1:7153ee70df01 256 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 257 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 258 int response = _spi.write(0xFF);
emilmont 1:7153ee70df01 259 if (!(response & 0x80)) {
emilmont 1:7153ee70df01 260 _cs = 1;
emilmont 1:7153ee70df01 261 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 262 _mutex.unlock();
emilmont 1:7153ee70df01 263 return response;
emilmont 1:7153ee70df01 264 }
emilmont 1:7153ee70df01 265 }
emilmont 1:7153ee70df01 266 _cs = 1;
emilmont 1:7153ee70df01 267 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 268 _mutex.unlock();
emilmont 1:7153ee70df01 269 return -1; // timeout
emilmont 1:7153ee70df01 270 }
emilmont 1:7153ee70df01 271 int SDFileSystem::_cmdx(int cmd, int arg) {
vpcola 4:f0bd1dfd6f62 272 _mutex.lock();
emilmont 1:7153ee70df01 273 _cs = 0;
emilmont 1:7153ee70df01 274
emilmont 1:7153ee70df01 275 // send a command
emilmont 1:7153ee70df01 276 _spi.write(0x40 | cmd);
emilmont 1:7153ee70df01 277 _spi.write(arg >> 24);
emilmont 1:7153ee70df01 278 _spi.write(arg >> 16);
emilmont 1:7153ee70df01 279 _spi.write(arg >> 8);
emilmont 1:7153ee70df01 280 _spi.write(arg >> 0);
emilmont 1:7153ee70df01 281 _spi.write(0x95);
emilmont 1:7153ee70df01 282
emilmont 1:7153ee70df01 283 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 284 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 285 int response = _spi.write(0xFF);
emilmont 1:7153ee70df01 286 if (!(response & 0x80)) {
emilmont 1:7153ee70df01 287 return response;
emilmont 1:7153ee70df01 288 }
emilmont 1:7153ee70df01 289 }
emilmont 1:7153ee70df01 290 _cs = 1;
emilmont 1:7153ee70df01 291 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 292 _mutex.unlock();
emilmont 1:7153ee70df01 293 return -1; // timeout
emilmont 1:7153ee70df01 294 }
emilmont 1:7153ee70df01 295
emilmont 1:7153ee70df01 296
emilmont 1:7153ee70df01 297 int SDFileSystem::_cmd58() {
vpcola 4:f0bd1dfd6f62 298 _mutex.lock();
emilmont 1:7153ee70df01 299 _cs = 0;
emilmont 1:7153ee70df01 300 int arg = 0;
emilmont 1:7153ee70df01 301
emilmont 1:7153ee70df01 302 // send a command
emilmont 1:7153ee70df01 303 _spi.write(0x40 | 58);
emilmont 1:7153ee70df01 304 _spi.write(arg >> 24);
emilmont 1:7153ee70df01 305 _spi.write(arg >> 16);
emilmont 1:7153ee70df01 306 _spi.write(arg >> 8);
emilmont 1:7153ee70df01 307 _spi.write(arg >> 0);
emilmont 1:7153ee70df01 308 _spi.write(0x95);
emilmont 1:7153ee70df01 309
emilmont 1:7153ee70df01 310 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 311 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 312 int response = _spi.write(0xFF);
emilmont 1:7153ee70df01 313 if (!(response & 0x80)) {
emilmont 1:7153ee70df01 314 int ocr = _spi.write(0xFF) << 24;
emilmont 1:7153ee70df01 315 ocr |= _spi.write(0xFF) << 16;
emilmont 1:7153ee70df01 316 ocr |= _spi.write(0xFF) << 8;
emilmont 1:7153ee70df01 317 ocr |= _spi.write(0xFF) << 0;
emilmont 1:7153ee70df01 318 _cs = 1;
emilmont 1:7153ee70df01 319 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 320 _mutex.unlock();
emilmont 1:7153ee70df01 321 return response;
emilmont 1:7153ee70df01 322 }
emilmont 1:7153ee70df01 323 }
emilmont 1:7153ee70df01 324 _cs = 1;
emilmont 1:7153ee70df01 325 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 326 _mutex.unlock();
emilmont 1:7153ee70df01 327 return -1; // timeout
emilmont 1:7153ee70df01 328 }
emilmont 1:7153ee70df01 329
emilmont 1:7153ee70df01 330 int SDFileSystem::_cmd8() {
vpcola 4:f0bd1dfd6f62 331 _mutex.lock();
emilmont 1:7153ee70df01 332 _cs = 0;
emilmont 1:7153ee70df01 333
emilmont 1:7153ee70df01 334 // send a command
emilmont 1:7153ee70df01 335 _spi.write(0x40 | 8); // CMD8
emilmont 1:7153ee70df01 336 _spi.write(0x00); // reserved
emilmont 1:7153ee70df01 337 _spi.write(0x00); // reserved
emilmont 1:7153ee70df01 338 _spi.write(0x01); // 3.3v
emilmont 1:7153ee70df01 339 _spi.write(0xAA); // check pattern
emilmont 1:7153ee70df01 340 _spi.write(0x87); // crc
emilmont 1:7153ee70df01 341
emilmont 1:7153ee70df01 342 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 343 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
emilmont 1:7153ee70df01 344 char response[5];
emilmont 1:7153ee70df01 345 response[0] = _spi.write(0xFF);
emilmont 1:7153ee70df01 346 if (!(response[0] & 0x80)) {
emilmont 1:7153ee70df01 347 for (int j = 1; j < 5; j++) {
emilmont 1:7153ee70df01 348 response[i] = _spi.write(0xFF);
emilmont 1:7153ee70df01 349 }
emilmont 1:7153ee70df01 350 _cs = 1;
emilmont 1:7153ee70df01 351 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 352 _mutex.unlock();
emilmont 1:7153ee70df01 353 return response[0];
emilmont 1:7153ee70df01 354 }
emilmont 1:7153ee70df01 355 }
emilmont 1:7153ee70df01 356 _cs = 1;
emilmont 1:7153ee70df01 357 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 358 _mutex.unlock();
emilmont 1:7153ee70df01 359 return -1; // timeout
emilmont 1:7153ee70df01 360 }
emilmont 1:7153ee70df01 361
emilmont 1:7153ee70df01 362 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
vpcola 4:f0bd1dfd6f62 363 _mutex.lock();
emilmont 1:7153ee70df01 364 _cs = 0;
emilmont 1:7153ee70df01 365
emilmont 1:7153ee70df01 366 // read until start byte (0xFF)
emilmont 1:7153ee70df01 367 while (_spi.write(0xFF) != 0xFE);
emilmont 1:7153ee70df01 368
emilmont 1:7153ee70df01 369 // read data
emilmont 1:7153ee70df01 370 for (int i = 0; i < length; i++) {
emilmont 1:7153ee70df01 371 buffer[i] = _spi.write(0xFF);
emilmont 1:7153ee70df01 372 }
emilmont 1:7153ee70df01 373 _spi.write(0xFF); // checksum
emilmont 1:7153ee70df01 374 _spi.write(0xFF);
emilmont 1:7153ee70df01 375
emilmont 1:7153ee70df01 376 _cs = 1;
emilmont 1:7153ee70df01 377 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 378 _mutex.unlock();
emilmont 1:7153ee70df01 379 return 0;
emilmont 1:7153ee70df01 380 }
emilmont 1:7153ee70df01 381
emilmont 1:7153ee70df01 382 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
vpcola 4:f0bd1dfd6f62 383 _mutex.lock();
emilmont 1:7153ee70df01 384 _cs = 0;
emilmont 1:7153ee70df01 385
emilmont 1:7153ee70df01 386 // indicate start of block
emilmont 1:7153ee70df01 387 _spi.write(0xFE);
emilmont 1:7153ee70df01 388
emilmont 1:7153ee70df01 389 // write the data
emilmont 1:7153ee70df01 390 for (int i = 0; i < length; i++) {
emilmont 1:7153ee70df01 391 _spi.write(buffer[i]);
emilmont 1:7153ee70df01 392 }
emilmont 1:7153ee70df01 393
emilmont 1:7153ee70df01 394 // write the checksum
emilmont 1:7153ee70df01 395 _spi.write(0xFF);
emilmont 1:7153ee70df01 396 _spi.write(0xFF);
emilmont 1:7153ee70df01 397
emilmont 1:7153ee70df01 398 // check the response token
emilmont 1:7153ee70df01 399 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
emilmont 1:7153ee70df01 400 _cs = 1;
emilmont 1:7153ee70df01 401 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 402 _mutex.unlock();
emilmont 1:7153ee70df01 403 return 1;
emilmont 1:7153ee70df01 404 }
emilmont 1:7153ee70df01 405
emilmont 1:7153ee70df01 406 // wait for write to finish
emilmont 1:7153ee70df01 407 while (_spi.write(0xFF) == 0);
emilmont 1:7153ee70df01 408
emilmont 1:7153ee70df01 409 _cs = 1;
emilmont 1:7153ee70df01 410 _spi.write(0xFF);
vpcola 4:f0bd1dfd6f62 411 _mutex.unlock();
emilmont 1:7153ee70df01 412 return 0;
emilmont 1:7153ee70df01 413 }
emilmont 1:7153ee70df01 414
emilmont 1:7153ee70df01 415 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
emilmont 1:7153ee70df01 416 uint32_t bits = 0;
emilmont 1:7153ee70df01 417 uint32_t size = 1 + msb - lsb;
emilmont 1:7153ee70df01 418 for (int i = 0; i < size; i++) {
emilmont 1:7153ee70df01 419 uint32_t position = lsb + i;
emilmont 1:7153ee70df01 420 uint32_t byte = 15 - (position >> 3);
emilmont 1:7153ee70df01 421 uint32_t bit = position & 0x7;
emilmont 1:7153ee70df01 422 uint32_t value = (data[byte] >> bit) & 1;
emilmont 1:7153ee70df01 423 bits |= value << i;
emilmont 1:7153ee70df01 424 }
emilmont 1:7153ee70df01 425 return bits;
emilmont 1:7153ee70df01 426 }
emilmont 1:7153ee70df01 427
emilmont 1:7153ee70df01 428 uint64_t SDFileSystem::_sd_sectors() {
emilmont 1:7153ee70df01 429 uint32_t c_size, c_size_mult, read_bl_len;
emilmont 1:7153ee70df01 430 uint32_t block_len, mult, blocknr, capacity;
emilmont 1:7153ee70df01 431 uint32_t hc_c_size;
emilmont 1:7153ee70df01 432 uint64_t blocks;
emilmont 1:7153ee70df01 433
emilmont 1:7153ee70df01 434 // CMD9, Response R2 (R1 byte + 16-byte block read)
emilmont 1:7153ee70df01 435 if (_cmdx(9, 0) != 0) {
emilmont 1:7153ee70df01 436 debug("Didn't get a response from the disk\n");
emilmont 1:7153ee70df01 437 return 0;
emilmont 1:7153ee70df01 438 }
emilmont 1:7153ee70df01 439
emilmont 1:7153ee70df01 440 uint8_t csd[16];
emilmont 1:7153ee70df01 441 if (_read(csd, 16) != 0) {
emilmont 1:7153ee70df01 442 debug("Couldn't read csd response from disk\n");
emilmont 1:7153ee70df01 443 return 0;
emilmont 1:7153ee70df01 444 }
emilmont 1:7153ee70df01 445
emilmont 1:7153ee70df01 446 // csd_structure : csd[127:126]
emilmont 1:7153ee70df01 447 // c_size : csd[73:62]
emilmont 1:7153ee70df01 448 // c_size_mult : csd[49:47]
emilmont 1:7153ee70df01 449 // read_bl_len : csd[83:80] - the *maximum* read block length
emilmont 1:7153ee70df01 450
emilmont 1:7153ee70df01 451 int csd_structure = ext_bits(csd, 127, 126);
emilmont 1:7153ee70df01 452
emilmont 1:7153ee70df01 453 switch (csd_structure) {
emilmont 1:7153ee70df01 454 case 0:
emilmont 1:7153ee70df01 455 cdv = 512;
emilmont 1:7153ee70df01 456 c_size = ext_bits(csd, 73, 62);
emilmont 1:7153ee70df01 457 c_size_mult = ext_bits(csd, 49, 47);
emilmont 1:7153ee70df01 458 read_bl_len = ext_bits(csd, 83, 80);
emilmont 1:7153ee70df01 459
emilmont 1:7153ee70df01 460 block_len = 1 << read_bl_len;
emilmont 1:7153ee70df01 461 mult = 1 << (c_size_mult + 2);
emilmont 1:7153ee70df01 462 blocknr = (c_size + 1) * mult;
emilmont 1:7153ee70df01 463 capacity = blocknr * block_len;
emilmont 1:7153ee70df01 464 blocks = capacity / 512;
emilmont 1:7153ee70df01 465 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
emilmont 1:7153ee70df01 466 break;
emilmont 1:7153ee70df01 467
emilmont 1:7153ee70df01 468 case 1:
emilmont 1:7153ee70df01 469 cdv = 1;
emilmont 1:7153ee70df01 470 hc_c_size = ext_bits(csd, 63, 48);
emilmont 1:7153ee70df01 471 blocks = (hc_c_size+1)*1024;
emilmont 1:7153ee70df01 472 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
emilmont 1:7153ee70df01 473 break;
emilmont 1:7153ee70df01 474
emilmont 1:7153ee70df01 475 default:
emilmont 1:7153ee70df01 476 debug("CSD struct unsupported\r\n");
emilmont 1:7153ee70df01 477 return 0;
emilmont 1:7153ee70df01 478 };
emilmont 1:7153ee70df01 479 return blocks;
emilmont 1:7153ee70df01 480 }