Vergil Cola / Mbed OS MQTTGateway2

Fork of my original MQTTGateway

Dependencies:   mbed-http

easy-connect/stm-spirit1-rf-driver/stm-spirit1-rf-driver/radio_spi.h@0:a1734fe1ec4b, 2017-04-08 (annotated)

Committer:
vpcola
Date:
Sat Apr 08 14:43:14 2017 +0000
Revision:
0:a1734fe1ec4b
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vpcola 0:a1734fe1ec4b 1 /**
vpcola 0:a1734fe1ec4b 2 ******************************************************************************
vpcola 0:a1734fe1ec4b 3 * @file radio_spi.h
vpcola 0:a1734fe1ec4b 4 * @author System Lab - NOIDA
vpcola 0:a1734fe1ec4b 5 * @version V1.0.0
vpcola 0:a1734fe1ec4b 6 * @date 15-May-2014
vpcola 0:a1734fe1ec4b 7 * @brief This file contains all the functions prototypes for SPI .
vpcola 0:a1734fe1ec4b 8 ******************************************************************************
vpcola 0:a1734fe1ec4b 9 * @attention
vpcola 0:a1734fe1ec4b 10 *
vpcola 0:a1734fe1ec4b 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
vpcola 0:a1734fe1ec4b 12 *
vpcola 0:a1734fe1ec4b 13 * Redistribution and use in source and binary forms, with or without modification,
vpcola 0:a1734fe1ec4b 14 * are permitted provided that the following conditions are met:
vpcola 0:a1734fe1ec4b 15 * 1. Redistributions of source code must retain the above copyright notice,
vpcola 0:a1734fe1ec4b 16 * this list of conditions and the following disclaimer.
vpcola 0:a1734fe1ec4b 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
vpcola 0:a1734fe1ec4b 18 * this list of conditions and the following disclaimer in the documentation
vpcola 0:a1734fe1ec4b 19 * and/or other materials provided with the distribution.
vpcola 0:a1734fe1ec4b 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vpcola 0:a1734fe1ec4b 21 * may be used to endorse or promote products derived from this software
vpcola 0:a1734fe1ec4b 22 * without specific prior written permission.
vpcola 0:a1734fe1ec4b 23 *
vpcola 0:a1734fe1ec4b 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vpcola 0:a1734fe1ec4b 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vpcola 0:a1734fe1ec4b 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vpcola 0:a1734fe1ec4b 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vpcola 0:a1734fe1ec4b 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vpcola 0:a1734fe1ec4b 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vpcola 0:a1734fe1ec4b 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vpcola 0:a1734fe1ec4b 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vpcola 0:a1734fe1ec4b 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vpcola 0:a1734fe1ec4b 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vpcola 0:a1734fe1ec4b 34 *
vpcola 0:a1734fe1ec4b 35 ******************************************************************************
vpcola 0:a1734fe1ec4b 36 */
vpcola 0:a1734fe1ec4b 37
vpcola 0:a1734fe1ec4b 38
vpcola 0:a1734fe1ec4b 39 /* Define to prevent recursive inclusion -------------------------------------*/
vpcola 0:a1734fe1ec4b 40 #ifndef __RADIO_SPI_H
vpcola 0:a1734fe1ec4b 41 #define __RADIO_SPI_H
vpcola 0:a1734fe1ec4b 42 #ifdef __cplusplus
vpcola 0:a1734fe1ec4b 43 extern "C" {
vpcola 0:a1734fe1ec4b 44 #endif
vpcola 0:a1734fe1ec4b 45
vpcola 0:a1734fe1ec4b 46 /* Includes ------------------------------------------------------------------*/
vpcola 0:a1734fe1ec4b 47 #ifdef USE_STM32L1XX_NUCLEO
vpcola 0:a1734fe1ec4b 48 // #include "stm32l1xx_hal.h"
vpcola 0:a1734fe1ec4b 49 #endif
vpcola 0:a1734fe1ec4b 50
vpcola 0:a1734fe1ec4b 51 #ifdef USE_STM32F4XX_NUCLEO
vpcola 0:a1734fe1ec4b 52 // #include "stm32f4xx_hal.h"
vpcola 0:a1734fe1ec4b 53 #endif
vpcola 0:a1734fe1ec4b 54 #include "SPIRIT_Config.h"
vpcola 0:a1734fe1ec4b 55 #include "radio_spi.h"
vpcola 0:a1734fe1ec4b 56 // #include "spirit1-arch.h"
vpcola 0:a1734fe1ec4b 57
vpcola 0:a1734fe1ec4b 58 /**
vpcola 0:a1734fe1ec4b 59 * @addtogroup BSP
vpcola 0:a1734fe1ec4b 60 * @{
vpcola 0:a1734fe1ec4b 61 */
vpcola 0:a1734fe1ec4b 62
vpcola 0:a1734fe1ec4b 63 /* Exported types ------------------------------------------------------------*/
vpcola 0:a1734fe1ec4b 64
vpcola 0:a1734fe1ec4b 65
vpcola 0:a1734fe1ec4b 66 /* Exported constants --------------------------------------------------------*/
vpcola 0:a1734fe1ec4b 67
vpcola 0:a1734fe1ec4b 68
vpcola 0:a1734fe1ec4b 69 /* Exported macro ------------------------------------------------------------*/
vpcola 0:a1734fe1ec4b 70 /* Define for SPIRIT1 board */
vpcola 0:a1734fe1ec4b 71 #if !defined (USE_SPIRIT1_DEFAULT)
vpcola 0:a1734fe1ec4b 72 #define USE_SPIRIT1_DEFAULT
vpcola 0:a1734fe1ec4b 73 #endif
vpcola 0:a1734fe1ec4b 74
vpcola 0:a1734fe1ec4b 75 /* SPIRIT1_Spi_config */
vpcola 0:a1734fe1ec4b 76 /* SPI1 */
vpcola 0:a1734fe1ec4b 77 #define RADIO_SPI SPI1
vpcola 0:a1734fe1ec4b 78 #define RADIO_SPI_CLK_ENABLE() __SPI1_CLK_ENABLE()
vpcola 0:a1734fe1ec4b 79 #define RADIO_SPI_CLK_DISABLE() __SPI1_CLK_DISABLE()
vpcola 0:a1734fe1ec4b 80
vpcola 0:a1734fe1ec4b 81 #define RADIO_SPI_MISO_PORT GPIOA
vpcola 0:a1734fe1ec4b 82 #define RADIO_SPI_MISO_PIN GPIO_PIN_6
vpcola 0:a1734fe1ec4b 83 #define RADIO_SPI_MISO_CLOCK_ENABLE() __GPIOA_CLK_ENABLE()
vpcola 0:a1734fe1ec4b 84 #define RADIO_SPI_MISO_CLOCK_DISABLE() __GPIOA_CLK_DISABLE()
vpcola 0:a1734fe1ec4b 85
vpcola 0:a1734fe1ec4b 86 #define RADIO_SPI_MOSI_PORT GPIOA
vpcola 0:a1734fe1ec4b 87 #define RADIO_SPI_MOSI_PIN GPIO_PIN_7
vpcola 0:a1734fe1ec4b 88 #define RADIO_SPI_MOSI_CLOCK_ENABLE() __GPIOA_CLK_ENABLE()
vpcola 0:a1734fe1ec4b 89 #define RADIO_SPI_MOSI_CLOCK_DISABLE() __GPIOA_CLK_DISABLE()
vpcola 0:a1734fe1ec4b 90
vpcola 0:a1734fe1ec4b 91
vpcola 0:a1734fe1ec4b 92
vpcola 0:a1734fe1ec4b 93 #ifdef USE_SPIRIT1_DEFAULT
vpcola 0:a1734fe1ec4b 94
vpcola 0:a1734fe1ec4b 95 #define RADIO_SPI_SCK_PORT GPIOB
vpcola 0:a1734fe1ec4b 96 #define RADIO_SPI_SCK_PIN GPIO_PIN_3
vpcola 0:a1734fe1ec4b 97 #define RADIO_SPI_SCK_CLOCK_ENABLE() __GPIOB_CLK_ENABLE()
vpcola 0:a1734fe1ec4b 98 #define RADIO_SPI_SCK_CLOCK_DISABLE() __GPIOB_CLK_DISABLE()
vpcola 0:a1734fe1ec4b 99
vpcola 0:a1734fe1ec4b 100
vpcola 0:a1734fe1ec4b 101 #define RADIO_SPI_CS_PORT GPIOB
vpcola 0:a1734fe1ec4b 102 #define RADIO_SPI_CS_PIN GPIO_PIN_6
vpcola 0:a1734fe1ec4b 103 #define RADIO_SPI_CS_CLOCK_ENABLE() __GPIOB_CLK_ENABLE()
vpcola 0:a1734fe1ec4b 104 #define RADIO_SPI_CS_CLOCK_DISABLE() __GPIOB_CLK_DISABLE()
vpcola 0:a1734fe1ec4b 105
vpcola 0:a1734fe1ec4b 106 #else
vpcola 0:a1734fe1ec4b 107
vpcola 0:a1734fe1ec4b 108 #define RADIO_SPI_SCK_PORT GPIOB
vpcola 0:a1734fe1ec4b 109 #define RADIO_SPI_SCK_PIN GPIO_PIN_3
vpcola 0:a1734fe1ec4b 110 #define RADIO_SPI_SCK_CLOCK_ENABLE() __GPIOB_CLK_ENABLE()
vpcola 0:a1734fe1ec4b 111 #define RADIO_SPI_SCK_CLOCK_DISABLE() __GPIOB_CLK_DISABLE()
vpcola 0:a1734fe1ec4b 112
vpcola 0:a1734fe1ec4b 113
vpcola 0:a1734fe1ec4b 114 #define RADIO_SPI_CS_PORT GPIOB
vpcola 0:a1734fe1ec4b 115 #define RADIO_SPI_CS_PIN GPIO_PIN_6
vpcola 0:a1734fe1ec4b 116 #define RADIO_SPI_CS_CLOCK_ENABLE() __GPIOB_CLK_ENABLE()
vpcola 0:a1734fe1ec4b 117 #define RADIO_SPI_CS_CLOCK_DISABLE() __GPIOB_CLK_DISABLE()
vpcola 0:a1734fe1ec4b 118
vpcola 0:a1734fe1ec4b 119 #endif
vpcola 0:a1734fe1ec4b 120
vpcola 0:a1734fe1ec4b 121 /* Maximum Timeout values for flags waiting loops. These timeouts are not based
vpcola 0:a1734fe1ec4b 122 on accurate values, they just guarantee that the application will not remain
vpcola 0:a1734fe1ec4b 123 stuck if the SPI communication is corrupted.
vpcola 0:a1734fe1ec4b 124 You may modify these timeout values depending on CPU frequency and application
vpcola 0:a1734fe1ec4b 125 conditions (interrupts routines ...) */
vpcola 0:a1734fe1ec4b 126 #define RADIO_SPI_TIMEOUT_MAX ((uint32_t)1000)
vpcola 0:a1734fe1ec4b 127
vpcola 0:a1734fe1ec4b 128 /* SPIRIT1_Spi_config_Private_Defines */
vpcola 0:a1734fe1ec4b 129 #define CS_TO_SCLK_DELAY 0x0200//FIXME what is this doing?
vpcola 0:a1734fe1ec4b 130 #define CLK_TO_CS_DELAY 0x0001
vpcola 0:a1734fe1ec4b 131
vpcola 0:a1734fe1ec4b 132 /* SPIRIT1_Spi_config_Headers */
vpcola 0:a1734fe1ec4b 133 #define HEADER_WRITE_MASK 0x00 /*!< Write mask for header byte*/
vpcola 0:a1734fe1ec4b 134 #define HEADER_READ_MASK 0x01 /*!< Read mask for header byte*/
vpcola 0:a1734fe1ec4b 135 #define HEADER_ADDRESS_MASK 0x00 /*!< Address mask for header byte*/
vpcola 0:a1734fe1ec4b 136 #define HEADER_COMMAND_MASK 0x80 /*!< Command mask for header byte*/
vpcola 0:a1734fe1ec4b 137
vpcola 0:a1734fe1ec4b 138 #define LINEAR_FIFO_ADDRESS 0xFF /*!< Linear FIFO address*/
vpcola 0:a1734fe1ec4b 139
vpcola 0:a1734fe1ec4b 140 /* SPIRIT1_Spi_config_Private_FunctionPrototypes */
vpcola 0:a1734fe1ec4b 141 #define SPI_ENTER_CRITICAL() IRQ_DISABLE()
vpcola 0:a1734fe1ec4b 142 #define SPI_EXIT_CRITICAL() IRQ_ENABLE()
vpcola 0:a1734fe1ec4b 143
vpcola 0:a1734fe1ec4b 144 /* SPIRIT1_Spi_config_Private_Functions */
vpcola 0:a1734fe1ec4b 145 #define RadioSpiCSLow() HAL_GPIO_WritePin(RADIO_SPI_CS_PORT, RADIO_SPI_CS_PIN, GPIO_PIN_RESET)
vpcola 0:a1734fe1ec4b 146 #define RadioSpiCSHigh() HAL_GPIO_WritePin(RADIO_SPI_CS_PORT, RADIO_SPI_CS_PIN, GPIO_PIN_SET)
vpcola 0:a1734fe1ec4b 147
vpcola 0:a1734fe1ec4b 148 /* SPIRIT1_Spi_config_Private_Macros */
vpcola 0:a1734fe1ec4b 149 #define BUILT_HEADER(add_comm, w_r) (add_comm | w_r) /*!< macro to build the header byte*/
vpcola 0:a1734fe1ec4b 150 #define WRITE_HEADER BUILT_HEADER(HEADER_ADDRESS_MASK, HEADER_WRITE_MASK) /*!< macro to build the write
vpcola 0:a1734fe1ec4b 151 header byte*/
vpcola 0:a1734fe1ec4b 152 #define READ_HEADER BUILT_HEADER(HEADER_ADDRESS_MASK, HEADER_READ_MASK) /*!< macro to build the read
vpcola 0:a1734fe1ec4b 153 header byte*/
vpcola 0:a1734fe1ec4b 154 #define COMMAND_HEADER BUILT_HEADER(HEADER_COMMAND_MASK, HEADER_WRITE_MASK) /*!< macro to build the command
vpcola 0:a1734fe1ec4b 155 header byte*/
vpcola 0:a1734fe1ec4b 156
vpcola 0:a1734fe1ec4b 157
vpcola 0:a1734fe1ec4b 158
vpcola 0:a1734fe1ec4b 159 /* Exported Variables --------------------------------------------------------*/
vpcola 0:a1734fe1ec4b 160
vpcola 0:a1734fe1ec4b 161
vpcola 0:a1734fe1ec4b 162 /* Exported functions ------------------------------------------------------- */
vpcola 0:a1734fe1ec4b 163 void SdkEvalSpiInit(void);
vpcola 0:a1734fe1ec4b 164 // void SpiCSGpioSetLevel(GPIO_PinState xState);
vpcola 0:a1734fe1ec4b 165 StatusBytes SdkEvalSpiWriteRegisters(uint8_t cRegAddress, uint8_t cNbBytes, uint8_t* pcBuffer);
vpcola 0:a1734fe1ec4b 166 StatusBytes SdkEvalSpiReadRegisters(uint8_t cRegAddress, uint8_t cNbBytes, uint8_t* pcBuffer);
vpcola 0:a1734fe1ec4b 167 StatusBytes SdkEvalSpiCommandStrobes(uint8_t cCommandCode);
vpcola 0:a1734fe1ec4b 168 StatusBytes SdkEvalSpiWriteFifo(uint8_t cNbBytes, uint8_t* pcBuffer);
vpcola 0:a1734fe1ec4b 169 StatusBytes SdkEvalSpiReadFifo(uint8_t cNbBytes, uint8_t* pcBuffer);
vpcola 0:a1734fe1ec4b 170
vpcola 0:a1734fe1ec4b 171
vpcola 0:a1734fe1ec4b 172 #ifdef __cplusplus
vpcola 0:a1734fe1ec4b 173 }
vpcola 0:a1734fe1ec4b 174 #endif
vpcola 0:a1734fe1ec4b 175 #endif /*__RADIO_SPI_H */
vpcola 0:a1734fe1ec4b 176
vpcola 0:a1734fe1ec4b 177 /**
vpcola 0:a1734fe1ec4b 178 * @}
vpcola 0:a1734fe1ec4b 179 */
vpcola 0:a1734fe1ec4b 180
vpcola 0:a1734fe1ec4b 181 /**
vpcola 0:a1734fe1ec4b 182 * @}
vpcola 0:a1734fe1ec4b 183 */
vpcola 0:a1734fe1ec4b 184
vpcola 0:a1734fe1ec4b 185 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/