Vergil Cola / Mbed OS MQTTGateway2

Fork of my original MQTTGateway

Dependencies:   mbed-http

easy-connect/stm-spirit1-rf-driver/source/libs/spirit1/SPIRIT1_Library/Inc/SPIRIT_Gpio.h@0:a1734fe1ec4b, 2017-04-08 (annotated)

Committer:
vpcola
Date:
Sat Apr 08 14:43:14 2017 +0000
Revision:
0:a1734fe1ec4b
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
vpcola 0:a1734fe1ec4b 1 /**
vpcola 0:a1734fe1ec4b 2 ******************************************************************************
vpcola 0:a1734fe1ec4b 3 * @file SPIRIT_Gpio.h
vpcola 0:a1734fe1ec4b 4 * @author VMA division - AMS
vpcola 0:a1734fe1ec4b 5 * @version 3.2.2
vpcola 0:a1734fe1ec4b 6 * @date 08-July-2015
vpcola 0:a1734fe1ec4b 7 * @brief This file provides all the low level API to manage SPIRIT GPIO.
vpcola 0:a1734fe1ec4b 8 *
vpcola 0:a1734fe1ec4b 9 * @details
vpcola 0:a1734fe1ec4b 10 *
vpcola 0:a1734fe1ec4b 11 * This module can be used to configure the Spirit GPIO pins to perform
vpcola 0:a1734fe1ec4b 12 * specific functions.
vpcola 0:a1734fe1ec4b 13 * The structure <i>@ref gpioIRQ</i> can be used to specify these features for
vpcola 0:a1734fe1ec4b 14 * one of the four Spirit Gpio pin.
vpcola 0:a1734fe1ec4b 15 * The following example shows how to configure a pin (GPIO 3) to be used as an IRQ source
vpcola 0:a1734fe1ec4b 16 * for a microcontroller using the <i>@ref SpiritGpioInit()</i> function.
vpcola 0:a1734fe1ec4b 17 *
vpcola 0:a1734fe1ec4b 18 * <b>Example:</b>
vpcola 0:a1734fe1ec4b 19 * @code
vpcola 0:a1734fe1ec4b 20 *
vpcola 0:a1734fe1ec4b 21 * SGpioInit gpioIRQ={
vpcola 0:a1734fe1ec4b 22 * SPIRIT_GPIO_3,
vpcola 0:a1734fe1ec4b 23 * SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_LP,
vpcola 0:a1734fe1ec4b 24 * SPIRIT_GPIO_DIG_OUT_IRQ
vpcola 0:a1734fe1ec4b 25 * };
vpcola 0:a1734fe1ec4b 26 *
vpcola 0:a1734fe1ec4b 27 * ...
vpcola 0:a1734fe1ec4b 28 *
vpcola 0:a1734fe1ec4b 29 * SpiritGpioInit(&gpioIRQ);
vpcola 0:a1734fe1ec4b 30 *
vpcola 0:a1734fe1ec4b 31 * @endcode
vpcola 0:a1734fe1ec4b 32 *
vpcola 0:a1734fe1ec4b 33 * @note Please read the functions documentation for the other GPIO features.
vpcola 0:a1734fe1ec4b 34 *
vpcola 0:a1734fe1ec4b 35 *
vpcola 0:a1734fe1ec4b 36 * @attention
vpcola 0:a1734fe1ec4b 37 *
vpcola 0:a1734fe1ec4b 38 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
vpcola 0:a1734fe1ec4b 39 *
vpcola 0:a1734fe1ec4b 40 * Redistribution and use in source and binary forms, with or without modification,
vpcola 0:a1734fe1ec4b 41 * are permitted provided that the following conditions are met:
vpcola 0:a1734fe1ec4b 42 * 1. Redistributions of source code must retain the above copyright notice,
vpcola 0:a1734fe1ec4b 43 * this list of conditions and the following disclaimer.
vpcola 0:a1734fe1ec4b 44 * 2. Redistributions in binary form must reproduce the above copyright notice,
vpcola 0:a1734fe1ec4b 45 * this list of conditions and the following disclaimer in the documentation
vpcola 0:a1734fe1ec4b 46 * and/or other materials provided with the distribution.
vpcola 0:a1734fe1ec4b 47 * 3. Neither the name of STMicroelectronics nor the names of its contributors
vpcola 0:a1734fe1ec4b 48 * may be used to endorse or promote products derived from this software
vpcola 0:a1734fe1ec4b 49 * without specific prior written permission.
vpcola 0:a1734fe1ec4b 50 *
vpcola 0:a1734fe1ec4b 51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
vpcola 0:a1734fe1ec4b 52 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
vpcola 0:a1734fe1ec4b 53 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
vpcola 0:a1734fe1ec4b 54 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
vpcola 0:a1734fe1ec4b 55 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
vpcola 0:a1734fe1ec4b 56 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
vpcola 0:a1734fe1ec4b 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
vpcola 0:a1734fe1ec4b 58 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
vpcola 0:a1734fe1ec4b 59 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
vpcola 0:a1734fe1ec4b 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
vpcola 0:a1734fe1ec4b 61 *
vpcola 0:a1734fe1ec4b 62 ******************************************************************************
vpcola 0:a1734fe1ec4b 63 */
vpcola 0:a1734fe1ec4b 64
vpcola 0:a1734fe1ec4b 65 /* Define to prevent recursive inclusion -------------------------------------*/
vpcola 0:a1734fe1ec4b 66 #ifndef __SPIRIT_GPIO_H
vpcola 0:a1734fe1ec4b 67 #define __SPIRIT_GPIO_H
vpcola 0:a1734fe1ec4b 68
vpcola 0:a1734fe1ec4b 69
vpcola 0:a1734fe1ec4b 70 /* Includes ------------------------------------------------------------------*/
vpcola 0:a1734fe1ec4b 71
vpcola 0:a1734fe1ec4b 72 #include "SPIRIT_Regs.h"
vpcola 0:a1734fe1ec4b 73 #include "SPIRIT_Types.h"
vpcola 0:a1734fe1ec4b 74
vpcola 0:a1734fe1ec4b 75
vpcola 0:a1734fe1ec4b 76 #ifdef __cplusplus
vpcola 0:a1734fe1ec4b 77 extern "C" {
vpcola 0:a1734fe1ec4b 78 #endif
vpcola 0:a1734fe1ec4b 79
vpcola 0:a1734fe1ec4b 80
vpcola 0:a1734fe1ec4b 81 /** @addtogroup SPIRIT_Libraries
vpcola 0:a1734fe1ec4b 82 * @{
vpcola 0:a1734fe1ec4b 83 */
vpcola 0:a1734fe1ec4b 84
vpcola 0:a1734fe1ec4b 85
vpcola 0:a1734fe1ec4b 86 /** @defgroup SPIRIT_Gpio GPIO
vpcola 0:a1734fe1ec4b 87 * @brief Configuration and management of SPIRIT GPIO.
vpcola 0:a1734fe1ec4b 88 * @details See the file <i>@ref SPIRIT_Gpio.h</i> for more details.
vpcola 0:a1734fe1ec4b 89 * @{
vpcola 0:a1734fe1ec4b 90 */
vpcola 0:a1734fe1ec4b 91
vpcola 0:a1734fe1ec4b 92
vpcola 0:a1734fe1ec4b 93
vpcola 0:a1734fe1ec4b 94 /** @defgroup Gpio_Exported_Types GPIO Exported Types
vpcola 0:a1734fe1ec4b 95 * @{
vpcola 0:a1734fe1ec4b 96 */
vpcola 0:a1734fe1ec4b 97
vpcola 0:a1734fe1ec4b 98 /**
vpcola 0:a1734fe1ec4b 99 * @brief SPIRIT GPIO pin enumeration.
vpcola 0:a1734fe1ec4b 100 */
vpcola 0:a1734fe1ec4b 101 typedef enum
vpcola 0:a1734fe1ec4b 102 {
vpcola 0:a1734fe1ec4b 103 SPIRIT_GPIO_0 = GPIO0_CONF_BASE, /*!< GPIO_0 selected */
vpcola 0:a1734fe1ec4b 104 SPIRIT_GPIO_1 = GPIO1_CONF_BASE, /*!< GPIO_1 selected */
vpcola 0:a1734fe1ec4b 105 SPIRIT_GPIO_2 = GPIO2_CONF_BASE, /*!< GPIO_2 selected */
vpcola 0:a1734fe1ec4b 106 SPIRIT_GPIO_3 = GPIO3_CONF_BASE /*!< GPIO_3 selected */
vpcola 0:a1734fe1ec4b 107 }SpiritGpioPin;
vpcola 0:a1734fe1ec4b 108
vpcola 0:a1734fe1ec4b 109
vpcola 0:a1734fe1ec4b 110 #define IS_SPIRIT_GPIO(PIN) ((PIN == SPIRIT_GPIO_0) || \
vpcola 0:a1734fe1ec4b 111 (PIN == SPIRIT_GPIO_1) || \
vpcola 0:a1734fe1ec4b 112 (PIN == SPIRIT_GPIO_2) || \
vpcola 0:a1734fe1ec4b 113 (PIN == SPIRIT_GPIO_3))
vpcola 0:a1734fe1ec4b 114
vpcola 0:a1734fe1ec4b 115
vpcola 0:a1734fe1ec4b 116 /**
vpcola 0:a1734fe1ec4b 117 * @brief SPIRIT GPIO mode enumeration.
vpcola 0:a1734fe1ec4b 118 */
vpcola 0:a1734fe1ec4b 119 typedef enum
vpcola 0:a1734fe1ec4b 120 {
vpcola 0:a1734fe1ec4b 121 SPIRIT_GPIO_MODE_DIGITAL_INPUT = 0x01, /*!< Digital Input on GPIO */
vpcola 0:a1734fe1ec4b 122 SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_LP = 0x02, /*!< Digital Output on GPIO (low current) */
vpcola 0:a1734fe1ec4b 123 SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_HP = 0x03 /*!< Digital Output on GPIO (high current) */
vpcola 0:a1734fe1ec4b 124 }SpiritGpioMode;
vpcola 0:a1734fe1ec4b 125
vpcola 0:a1734fe1ec4b 126 #define IS_SPIRIT_GPIO_MODE(MODE) ((MODE == SPIRIT_GPIO_MODE_DIGITAL_INPUT) || \
vpcola 0:a1734fe1ec4b 127 (MODE == SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_LP) || \
vpcola 0:a1734fe1ec4b 128 (MODE == SPIRIT_GPIO_MODE_DIGITAL_OUTPUT_HP))
vpcola 0:a1734fe1ec4b 129
vpcola 0:a1734fe1ec4b 130
vpcola 0:a1734fe1ec4b 131
vpcola 0:a1734fe1ec4b 132 /**
vpcola 0:a1734fe1ec4b 133 * @brief SPIRIT I/O selection enumeration.
vpcola 0:a1734fe1ec4b 134 */
vpcola 0:a1734fe1ec4b 135 typedef enum
vpcola 0:a1734fe1ec4b 136 {
vpcola 0:a1734fe1ec4b 137 SPIRIT_GPIO_DIG_OUT_IRQ = 0x00, /*!< nIRQ (Interrupt Request, active low) , default configuration after POR */
vpcola 0:a1734fe1ec4b 138 SPIRIT_GPIO_DIG_OUT_POR_INV = 0x08, /*!< POR inverted (active low) */
vpcola 0:a1734fe1ec4b 139 SPIRIT_GPIO_DIG_OUT_WUT_EXP = 0x10, /*!< Wake-Up Timer expiration: "1" when WUT has expired */
vpcola 0:a1734fe1ec4b 140 SPIRIT_GPIO_DIG_OUT_LBD = 0x18, /*!< Low battery detection: "1" when battery is below threshold setting */
vpcola 0:a1734fe1ec4b 141 SPIRIT_GPIO_DIG_OUT_TX_DATA = 0x20, /*!< TX data internal clock output (TX data are sampled on the rising edge of it) */
vpcola 0:a1734fe1ec4b 142 SPIRIT_GPIO_DIG_OUT_TX_STATE = 0x28, /*!< TX state indication: "1" when Spirit1 is passing in the TX state */
vpcola 0:a1734fe1ec4b 143 SPIRIT_GPIO_DIG_OUT_TX_FIFO_ALMOST_EMPTY = 0x30, /*!< TX FIFO Almost Empty Flag */
vpcola 0:a1734fe1ec4b 144 SPIRIT_GPIO_DIG_OUT_TX_FIFO_ALMOST_FULL = 0x38, /*!< TX FIFO Almost Full Flag */
vpcola 0:a1734fe1ec4b 145 SPIRIT_GPIO_DIG_OUT_RX_DATA = 0x40, /*!< RX data output */
vpcola 0:a1734fe1ec4b 146 SPIRIT_GPIO_DIG_OUT_RX_CLOCK = 0x48, /*!< RX clock output (recovered from received data) */
vpcola 0:a1734fe1ec4b 147 SPIRIT_GPIO_DIG_OUT_RX_STATE = 0x50, /*!< RX state indication: "1" when Spirit1 is passing in the RX state */
vpcola 0:a1734fe1ec4b 148 SPIRIT_GPIO_DIG_OUT_RX_FIFO_ALMOST_FULL = 0x58, /*!< RX FIFO Almost Full Flag */
vpcola 0:a1734fe1ec4b 149 SPIRIT_GPIO_DIG_OUT_RX_FIFO_ALMOST_EMPTY = 0x60, /*!< RX FIFO Almost Empty Flag */
vpcola 0:a1734fe1ec4b 150 SPIRIT_GPIO_DIG_OUT_ANTENNA_SWITCH = 0x68, /*!< Antenna switch used for antenna diversity */
vpcola 0:a1734fe1ec4b 151 SPIRIT_GPIO_DIG_OUT_VALID_PREAMBLE = 0x70, /*!< Valid Preamble Detected Flag */
vpcola 0:a1734fe1ec4b 152 SPIRIT_GPIO_DIG_OUT_SYNC_DETECTED = 0x78, /*!< Sync WordSync Word Detected Flag */
vpcola 0:a1734fe1ec4b 153 SPIRIT_GPIO_DIG_OUT_RSSI_THRESHOLD = 0x80, /*!< RSSI above threshold */
vpcola 0:a1734fe1ec4b 154 SPIRIT_GPIO_DIG_OUT_MCU_CLOCK = 0x88, /*!< MCU Clock */
vpcola 0:a1734fe1ec4b 155 SPIRIT_GPIO_DIG_OUT_TX_RX_MODE = 0x90, /*!< TX or RX mode indicator (to enable an external range extender) */
vpcola 0:a1734fe1ec4b 156 SPIRIT_GPIO_DIG_OUT_VDD = 0x98, /*!< VDD (to emulate an additional GPIO of the MCU, programmable by SPI) */
vpcola 0:a1734fe1ec4b 157 SPIRIT_GPIO_DIG_OUT_GND = 0xA0, /*!< GND (to emulate an additional GPIO of the MCU, programmable by SPI) */
vpcola 0:a1734fe1ec4b 158 SPIRIT_GPIO_DIG_OUT_SMPS_EXT = 0xA8, /*!< External SMPS enable signal (active high) */
vpcola 0:a1734fe1ec4b 159 SPIRIT_GPIO_DIG_OUT_SLEEP_OR_STANDBY = 0xB0,
vpcola 0:a1734fe1ec4b 160 SPIRIT_GPIO_DIG_OUT_READY = 0xB8,
vpcola 0:a1734fe1ec4b 161 SPIRIT_GPIO_DIG_OUT_LOCK = 0xC0,
vpcola 0:a1734fe1ec4b 162 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_LOCK_SIG = 0xC8,
vpcola 0:a1734fe1ec4b 163 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_TIMER_FOR_LOCK = 0xD0,
vpcola 0:a1734fe1ec4b 164 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_READY2_SIG = 0xD8,
vpcola 0:a1734fe1ec4b 165 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_TIMER_FOR_PM_SET = 0xE0,
vpcola 0:a1734fe1ec4b 166 SPIRIT_GPIO_DIG_OUT_WAIT_VCO_CALIBRATION = 0xE8,
vpcola 0:a1734fe1ec4b 167 SPIRIT_GPIO_DIG_OUT_ENABLE_SYNTH_FULL_CIRCUIT = 0xF0,
vpcola 0:a1734fe1ec4b 168 SPIRIT_GPIO_DIG_OUT_WAIT_FOR_RCCAL_OK_SIG = 0xFF,
vpcola 0:a1734fe1ec4b 169
vpcola 0:a1734fe1ec4b 170 SPIRIT_GPIO_DIG_IN_TX_COMMAND = 0x00,
vpcola 0:a1734fe1ec4b 171 SPIRIT_GPIO_DIG_IN_RX_COMMAND = 0x08,
vpcola 0:a1734fe1ec4b 172 SPIRIT_GPIO_DIG_IN_TX_DATA_INPUT_FOR_DIRECTRF = 0x10,
vpcola 0:a1734fe1ec4b 173 SPIRIT_GPIO_DIG_IN_DATA_WAKEUP = 0x18,
vpcola 0:a1734fe1ec4b 174 SPIRIT_GPIO_DIG_IN_EXT_CLOCK_AT_34_7KHZ = 0x20
vpcola 0:a1734fe1ec4b 175
vpcola 0:a1734fe1ec4b 176 }SpiritGpioIO;
vpcola 0:a1734fe1ec4b 177
vpcola 0:a1734fe1ec4b 178 #define IS_SPIRIT_GPIO_IO(IO_SEL) ((IO_SEL == SPIRIT_GPIO_DIG_OUT_IRQ) || \
vpcola 0:a1734fe1ec4b 179 (IO_SEL == SPIRIT_GPIO_DIG_OUT_POR_INV) || \
vpcola 0:a1734fe1ec4b 180 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WUT_EXP) || \
vpcola 0:a1734fe1ec4b 181 (IO_SEL == SPIRIT_GPIO_DIG_OUT_LBD) || \
vpcola 0:a1734fe1ec4b 182 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_DATA) || \
vpcola 0:a1734fe1ec4b 183 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_STATE) || \
vpcola 0:a1734fe1ec4b 184 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_FIFO_ALMOST_EMPTY) || \
vpcola 0:a1734fe1ec4b 185 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_FIFO_ALMOST_FULL) || \
vpcola 0:a1734fe1ec4b 186 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_DATA) || \
vpcola 0:a1734fe1ec4b 187 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_CLOCK) || \
vpcola 0:a1734fe1ec4b 188 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_STATE) || \
vpcola 0:a1734fe1ec4b 189 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_FIFO_ALMOST_FULL) || \
vpcola 0:a1734fe1ec4b 190 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RX_FIFO_ALMOST_EMPTY) || \
vpcola 0:a1734fe1ec4b 191 (IO_SEL == SPIRIT_GPIO_DIG_OUT_ANTENNA_SWITCH) || \
vpcola 0:a1734fe1ec4b 192 (IO_SEL == SPIRIT_GPIO_DIG_OUT_VALID_PREAMBLE) || \
vpcola 0:a1734fe1ec4b 193 (IO_SEL == SPIRIT_GPIO_DIG_OUT_SYNC_DETECTED) || \
vpcola 0:a1734fe1ec4b 194 (IO_SEL == SPIRIT_GPIO_DIG_OUT_RSSI_THRESHOLD) || \
vpcola 0:a1734fe1ec4b 195 (IO_SEL == SPIRIT_GPIO_DIG_OUT_MCU_CLOCK) || \
vpcola 0:a1734fe1ec4b 196 (IO_SEL == SPIRIT_GPIO_DIG_OUT_TX_RX_MODE) || \
vpcola 0:a1734fe1ec4b 197 (IO_SEL == SPIRIT_GPIO_DIG_OUT_VDD) || \
vpcola 0:a1734fe1ec4b 198 (IO_SEL == SPIRIT_GPIO_DIG_OUT_GND) || \
vpcola 0:a1734fe1ec4b 199 (IO_SEL == SPIRIT_GPIO_DIG_OUT_SMPS_EXT) ||\
vpcola 0:a1734fe1ec4b 200 (IO_SEL == SPIRIT_GPIO_DIG_OUT_SLEEP_OR_STANDBY) ||\
vpcola 0:a1734fe1ec4b 201 (IO_SEL == SPIRIT_GPIO_DIG_OUT_READY) ||\
vpcola 0:a1734fe1ec4b 202 (IO_SEL == SPIRIT_GPIO_DIG_OUT_LOCK) ||\
vpcola 0:a1734fe1ec4b 203 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_LOCK_SIG) ||\
vpcola 0:a1734fe1ec4b 204 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_TIMER_FOR_LOCK) ||\
vpcola 0:a1734fe1ec4b 205 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_READY2_SIG) ||\
vpcola 0:a1734fe1ec4b 206 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_TIMER_FOR_PM_SET) ||\
vpcola 0:a1734fe1ec4b 207 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_VCO_CALIBRATION) ||\
vpcola 0:a1734fe1ec4b 208 (IO_SEL == SPIRIT_GPIO_DIG_OUT_ENABLE_SYNTH_FULL_CIRCUIT) ||\
vpcola 0:a1734fe1ec4b 209 (IO_SEL == SPIRIT_GPIO_DIG_OUT_WAIT_FOR_RCCAL_OK_SIG) ||\
vpcola 0:a1734fe1ec4b 210 (IO_SEL == SPIRIT_GPIO_DIG_IN_TX_COMMAND) ||\
vpcola 0:a1734fe1ec4b 211 (IO_SEL == SPIRIT_GPIO_DIG_IN_RX_COMMAND) ||\
vpcola 0:a1734fe1ec4b 212 (IO_SEL == SPIRIT_GPIO_DIG_IN_TX_DATA_INPUT_FOR_DIRECTRF) ||\
vpcola 0:a1734fe1ec4b 213 (IO_SEL == SPIRIT_GPIO_DIG_IN_DATA_WAKEUP) ||\
vpcola 0:a1734fe1ec4b 214 (IO_SEL == SPIRIT_GPIO_DIG_IN_EXT_CLOCK_AT_34_7KHZ))
vpcola 0:a1734fe1ec4b 215
vpcola 0:a1734fe1ec4b 216 /**
vpcola 0:a1734fe1ec4b 217 * @brief SPIRIT OutputLevel enumeration.
vpcola 0:a1734fe1ec4b 218 */
vpcola 0:a1734fe1ec4b 219
vpcola 0:a1734fe1ec4b 220 typedef enum
vpcola 0:a1734fe1ec4b 221 {
vpcola 0:a1734fe1ec4b 222 LOW = 0,
vpcola 0:a1734fe1ec4b 223 HIGH = !LOW
vpcola 0:a1734fe1ec4b 224 }OutputLevel;
vpcola 0:a1734fe1ec4b 225
vpcola 0:a1734fe1ec4b 226 #define IS_SPIRIT_GPIO_LEVEL(LEVEL) ((LEVEL == LOW) || \
vpcola 0:a1734fe1ec4b 227 (LEVEL == HIGH))
vpcola 0:a1734fe1ec4b 228
vpcola 0:a1734fe1ec4b 229
vpcola 0:a1734fe1ec4b 230 /**
vpcola 0:a1734fe1ec4b 231 * @brief SPIRIT GPIO Init structure definition.
vpcola 0:a1734fe1ec4b 232 */
vpcola 0:a1734fe1ec4b 233 typedef struct
vpcola 0:a1734fe1ec4b 234 {
vpcola 0:a1734fe1ec4b 235 SpiritGpioPin xSpiritGpioPin; /*!< Specifies the GPIO pins to be configured.
vpcola 0:a1734fe1ec4b 236 This parameter can be any value of @ref SpiritGpioPin */
vpcola 0:a1734fe1ec4b 237
vpcola 0:a1734fe1ec4b 238 SpiritGpioMode xSpiritGpioMode; /*!< Specifies the operating mode for the selected pins.
vpcola 0:a1734fe1ec4b 239 This parameter can be a value of @ref SpiritGpioMode */
vpcola 0:a1734fe1ec4b 240
vpcola 0:a1734fe1ec4b 241 SpiritGpioIO xSpiritGpioIO; /*!< Specifies the I/O selection for the selected pins.
vpcola 0:a1734fe1ec4b 242 This parameter can be a value of @ref SpiritGpioIO */
vpcola 0:a1734fe1ec4b 243
vpcola 0:a1734fe1ec4b 244 }SGpioInit;
vpcola 0:a1734fe1ec4b 245
vpcola 0:a1734fe1ec4b 246
vpcola 0:a1734fe1ec4b 247
vpcola 0:a1734fe1ec4b 248 /**
vpcola 0:a1734fe1ec4b 249 * @brief SPIRIT clock output XO prescaler enumeration.
vpcola 0:a1734fe1ec4b 250 */
vpcola 0:a1734fe1ec4b 251
vpcola 0:a1734fe1ec4b 252 typedef enum
vpcola 0:a1734fe1ec4b 253 {
vpcola 0:a1734fe1ec4b 254 XO_RATIO_1 = 0x00, /*!< XO Clock signal available on the GPIO divided by 1 */
vpcola 0:a1734fe1ec4b 255 XO_RATIO_2_3 = 0x02, /*!< XO Clock signal available on the GPIO divided by 2/3 */
vpcola 0:a1734fe1ec4b 256 XO_RATIO_1_2 = 0x04, /*!< XO Clock signal available on the GPIO divided by 1/2 */
vpcola 0:a1734fe1ec4b 257 XO_RATIO_1_3 = 0x06, /*!< XO Clock signal available on the GPIO divided by 1/3 */
vpcola 0:a1734fe1ec4b 258 XO_RATIO_1_4 = 0x08, /*!< XO Clock signal available on the GPIO divided by 1/4 */
vpcola 0:a1734fe1ec4b 259 XO_RATIO_1_6 = 0x0A, /*!< XO Clock signal available on the GPIO divided by 1/6 */
vpcola 0:a1734fe1ec4b 260 XO_RATIO_1_8 = 0x0C, /*!< XO Clock signal available on the GPIO divided by 1/8 */
vpcola 0:a1734fe1ec4b 261 XO_RATIO_1_12 = 0x0E, /*!< XO Clock signal available on the GPIO divided by 1/12 */
vpcola 0:a1734fe1ec4b 262 XO_RATIO_1_16 = 0x10, /*!< XO Clock signal available on the GPIO divided by 1/16 */
vpcola 0:a1734fe1ec4b 263 XO_RATIO_1_24 = 0x12, /*!< XO Clock signal available on the GPIO divided by 1/24 */
vpcola 0:a1734fe1ec4b 264 XO_RATIO_1_36 = 0x14, /*!< XO Clock signal available on the GPIO divided by 1/36 */
vpcola 0:a1734fe1ec4b 265 XO_RATIO_1_48 = 0x16, /*!< XO Clock signal available on the GPIO divided by 1/48 */
vpcola 0:a1734fe1ec4b 266 XO_RATIO_1_64 = 0x18, /*!< XO Clock signal available on the GPIO divided by 1/64 */
vpcola 0:a1734fe1ec4b 267 XO_RATIO_1_96 = 0x1A, /*!< XO Clock signal available on the GPIO divided by 1/96 */
vpcola 0:a1734fe1ec4b 268 XO_RATIO_1_128 = 0x1C, /*!< XO Clock signal available on the GPIO divided by 1/128 */
vpcola 0:a1734fe1ec4b 269 XO_RATIO_1_192 = 0x1E /*!< XO Clock signal available on the GPIO divided by 1/196 */
vpcola 0:a1734fe1ec4b 270 }ClockOutputXOPrescaler;
vpcola 0:a1734fe1ec4b 271
vpcola 0:a1734fe1ec4b 272 #define IS_SPIRIT_CLOCK_OUTPUT_XO(RATIO) ((RATIO == XO_RATIO_1) || \
vpcola 0:a1734fe1ec4b 273 (RATIO == XO_RATIO_2_3) || \
vpcola 0:a1734fe1ec4b 274 (RATIO == XO_RATIO_1_2) || \
vpcola 0:a1734fe1ec4b 275 (RATIO == XO_RATIO_1_3) || \
vpcola 0:a1734fe1ec4b 276 (RATIO == XO_RATIO_1_4) || \
vpcola 0:a1734fe1ec4b 277 (RATIO == XO_RATIO_1_6) || \
vpcola 0:a1734fe1ec4b 278 (RATIO == XO_RATIO_1_8) || \
vpcola 0:a1734fe1ec4b 279 (RATIO == XO_RATIO_1_12) || \
vpcola 0:a1734fe1ec4b 280 (RATIO == XO_RATIO_1_16) || \
vpcola 0:a1734fe1ec4b 281 (RATIO == XO_RATIO_1_24) || \
vpcola 0:a1734fe1ec4b 282 (RATIO == XO_RATIO_1_36) || \
vpcola 0:a1734fe1ec4b 283 (RATIO == XO_RATIO_1_48) || \
vpcola 0:a1734fe1ec4b 284 (RATIO == XO_RATIO_1_64) || \
vpcola 0:a1734fe1ec4b 285 (RATIO == XO_RATIO_1_96) || \
vpcola 0:a1734fe1ec4b 286 (RATIO == XO_RATIO_1_128) || \
vpcola 0:a1734fe1ec4b 287 (RATIO == XO_RATIO_1_192))
vpcola 0:a1734fe1ec4b 288
vpcola 0:a1734fe1ec4b 289 /**
vpcola 0:a1734fe1ec4b 290 * @brief SPIRIT Clock Output RCO prescaler enumeration.
vpcola 0:a1734fe1ec4b 291 */
vpcola 0:a1734fe1ec4b 292
vpcola 0:a1734fe1ec4b 293 typedef enum
vpcola 0:a1734fe1ec4b 294 {
vpcola 0:a1734fe1ec4b 295 RCO_RATIO_1 = 0x00, /*!< RCO Clock signal available on the GPIO divided by 1 */
vpcola 0:a1734fe1ec4b 296 RCO_RATIO_1_128 = 0x01 /*!< RCO Clock signal available on the GPIO divided by 1/128 */
vpcola 0:a1734fe1ec4b 297 }ClockOutputRCOPrescaler;
vpcola 0:a1734fe1ec4b 298
vpcola 0:a1734fe1ec4b 299 #define IS_SPIRIT_CLOCK_OUTPUT_RCO(RATIO) ((RATIO == RCO_RATIO_1) || \
vpcola 0:a1734fe1ec4b 300 (RATIO == RCO_RATIO_1_128))
vpcola 0:a1734fe1ec4b 301
vpcola 0:a1734fe1ec4b 302 /**
vpcola 0:a1734fe1ec4b 303 * @brief SPIRIT ExtraClockCycles enumeration.
vpcola 0:a1734fe1ec4b 304 */
vpcola 0:a1734fe1ec4b 305
vpcola 0:a1734fe1ec4b 306 typedef enum
vpcola 0:a1734fe1ec4b 307 {
vpcola 0:a1734fe1ec4b 308 EXTRA_CLOCK_CYCLES_0 = 0x00, /*!< 0 extra clock cycles provided to the MCU before switching to STANDBY state */
vpcola 0:a1734fe1ec4b 309 EXTRA_CLOCK_CYCLES_64 = 0x20, /*!< 64 extra clock cycles provided to the MCU before switching to STANDBY state */
vpcola 0:a1734fe1ec4b 310 EXTRA_CLOCK_CYCLES_256 = 0x40, /*!< 256 extra clock cycles provided to the MCU before switching to STANDBY state */
vpcola 0:a1734fe1ec4b 311 EXTRA_CLOCK_CYCLES_512 = 0x60 /*!< 512 extra clock cycles provided to the MCU before switching to STANDBY state */
vpcola 0:a1734fe1ec4b 312 }ExtraClockCycles;
vpcola 0:a1734fe1ec4b 313
vpcola 0:a1734fe1ec4b 314 #define IS_SPIRIT_CLOCK_OUTPUT_EXTRA_CYCLES(CYCLES) ((CYCLES == EXTRA_CLOCK_CYCLES_0) || \
vpcola 0:a1734fe1ec4b 315 (CYCLES == EXTRA_CLOCK_CYCLES_64) || \
vpcola 0:a1734fe1ec4b 316 (CYCLES == EXTRA_CLOCK_CYCLES_256) || \
vpcola 0:a1734fe1ec4b 317 (CYCLES == EXTRA_CLOCK_CYCLES_512))
vpcola 0:a1734fe1ec4b 318
vpcola 0:a1734fe1ec4b 319
vpcola 0:a1734fe1ec4b 320 /**
vpcola 0:a1734fe1ec4b 321 * @brief SPIRIT Clock Output initialization structure definition.
vpcola 0:a1734fe1ec4b 322 */
vpcola 0:a1734fe1ec4b 323 typedef struct
vpcola 0:a1734fe1ec4b 324 {
vpcola 0:a1734fe1ec4b 325 ClockOutputXOPrescaler xClockOutputXOPrescaler; /*!< Specifies the XO Ratio as clock output.
vpcola 0:a1734fe1ec4b 326 This parameter can be any value of @ref ClockOutputXOPrescaler */
vpcola 0:a1734fe1ec4b 327
vpcola 0:a1734fe1ec4b 328 ClockOutputRCOPrescaler xClockOutputRCOPrescaler; /*!< Specifies the RCO Ratio as clock output.
vpcola 0:a1734fe1ec4b 329 This parameter can be a value of @ref ClockOutputRCOPrescaler */
vpcola 0:a1734fe1ec4b 330
vpcola 0:a1734fe1ec4b 331 ExtraClockCycles xExtraClockCycles; /*!< Specifies the Extra Clock Cycles provided before entering in Standby State.
vpcola 0:a1734fe1ec4b 332 This parameter can be a value of @ref ExtraClockCycles */
vpcola 0:a1734fe1ec4b 333
vpcola 0:a1734fe1ec4b 334 }ClockOutputInit;
vpcola 0:a1734fe1ec4b 335
vpcola 0:a1734fe1ec4b 336
vpcola 0:a1734fe1ec4b 337
vpcola 0:a1734fe1ec4b 338 /**
vpcola 0:a1734fe1ec4b 339 * @}
vpcola 0:a1734fe1ec4b 340 */
vpcola 0:a1734fe1ec4b 341
vpcola 0:a1734fe1ec4b 342
vpcola 0:a1734fe1ec4b 343
vpcola 0:a1734fe1ec4b 344 /** @defgroup Gpio_Exported_Constants GPIO Exported Constants
vpcola 0:a1734fe1ec4b 345 * @{
vpcola 0:a1734fe1ec4b 346 */
vpcola 0:a1734fe1ec4b 347
vpcola 0:a1734fe1ec4b 348
vpcola 0:a1734fe1ec4b 349 /**
vpcola 0:a1734fe1ec4b 350 * @}
vpcola 0:a1734fe1ec4b 351 */
vpcola 0:a1734fe1ec4b 352
vpcola 0:a1734fe1ec4b 353
vpcola 0:a1734fe1ec4b 354
vpcola 0:a1734fe1ec4b 355 /** @defgroup Gpio_Exported_Macros GPIO Exported Macros
vpcola 0:a1734fe1ec4b 356 * @{
vpcola 0:a1734fe1ec4b 357 */
vpcola 0:a1734fe1ec4b 358
vpcola 0:a1734fe1ec4b 359
vpcola 0:a1734fe1ec4b 360 /**
vpcola 0:a1734fe1ec4b 361 * @}
vpcola 0:a1734fe1ec4b 362 */
vpcola 0:a1734fe1ec4b 363
vpcola 0:a1734fe1ec4b 364
vpcola 0:a1734fe1ec4b 365
vpcola 0:a1734fe1ec4b 366 /** @defgroup Gpio_Exported_Functions GPIO Exported Functions
vpcola 0:a1734fe1ec4b 367 * @{
vpcola 0:a1734fe1ec4b 368 */
vpcola 0:a1734fe1ec4b 369
vpcola 0:a1734fe1ec4b 370 void SpiritGpioInit(SGpioInit* pxGpioInitStruct);
vpcola 0:a1734fe1ec4b 371 void SpiritGpioTemperatureSensor(SpiritFunctionalState xNewState);
vpcola 0:a1734fe1ec4b 372 void SpiritGpioSetLevel(SpiritGpioPin xGpioX, OutputLevel xLevel);
vpcola 0:a1734fe1ec4b 373 OutputLevel SpiritGpioGetLevel(SpiritGpioPin xGpioX);
vpcola 0:a1734fe1ec4b 374 void SpiritGpioClockOutput(SpiritFunctionalState xNewState);
vpcola 0:a1734fe1ec4b 375 void SpiritGpioClockOutputInit(ClockOutputInit* pxClockOutputInitStruct);
vpcola 0:a1734fe1ec4b 376 void SpiritGpioSetXOPrescaler(ClockOutputXOPrescaler xXOPrescaler);
vpcola 0:a1734fe1ec4b 377 ClockOutputXOPrescaler SpiritGpioGetXOPrescaler(void);
vpcola 0:a1734fe1ec4b 378 void SpiritGpioSetRCOPrescaler(ClockOutputRCOPrescaler xRCOPrescaler);
vpcola 0:a1734fe1ec4b 379 ClockOutputRCOPrescaler SpiritGpioGetRCOPrescaler(void);
vpcola 0:a1734fe1ec4b 380 void SpiritGpioSetExtraClockCycles(ExtraClockCycles xExtraCycles);
vpcola 0:a1734fe1ec4b 381 ExtraClockCycles SpiritGpioGetExtraClockCycles(void);
vpcola 0:a1734fe1ec4b 382
vpcola 0:a1734fe1ec4b 383
vpcola 0:a1734fe1ec4b 384 /**
vpcola 0:a1734fe1ec4b 385 * @}
vpcola 0:a1734fe1ec4b 386 */
vpcola 0:a1734fe1ec4b 387
vpcola 0:a1734fe1ec4b 388 /**
vpcola 0:a1734fe1ec4b 389 * @}
vpcola 0:a1734fe1ec4b 390 */
vpcola 0:a1734fe1ec4b 391
vpcola 0:a1734fe1ec4b 392
vpcola 0:a1734fe1ec4b 393 /**
vpcola 0:a1734fe1ec4b 394 * @}
vpcola 0:a1734fe1ec4b 395 */
vpcola 0:a1734fe1ec4b 396
vpcola 0:a1734fe1ec4b 397
vpcola 0:a1734fe1ec4b 398
vpcola 0:a1734fe1ec4b 399 #ifdef __cplusplus
vpcola 0:a1734fe1ec4b 400 }
vpcola 0:a1734fe1ec4b 401 #endif
vpcola 0:a1734fe1ec4b 402
vpcola 0:a1734fe1ec4b 403 #endif
vpcola 0:a1734fe1ec4b 404
vpcola 0:a1734fe1ec4b 405 /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/