Vipin Ranka
This is the final version of Mini Gateway for Automation and Security desgined for Renesas GR Peach Design Contest
Dependencies: GR-PEACH_video GraphicsFramework HTTPServer R_BSP mbed-rpc mbed-rtos Socket lwip-eth lwip-sys lwip FATFileSystem
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camera.h
00001 00002 00003 #define VIDEO_CVBS (0) /* Analog Video Signal */ 00004 #define VIDEO_CMOS_CAMERA (1) /* Digital Video Signal */ 00005 #define VIDEO_YCBCR422 (0) 00006 #define VIDEO_RGB888 (1) 00007 #define VIDEO_RGB565 (2) 00008 00009 /**** User Selection *********/ 00010 #define VIDEO_INPUT_METHOD (VIDEO_CVBS) /* Select VIDEO_CVBS or VIDEO_CMOS_CAMERA */ 00011 #define VIDEO_INPUT_FORMAT (VIDEO_YCBCR422) /* Select VIDEO_YCBCR422 or VIDEO_RGB888 or VIDEO_RGB565 */ 00012 #define USE_VIDEO_CH (0) /* Select 0 or 1 If selecting VIDEO_CMOS_CAMERA, should be 0.) */ 00013 #define VIDEO_PAL (1) /* Select 0(NTSC) or 1(PAL) If selecting VIDEO_CVBS, this parameter is not referenced.) */ 00014 /*****************************/ 00015 00016 #if USE_VIDEO_CH == (0) 00017 #define VIDEO_INPUT_CH (DisplayBase::VIDEO_INPUT_CHANNEL_0) 00018 #define VIDEO_INT_TYPE (DisplayBase::INT_TYPE_S0_VFIELD) 00019 #else 00020 #define VIDEO_INPUT_CH (DisplayBase::VIDEO_INPUT_CHANNEL_1) 00021 #define VIDEO_INT_TYPE (DisplayBase::INT_TYPE_S1_VFIELD) 00022 #endif 00023 00024 #if ( VIDEO_INPUT_FORMAT == VIDEO_YCBCR422 || VIDEO_INPUT_FORMAT == VIDEO_RGB565 ) 00025 #define DATA_SIZE_PER_PIC (2u) 00026 #else 00027 #define DATA_SIZE_PER_PIC (4u) 00028 #endif 00029 00030 /*! Frame buffer stride: Frame buffer stride should be set to a multiple of 32 or 128 00031 in accordance with the frame buffer burst transfer mode. */ 00032 #define PIXEL_HW (320u) /* QVGA */ 00033 #define PIXEL_VW (480u) /* QVGA */ 00034 #define VIDEO_BUFFER_STRIDE (((PIXEL_HW * DATA_SIZE_PER_PIC) + 31u) & ~31u) 00035 #define VIDEO_BUFFER_HEIGHT (PIXEL_VW) 00036 00037 00038 DigitalOut led1(LED1); 00039 DigitalOut led2(LED2); 00040 00041 00042 #if defined(__ICCARM__) 00043 #pragma data_alignment=16 00044 static uint8_t FrameBuffer_Video_A[VIDEO_BUFFER_STRIDE * VIDEO_BUFFER_HEIGHT]@ ".mirrorram"; //16 bytes aligned!; 00045 static uint8_t FrameBuffer_Video_B[VIDEO_BUFFER_STRIDE * VIDEO_BUFFER_HEIGHT]@ ".mirrorram"; //16 bytes aligned!; 00046 #pragma data_alignment=4 00047 #else 00048 static uint8_t FrameBuffer_Video_A[VIDEO_BUFFER_STRIDE * VIDEO_BUFFER_HEIGHT]__attribute((section("NC_BSS"),aligned(16))); //16 bytes aligned!; 00049 static uint8_t FrameBuffer_Video_B[VIDEO_BUFFER_STRIDE * VIDEO_BUFFER_HEIGHT]__attribute((section("NC_BSS"),aligned(16))); //16 bytes aligned!; 00050 #endif 00051 static volatile int32_t vsync_count; 00052 static volatile int32_t vfield_count; 00053 00054 /**************************************************************************//** 00055 * @brief Interrupt callback function 00056 * @param[in] int_type : VDC5 interrupt type 00057 * @retval None 00058 ******************************************************************************/ 00059 static void IntCallbackFunc_Vfield(DisplayBase::int_type_t int_type) 00060 { 00061 if (vfield_count > 0) { 00062 vfield_count--; 00063 } 00064 } 00065 00066 /**************************************************************************//** 00067 * @brief Wait for the specified number of times Vsync occurs 00068 * @param[in] wait_count : Wait count 00069 * @retval None 00070 ******************************************************************************/ 00071 static void WaitVfield(const int32_t wait_count) 00072 { 00073 vfield_count = wait_count; 00074 while (vfield_count > 0) { 00075 /* Do nothing */ 00076 } 00077 } 00078 00079 /**************************************************************************//** 00080 * @brief Interrupt callback function for Vsync interruption 00081 * @param[in] int_type : VDC5 interrupt type 00082 * @retval None 00083 ******************************************************************************/ 00084 static void IntCallbackFunc_Vsync(DisplayBase::int_type_t int_type) 00085 { 00086 if (vsync_count > 0) { 00087 vsync_count--; 00088 } 00089 } 00090 00091 /**************************************************************************//** 00092 * @brief Wait for the specified number of times Vsync occurs 00093 * @param[in] wait_count : Wait count 00094 * @retval None 00095 ******************************************************************************/ 00096 static void WaitVsync(const int32_t wait_count) 00097 { 00098 vsync_count = wait_count; 00099 while (vsync_count > 0) { 00100 /* Do nothing */ 00101 } 00102 } 00103 00104 uint8_t * write_buff_addr = FrameBuffer_Video_A; 00105 uint8_t * save_buff_addr = FrameBuffer_Video_B; 00106 00107 DisplayBase Display; 00108 00109 void init_camera() 00110 { 00111 //Camera-in Code 00112 00113 00114 DisplayBase::graphics_error_t error; 00115 00116 #if VIDEO_INPUT_METHOD == VIDEO_CMOS_CAMERA 00117 DisplayBase::video_ext_in_config_t ext_in_config; 00118 PinName cmos_camera_pin[11] = { 00119 /* data pin */ 00120 P2_7, P2_6, P2_5, P2_4, P2_3, P2_2, P2_1, P2_0, 00121 /* control pin */ 00122 P10_0, /* DV0_CLK */ 00123 P1_0, /* DV0_Vsync */ 00124 P1_1 /* DV0_Hsync */ 00125 }; 00126 #endif 00127 00128 /* Create DisplayBase object */ 00129 00130 /* Graphics initialization process */ 00131 error = Display.Graphics_init(NULL); 00132 if (error != DisplayBase::GRAPHICS_OK) { 00133 printf("Line %d, error %d\n", __LINE__, error); 00134 while (1); 00135 } 00136 00137 #if VIDEO_INPUT_METHOD == VIDEO_CVBS 00138 error = Display.Graphics_Video_init( DisplayBase::INPUT_SEL_VDEC, NULL); 00139 if( error != DisplayBase::GRAPHICS_OK ) { 00140 printf("Line %d, error %d\n", __LINE__, error); 00141 while(1); 00142 } 00143 00144 #elif VIDEO_INPUT_METHOD == VIDEO_CMOS_CAMERA 00145 /* MT9V111 camera input config */ 00146 ext_in_config.inp_format = DisplayBase::VIDEO_EXTIN_FORMAT_BT601; /* BT601 8bit YCbCr format */ 00147 ext_in_config.inp_pxd_edge = DisplayBase::EDGE_RISING; /* Clock edge select for capturing data */ 00148 ext_in_config.inp_vs_edge = DisplayBase::EDGE_RISING; /* Clock edge select for capturing Vsync signals */ 00149 ext_in_config.inp_hs_edge = DisplayBase::EDGE_RISING; /* Clock edge select for capturing Hsync signals */ 00150 ext_in_config.inp_endian_on = DisplayBase::OFF; /* External input bit endian change on/off */ 00151 ext_in_config.inp_swap_on = DisplayBase::OFF; /* External input B/R signal swap on/off */ 00152 ext_in_config.inp_vs_inv = DisplayBase::SIG_POL_NOT_INVERTED; /* External input DV_VSYNC inversion control */ 00153 ext_in_config.inp_hs_inv = DisplayBase::SIG_POL_INVERTED; /* External input DV_HSYNC inversion control */ 00154 ext_in_config.inp_f525_625 = DisplayBase::EXTIN_LINE_525; /* Number of lines for BT.656 external input */ 00155 ext_in_config.inp_h_pos = DisplayBase::EXTIN_H_POS_CRYCBY; /* Y/Cb/Y/Cr data string start timing to Hsync reference */ 00156 ext_in_config.cap_vs_pos = 6; /* Capture start position from Vsync */ 00157 ext_in_config.cap_hs_pos = 150; /* Capture start position form Hsync */ 00158 ext_in_config.cap_width = 640; /* Capture width */ 00159 ext_in_config.cap_height = 468u; /* Capture height Max 468[line] 00160 Due to CMOS(MT9V111) output signal timing and VDC5 specification */ 00161 error = Display.Graphics_Video_init( DisplayBase::INPUT_SEL_EXT, &ext_in_config); 00162 if( error != DisplayBase::GRAPHICS_OK ) { 00163 uart.printf("Line %d, error %d\n", __LINE__, error); 00164 while(1); 00165 } 00166 00167 /* MT9V111 camera input port setting */ 00168 error = Display.Graphics_Dvinput_Port_Init(cmos_camera_pin, 11); 00169 if( error != DisplayBase::GRAPHICS_OK ) { 00170 uart.printf("Line %d, error %d\n", __LINE__, error); 00171 while (1); 00172 } 00173 #endif 00174 00175 /* Interrupt callback function setting (Vsync signal input to scaler 0) */ 00176 error = Display.Graphics_Irq_Handler_Set(DisplayBase::INT_TYPE_S0_VI_VSYNC, 0, IntCallbackFunc_Vsync); 00177 if (error != DisplayBase::GRAPHICS_OK) { 00178 printf("Line %d, error %d\n", __LINE__, error); 00179 while (1); 00180 } 00181 /* Video capture setting (progressive form fixed) */ 00182 error = Display.Video_Write_Setting( 00183 VIDEO_INPUT_CH, 00184 #if VIDEO_PAL == 0 00185 DisplayBase::COL_SYS_NTSC_358, 00186 #else 00187 DisplayBase::COL_SYS_PAL_443, 00188 #endif 00189 write_buff_addr, 00190 VIDEO_BUFFER_STRIDE, 00191 #if VIDEO_INPUT_FORMAT == VIDEO_YCBCR422 00192 DisplayBase::VIDEO_FORMAT_YCBCR422, 00193 DisplayBase::WR_RD_WRSWA_NON, 00194 #elif VIDEO_INPUT_FORMAT == VIDEO_RGB565 00195 DisplayBase::VIDEO_FORMAT_RGB565, 00196 DisplayBase::WR_RD_WRSWA_32_16BIT, 00197 #else 00198 DisplayBase::VIDEO_FORMAT_RGB888, 00199 DisplayBase::WR_RD_WRSWA_32BIT, 00200 #endif 00201 PIXEL_VW, 00202 PIXEL_HW 00203 ); 00204 if (error != DisplayBase::GRAPHICS_OK) { 00205 printf("Line %d, error %d\n", __LINE__, error); 00206 while (1); 00207 } 00208 00209 /* Interrupt callback function setting (Field end signal for recording function in scaler 0) */ 00210 error = Display.Graphics_Irq_Handler_Set(VIDEO_INT_TYPE, 0, IntCallbackFunc_Vfield); 00211 if (error != DisplayBase::GRAPHICS_OK) { 00212 printf("Line %d, error %d\n", __LINE__, error); 00213 while (1); 00214 } 00215 00216 /* Video write process start */ 00217 error = Display.Video_Start (VIDEO_INPUT_CH); 00218 if (error != DisplayBase::GRAPHICS_OK) { 00219 printf("Line %d, error %d\n", __LINE__, error); 00220 while (1); 00221 } 00222 00223 /* Video write process stop */ 00224 error = Display.Video_Stop (VIDEO_INPUT_CH); 00225 if (error != DisplayBase::GRAPHICS_OK) { 00226 printf("Line %d, error %d\n", __LINE__, error); 00227 while (1); 00228 } 00229 00230 /* Video write process start */ 00231 error = Display.Video_Start (VIDEO_INPUT_CH); 00232 if (error != DisplayBase::GRAPHICS_OK) { 00233 printf("Line %d, error %d\n", __LINE__, error); 00234 while (1); 00235 } 00236 00237 /* Wait vsync to update resister */ 00238 WaitVsync(1); 00239 00240 /* Wait 2 Vfield(Top or bottom field) */ 00241 WaitVfield(2); 00242 00243 00244 } 00245
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