Norimasa Okamoto / uvchost

UVC host library

Dependents:   LifeCam WebcamServer

usb/UsbInc.h@3:3eb41d749f9a, 2012-08-15 (annotated)

Committer:
va009039
Date:
Wed Aug 15 13:52:53 2012 +0000
Revision:
3:3eb41d749f9a
Parent:
0:b0f04c137829 
add USB_USE_MALLOC

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 0:b0f04c137829 1
va009039 0:b0f04c137829 2 /*
va009039 0:b0f04c137829 3 Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
va009039 0:b0f04c137829 4
va009039 0:b0f04c137829 5 Permission is hereby granted, free of charge, to any person obtaining a copy
va009039 0:b0f04c137829 6 of this software and associated documentation files (the "Software"), to deal
va009039 0:b0f04c137829 7 in the Software without restriction, including without limitation the rights
va009039 0:b0f04c137829 8 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
va009039 0:b0f04c137829 9 copies of the Software, and to permit persons to whom the Software is
va009039 0:b0f04c137829 10 furnished to do so, subject to the following conditions:
va009039 0:b0f04c137829 11
va009039 0:b0f04c137829 12 The above copyright notice and this permission notice shall be included in
va009039 0:b0f04c137829 13 all copies or substantial portions of the Software.
va009039 0:b0f04c137829 14
va009039 0:b0f04c137829 15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
va009039 0:b0f04c137829 16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
va009039 0:b0f04c137829 17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
va009039 0:b0f04c137829 18 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
va009039 0:b0f04c137829 19 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
va009039 0:b0f04c137829 20 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
va009039 0:b0f04c137829 21 THE SOFTWARE.
va009039 0:b0f04c137829 22 */
va009039 0:b0f04c137829 23
va009039 0:b0f04c137829 24 #ifndef USB_INC_H
va009039 0:b0f04c137829 25 #define USB_INC_H
va009039 0:b0f04c137829 26
va009039 0:b0f04c137829 27 #include "mbed.h"
va009039 0:b0f04c137829 28
va009039 0:b0f04c137829 29 #define MIN(a,b) ((a)<(b)?(a):(b))
va009039 0:b0f04c137829 30 #define MAX(a,b) ((a)>(b)?(a):(b))
va009039 0:b0f04c137829 31
va009039 0:b0f04c137829 32 //typedef int32_t RC;
va009039 0:b0f04c137829 33
va009039 0:b0f04c137829 34 typedef uint8_t byte;
va009039 0:b0f04c137829 35 typedef uint16_t word;
va009039 0:b0f04c137829 36
va009039 0:b0f04c137829 37 enum UsbErr
va009039 0:b0f04c137829 38 {
va009039 0:b0f04c137829 39 __USBERR_MIN = -0xFFFF,
va009039 0:b0f04c137829 40 USBERR_DISCONNECTED,
va009039 0:b0f04c137829 41 USBERR_NOTFOUND,
va009039 0:b0f04c137829 42 USBERR_BADCONFIG,
va009039 0:b0f04c137829 43 USBERR_PROCESSING,
va009039 0:b0f04c137829 44 USBERR_HALTED, //Transfer on an ep is stalled
va009039 0:b0f04c137829 45 USBERR_BUSY,
va009039 0:b0f04c137829 46 USBERR_TDFAIL,
va009039 0:b0f04c137829 47 USBERR_ERROR,
va009039 0:b0f04c137829 48 USBERR_OK = 0
va009039 0:b0f04c137829 49 };
va009039 0:b0f04c137829 50
va009039 0:b0f04c137829 51
va009039 0:b0f04c137829 52 /* From NXP's USBHostLite stack's usbhost_lpc17xx.h */
va009039 0:b0f04c137829 53 /* Only the types names have been changed to avoid unecessary typedefs */
va009039 0:b0f04c137829 54
va009039 0:b0f04c137829 55
va009039 0:b0f04c137829 56 /*
va009039 0:b0f04c137829 57 **************************************************************************************************************
va009039 0:b0f04c137829 58 * NXP USB Host Stack
va009039 0:b0f04c137829 59 *
va009039 0:b0f04c137829 60 * (c) Copyright 2008, NXP SemiConductors
va009039 0:b0f04c137829 61 * (c) Copyright 2008, OnChip Technologies LLC
va009039 0:b0f04c137829 62 * All Rights Reserved
va009039 0:b0f04c137829 63 *
va009039 0:b0f04c137829 64 * www.nxp.com
va009039 0:b0f04c137829 65 * www.onchiptech.com
va009039 0:b0f04c137829 66 *
va009039 0:b0f04c137829 67 * File : usbhost_lpc17xx.h
va009039 0:b0f04c137829 68 * Programmer(s) : Ravikanth.P
va009039 0:b0f04c137829 69 * Version :
va009039 0:b0f04c137829 70 *
va009039 0:b0f04c137829 71 **************************************************************************************************************
va009039 0:b0f04c137829 72 */
va009039 0:b0f04c137829 73
va009039 0:b0f04c137829 74
va009039 0:b0f04c137829 75
va009039 0:b0f04c137829 76 /*
va009039 0:b0f04c137829 77 **************************************************************************************************************
va009039 0:b0f04c137829 78 * OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
va009039 0:b0f04c137829 79 **************************************************************************************************************
va009039 0:b0f04c137829 80 */
va009039 0:b0f04c137829 81
va009039 0:b0f04c137829 82 /* ------------------ HcControl Register --------------------- */
va009039 0:b0f04c137829 83 #define OR_CONTROL_PLE 0x00000004
va009039 0:b0f04c137829 84 #define OR_CONTROL_IE 0x00000008
va009039 0:b0f04c137829 85 #define OR_CONTROL_CLE 0x00000010
va009039 0:b0f04c137829 86 #define OR_CONTROL_BLE 0x00000020
va009039 0:b0f04c137829 87 #define OR_CONTROL_HCFS 0x000000C0
va009039 0:b0f04c137829 88 #define OR_CONTROL_HC_OPER 0x00000080
va009039 0:b0f04c137829 89 /* ----------------- HcCommandStatus Register ----------------- */
va009039 0:b0f04c137829 90 #define OR_CMD_STATUS_HCR 0x00000001
va009039 0:b0f04c137829 91 #define OR_CMD_STATUS_CLF 0x00000002
va009039 0:b0f04c137829 92 #define OR_CMD_STATUS_BLF 0x00000004
va009039 0:b0f04c137829 93 /* --------------- HcInterruptStatus Register ----------------- */
va009039 0:b0f04c137829 94 #define OR_INTR_STATUS_WDH 0x00000002
va009039 0:b0f04c137829 95 #define OR_INTR_STATUS_RHSC 0x00000040
va009039 0:b0f04c137829 96 #define OR_INTR_STATUS_UE 0x00000010
va009039 0:b0f04c137829 97 /* --------------- HcInterruptEnable Register ----------------- */
va009039 0:b0f04c137829 98 #define OR_INTR_ENABLE_WDH 0x00000002
va009039 0:b0f04c137829 99 #define OR_INTR_ENABLE_RHSC 0x00000040
va009039 0:b0f04c137829 100 #define OR_INTR_ENABLE_MIE 0x80000000
va009039 0:b0f04c137829 101 /* ---------------- HcRhDescriptorA Register ------------------ */
va009039 0:b0f04c137829 102 #define OR_RH_STATUS_LPSC 0x00010000
va009039 0:b0f04c137829 103 #define OR_RH_STATUS_DRWE 0x00008000
va009039 0:b0f04c137829 104 /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
va009039 0:b0f04c137829 105 #define OR_RH_PORT_CCS 0x00000001
va009039 0:b0f04c137829 106 #define OR_RH_PORT_PRS 0x00000010
va009039 0:b0f04c137829 107 #define OR_RH_PORT_CSC 0x00010000
va009039 0:b0f04c137829 108 #define OR_RH_PORT_PRSC 0x00100000
va009039 0:b0f04c137829 109
va009039 0:b0f04c137829 110
va009039 0:b0f04c137829 111 /*
va009039 0:b0f04c137829 112 **************************************************************************************************************
va009039 0:b0f04c137829 113 * FRAME INTERVAL
va009039 0:b0f04c137829 114 **************************************************************************************************************
va009039 0:b0f04c137829 115 */
va009039 0:b0f04c137829 116
va009039 0:b0f04c137829 117 #define FI 0x2EDF /* 12000 bits per frame (-1) */
va009039 0:b0f04c137829 118 #define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
va009039 0:b0f04c137829 119
va009039 0:b0f04c137829 120 /*
va009039 0:b0f04c137829 121 **************************************************************************************************************
va009039 0:b0f04c137829 122 * ENDPOINT DESCRIPTOR CONTROL FIELDS
va009039 0:b0f04c137829 123 **************************************************************************************************************
va009039 0:b0f04c137829 124 */
va009039 0:b0f04c137829 125
va009039 0:b0f04c137829 126 #define ED_SKIP (uint32_t) (0x00001000) /* Skip this ep in queue */
va009039 0:b0f04c137829 127
va009039 0:b0f04c137829 128 /*
va009039 0:b0f04c137829 129 **************************************************************************************************************
va009039 0:b0f04c137829 130 * TRANSFER DESCRIPTOR CONTROL FIELDS
va009039 0:b0f04c137829 131 **************************************************************************************************************
va009039 0:b0f04c137829 132 */
va009039 0:b0f04c137829 133
va009039 0:b0f04c137829 134 #define TD_ROUNDING (uint32_t) (0x00040000) /* Buffer Rounding */
va009039 0:b0f04c137829 135 #define TD_SETUP (uint32_t)(0) /* Direction of Setup Packet */
va009039 0:b0f04c137829 136 #define TD_IN (uint32_t)(0x00100000) /* Direction In */
va009039 0:b0f04c137829 137 #define TD_OUT (uint32_t)(0x00080000) /* Direction Out */
va009039 0:b0f04c137829 138 #define TD_DELAY_INT(x) (uint32_t)((x) << 21) /* Delay Interrupt */
va009039 0:b0f04c137829 139 #define TD_TOGGLE_0 (uint32_t)(0x02000000) /* Toggle 0 */
va009039 0:b0f04c137829 140 #define TD_TOGGLE_1 (uint32_t)(0x03000000) /* Toggle 1 */
va009039 0:b0f04c137829 141 #define TD_CC (uint32_t)(0xF0000000) /* Completion Code */
va009039 0:b0f04c137829 142
va009039 0:b0f04c137829 143 #define ITD_SF (uint32_t)(0x0000FFFF) /* Starting Frame */
va009039 0:b0f04c137829 144 #define ITD_FC (uint32_t)(0x07000000) /* FrameCount */
va009039 0:b0f04c137829 145
va009039 0:b0f04c137829 146 /*
va009039 0:b0f04c137829 147 **************************************************************************************************************
va009039 0:b0f04c137829 148 * USB STANDARD REQUEST DEFINITIONS
va009039 0:b0f04c137829 149 **************************************************************************************************************
va009039 0:b0f04c137829 150 */
va009039 0:b0f04c137829 151
va009039 0:b0f04c137829 152 #define USB_DESCRIPTOR_TYPE_DEVICE 1
va009039 0:b0f04c137829 153 #define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
va009039 0:b0f04c137829 154 #define USB_DESCRIPTOR_TYPE_STRING 3
va009039 0:b0f04c137829 155 #define USB_DESCRIPTOR_TYPE_INTERFACE 4
va009039 0:b0f04c137829 156 #define USB_DESCRIPTOR_TYPE_ENDPOINT 5
va009039 0:b0f04c137829 157 #define USB_DESCRIPTOR_TYPE_HUB 0x29
va009039 0:b0f04c137829 158 /* ----------- Control RequestType Fields ----------- */
va009039 0:b0f04c137829 159 #define USB_DEVICE_TO_HOST 0x80
va009039 0:b0f04c137829 160 #define USB_HOST_TO_DEVICE 0x00
va009039 0:b0f04c137829 161 #define USB_REQUEST_TYPE_CLASS 0x20
va009039 0:b0f04c137829 162 #define USB_RECIPIENT_DEVICE 0x00
va009039 0:b0f04c137829 163 #define USB_RECIPIENT_INTERFACE 0x01
va009039 0:b0f04c137829 164 #define USB_RECIPIENT_OTHER 0x03
va009039 0:b0f04c137829 165
va009039 0:b0f04c137829 166 /* -------------- USB Standard Requests -------------- */
va009039 0:b0f04c137829 167 #define GET_STATUS 0
va009039 0:b0f04c137829 168 #define CLEAR_FEATURE 1
va009039 0:b0f04c137829 169 #define SET_FEATURE 3
va009039 0:b0f04c137829 170 #define SET_ADDRESS 5
va009039 0:b0f04c137829 171 #define GET_DESCRIPTOR 6
va009039 0:b0f04c137829 172 #define SET_CONFIGURATION 9
va009039 0:b0f04c137829 173 #define SET_INTERFACE 11
va009039 0:b0f04c137829 174
va009039 0:b0f04c137829 175 /*
va009039 0:b0f04c137829 176 **************************************************************************************************************
va009039 0:b0f04c137829 177 * TYPE DEFINITIONS
va009039 0:b0f04c137829 178 **************************************************************************************************************
va009039 0:b0f04c137829 179 */
va009039 0:b0f04c137829 180
va009039 0:b0f04c137829 181 typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
va009039 0:b0f04c137829 182 volatile uint32_t Control; /* Endpoint descriptor control */
va009039 0:b0f04c137829 183 volatile uint32_t TailTd; /* Physical address of tail in Transfer descriptor list */
va009039 0:b0f04c137829 184 volatile uint32_t HeadTd; /* Physcial address of head in Transfer descriptor list */
va009039 0:b0f04c137829 185 volatile uint32_t Next; /* Physical address of next Endpoint descriptor */
va009039 0:b0f04c137829 186 } HCED;
va009039 0:b0f04c137829 187
va009039 0:b0f04c137829 188 typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
va009039 0:b0f04c137829 189 volatile uint32_t Control; /* Transfer descriptor control */
va009039 0:b0f04c137829 190 volatile uint32_t CurrBufPtr; /* Physical address of current buffer pointer */
va009039 0:b0f04c137829 191 volatile uint32_t Next; /* Physical pointer to next Transfer Descriptor */
va009039 0:b0f04c137829 192 volatile uint32_t BufEnd; /* Physical address of end of buffer */
va009039 0:b0f04c137829 193 } HCTD;
va009039 0:b0f04c137829 194
va009039 0:b0f04c137829 195 typedef struct hcItd { // HostController Isochronous Transfer Descriptor
va009039 0:b0f04c137829 196 volatile uint32_t Control; // Transfer descriptor control
va009039 0:b0f04c137829 197 volatile uint32_t BufferPage0; // Buffer Page 0
va009039 0:b0f04c137829 198 volatile uint32_t Next; // Physical pointer to next Transfer Descriptor
va009039 0:b0f04c137829 199 volatile uint32_t BufferEnd; // buffer End
va009039 0:b0f04c137829 200 volatile uint32_t OffsetPSW10; // Offset1/PSW1 Offset0/PSW0
va009039 0:b0f04c137829 201 volatile uint32_t OffsetPSW32; // Offset3/PSW3 Offset2/PSW2
va009039 0:b0f04c137829 202 volatile uint32_t OffsetPSW54; // Offset5/PSW5 Offset4/PSW4
va009039 0:b0f04c137829 203 volatile uint32_t OffsetPSW76; // Offset7/PSW7 Offset6/PSW6
va009039 0:b0f04c137829 204 } HCITD;
va009039 0:b0f04c137829 205
va009039 0:b0f04c137829 206 typedef struct hcUtd {
va009039 0:b0f04c137829 207 union {
va009039 0:b0f04c137829 208 HCTD hctd;
va009039 0:b0f04c137829 209 HCITD hcitd;
va009039 0:b0f04c137829 210 };
va009039 0:b0f04c137829 211 volatile uint32_t type; // 1:TD, 2:ITD
va009039 0:b0f04c137829 212 volatile uint32_t UsbEndpoint;
va009039 0:b0f04c137829 213 volatile uint32_t reserve1;
va009039 0:b0f04c137829 214 volatile uint32_t reserve2;
va009039 0:b0f04c137829 215 } HCUTD;
va009039 0:b0f04c137829 216
va009039 0:b0f04c137829 217 typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
va009039 0:b0f04c137829 218 volatile uint32_t IntTable[32]; /* Interrupt Table */
va009039 0:b0f04c137829 219 volatile uint32_t FrameNumber; /* Frame Number */
va009039 0:b0f04c137829 220 volatile uint32_t DoneHead; /* Done Head */
va009039 0:b0f04c137829 221 volatile uint8_t Reserved[116]; /* Reserved for future use */
va009039 0:b0f04c137829 222 volatile uint8_t Unknown[4]; /* Unused */
va009039 0:b0f04c137829 223 } HCCA;
va009039 0:b0f04c137829 224
va009039 0:b0f04c137829 225
va009039 0:b0f04c137829 226
va009039 0:b0f04c137829 227 #endif