GPS USB dongle host

Dependencies:   mbed

Committer:
va009039
Date:
Fri May 04 06:58:31 2012 +0000
Revision:
1:82eaa5761719
Parent:
0:1c6af92fdc79

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 0:1c6af92fdc79 1 /*
va009039 0:1c6af92fdc79 2 **************************************************************************************************************
va009039 0:1c6af92fdc79 3 * NXP USB Host Stack
va009039 0:1c6af92fdc79 4 *
va009039 0:1c6af92fdc79 5 * (c) Copyright 2008, NXP SemiConductors
va009039 0:1c6af92fdc79 6 * (c) Copyright 2008, OnChip Technologies LLC
va009039 0:1c6af92fdc79 7 * All Rights Reserved
va009039 0:1c6af92fdc79 8 *
va009039 0:1c6af92fdc79 9 * www.nxp.com
va009039 0:1c6af92fdc79 10 * www.onchiptech.com
va009039 0:1c6af92fdc79 11 *
va009039 0:1c6af92fdc79 12 * File : usbhost_lpc17xx.c
va009039 0:1c6af92fdc79 13 * Programmer(s) : Ravikanth.P
va009039 0:1c6af92fdc79 14 * Version :
va009039 0:1c6af92fdc79 15 *
va009039 0:1c6af92fdc79 16 **************************************************************************************************************
va009039 0:1c6af92fdc79 17 */
va009039 0:1c6af92fdc79 18
va009039 0:1c6af92fdc79 19 /*
va009039 0:1c6af92fdc79 20 **************************************************************************************************************
va009039 0:1c6af92fdc79 21 * INCLUDE HEADER FILES
va009039 0:1c6af92fdc79 22 **************************************************************************************************************
va009039 0:1c6af92fdc79 23 */
va009039 0:1c6af92fdc79 24
va009039 0:1c6af92fdc79 25 #include "usbhost_lpc17xx.h"
va009039 0:1c6af92fdc79 26
va009039 0:1c6af92fdc79 27 /*
va009039 0:1c6af92fdc79 28 **************************************************************************************************************
va009039 0:1c6af92fdc79 29 * GLOBAL VARIABLES
va009039 0:1c6af92fdc79 30 **************************************************************************************************************
va009039 0:1c6af92fdc79 31 */
va009039 0:1c6af92fdc79 32 int gUSBConnected;
va009039 0:1c6af92fdc79 33
va009039 0:1c6af92fdc79 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
va009039 0:1c6af92fdc79 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
va009039 0:1c6af92fdc79 36 volatile USB_INT08U HOST_TDControlStatus = 0;
va009039 0:1c6af92fdc79 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
va009039 0:1c6af92fdc79 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
va009039 0:1c6af92fdc79 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
va009039 0:1c6af92fdc79 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
va009039 0:1c6af92fdc79 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
va009039 0:1c6af92fdc79 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
va009039 0:1c6af92fdc79 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
va009039 0:1c6af92fdc79 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
va009039 0:1c6af92fdc79 45
va009039 0:1c6af92fdc79 46 // USB host structures
va009039 0:1c6af92fdc79 47 // AHB SRAM block 1
va009039 0:1c6af92fdc79 48 #define HOSTBASEADDR 0x2007C000
va009039 0:1c6af92fdc79 49 // reserve memory for the linker
va009039 0:1c6af92fdc79 50 static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
va009039 0:1c6af92fdc79 51 /*
va009039 0:1c6af92fdc79 52 **************************************************************************************************************
va009039 0:1c6af92fdc79 53 * DELAY IN MILLI SECONDS
va009039 0:1c6af92fdc79 54 *
va009039 0:1c6af92fdc79 55 * Description: This function provides a delay in milli seconds
va009039 0:1c6af92fdc79 56 *
va009039 0:1c6af92fdc79 57 * Arguments : delay The delay required
va009039 0:1c6af92fdc79 58 *
va009039 0:1c6af92fdc79 59 * Returns : None
va009039 0:1c6af92fdc79 60 *
va009039 0:1c6af92fdc79 61 **************************************************************************************************************
va009039 0:1c6af92fdc79 62 */
va009039 0:1c6af92fdc79 63
va009039 0:1c6af92fdc79 64 void Host_DelayMS (USB_INT32U delay)
va009039 0:1c6af92fdc79 65 {
va009039 0:1c6af92fdc79 66 volatile USB_INT32U i;
va009039 0:1c6af92fdc79 67
va009039 0:1c6af92fdc79 68
va009039 0:1c6af92fdc79 69 for (i = 0; i < delay; i++) {
va009039 0:1c6af92fdc79 70 Host_DelayUS(1000);
va009039 0:1c6af92fdc79 71 }
va009039 0:1c6af92fdc79 72 }
va009039 0:1c6af92fdc79 73
va009039 0:1c6af92fdc79 74 /*
va009039 0:1c6af92fdc79 75 **************************************************************************************************************
va009039 0:1c6af92fdc79 76 * DELAY IN MICRO SECONDS
va009039 0:1c6af92fdc79 77 *
va009039 0:1c6af92fdc79 78 * Description: This function provides a delay in micro seconds
va009039 0:1c6af92fdc79 79 *
va009039 0:1c6af92fdc79 80 * Arguments : delay The delay required
va009039 0:1c6af92fdc79 81 *
va009039 0:1c6af92fdc79 82 * Returns : None
va009039 0:1c6af92fdc79 83 *
va009039 0:1c6af92fdc79 84 **************************************************************************************************************
va009039 0:1c6af92fdc79 85 */
va009039 0:1c6af92fdc79 86
va009039 0:1c6af92fdc79 87 void Host_DelayUS (USB_INT32U delay)
va009039 0:1c6af92fdc79 88 {
va009039 0:1c6af92fdc79 89 volatile USB_INT32U i;
va009039 0:1c6af92fdc79 90
va009039 0:1c6af92fdc79 91
va009039 0:1c6af92fdc79 92 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
va009039 0:1c6af92fdc79 93 ;
va009039 0:1c6af92fdc79 94 }
va009039 0:1c6af92fdc79 95 }
va009039 0:1c6af92fdc79 96
va009039 0:1c6af92fdc79 97 // bits of the USB/OTG clock control register
va009039 0:1c6af92fdc79 98 #define HOST_CLK_EN (1<<0)
va009039 0:1c6af92fdc79 99 #define DEV_CLK_EN (1<<1)
va009039 0:1c6af92fdc79 100 #define PORTSEL_CLK_EN (1<<3)
va009039 0:1c6af92fdc79 101 #define AHB_CLK_EN (1<<4)
va009039 0:1c6af92fdc79 102
va009039 0:1c6af92fdc79 103 // bits of the USB/OTG clock status register
va009039 0:1c6af92fdc79 104 #define HOST_CLK_ON (1<<0)
va009039 0:1c6af92fdc79 105 #define DEV_CLK_ON (1<<1)
va009039 0:1c6af92fdc79 106 #define PORTSEL_CLK_ON (1<<3)
va009039 0:1c6af92fdc79 107 #define AHB_CLK_ON (1<<4)
va009039 0:1c6af92fdc79 108
va009039 0:1c6af92fdc79 109 // we need host clock, OTG/portsel clock and AHB clock
va009039 0:1c6af92fdc79 110 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
va009039 0:1c6af92fdc79 111
va009039 0:1c6af92fdc79 112 /*
va009039 0:1c6af92fdc79 113 **************************************************************************************************************
va009039 0:1c6af92fdc79 114 * INITIALIZE THE HOST CONTROLLER
va009039 0:1c6af92fdc79 115 *
va009039 0:1c6af92fdc79 116 * Description: This function initializes lpc17xx host controller
va009039 0:1c6af92fdc79 117 *
va009039 0:1c6af92fdc79 118 * Arguments : None
va009039 0:1c6af92fdc79 119 *
va009039 0:1c6af92fdc79 120 * Returns :
va009039 0:1c6af92fdc79 121 *
va009039 0:1c6af92fdc79 122 **************************************************************************************************************
va009039 0:1c6af92fdc79 123 */
va009039 0:1c6af92fdc79 124 void Host_Init (void)
va009039 0:1c6af92fdc79 125 {
va009039 0:1c6af92fdc79 126 PRINT_Log("In Host_Init\n");
va009039 0:1c6af92fdc79 127 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
va009039 0:1c6af92fdc79 128
va009039 0:1c6af92fdc79 129 // turn on power for USB
va009039 0:1c6af92fdc79 130 LPC_SC->PCONP |= (1UL<<31);
va009039 0:1c6af92fdc79 131 // Enable USB host clock, port selection and AHB clock
va009039 0:1c6af92fdc79 132 LPC_USB->USBClkCtrl |= CLOCK_MASK;
va009039 0:1c6af92fdc79 133 // Wait for clocks to become available
va009039 0:1c6af92fdc79 134 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
va009039 0:1c6af92fdc79 135 ;
va009039 0:1c6af92fdc79 136
va009039 0:1c6af92fdc79 137 // it seems the bits[0:1] mean the following
va009039 0:1c6af92fdc79 138 // 0: U1=device, U2=host
va009039 0:1c6af92fdc79 139 // 1: U1=host, U2=host
va009039 0:1c6af92fdc79 140 // 2: reserved
va009039 0:1c6af92fdc79 141 // 3: U1=host, U2=device
va009039 0:1c6af92fdc79 142 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
va009039 0:1c6af92fdc79 143 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
va009039 0:1c6af92fdc79 144 LPC_USB->OTGStCtrl |= 1;
va009039 0:1c6af92fdc79 145
va009039 0:1c6af92fdc79 146 // now that we've configured the ports, we can turn off the portsel clock
va009039 0:1c6af92fdc79 147 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
va009039 0:1c6af92fdc79 148
va009039 0:1c6af92fdc79 149 // power pins are not connected on mbed, so we can skip them
va009039 0:1c6af92fdc79 150 /* P1[18] = USB_UP_LED, 01 */
va009039 0:1c6af92fdc79 151 /* P1[19] = /USB_PPWR, 10 */
va009039 0:1c6af92fdc79 152 /* P1[22] = USB_PWRD, 10 */
va009039 0:1c6af92fdc79 153 /* P1[27] = /USB_OVRCR, 10 */
va009039 0:1c6af92fdc79 154 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
va009039 0:1c6af92fdc79 155 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
va009039 0:1c6af92fdc79 156 */
va009039 0:1c6af92fdc79 157
va009039 0:1c6af92fdc79 158 // configure USB D+/D- pins
va009039 0:1c6af92fdc79 159 /* P0[29] = USB_D+, 01 */
va009039 0:1c6af92fdc79 160 /* P0[30] = USB_D-, 01 */
va009039 0:1c6af92fdc79 161 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
va009039 0:1c6af92fdc79 162 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
va009039 0:1c6af92fdc79 163
va009039 0:1c6af92fdc79 164 PRINT_Log("Initializing Host Stack\n");
va009039 0:1c6af92fdc79 165
va009039 0:1c6af92fdc79 166 Hcca = (volatile HCCA *)(HostBuf+0x000);
va009039 0:1c6af92fdc79 167 TDHead = (volatile HCTD *)(HostBuf+0x100);
va009039 0:1c6af92fdc79 168 TDTail = (volatile HCTD *)(HostBuf+0x110);
va009039 0:1c6af92fdc79 169 EDCtrl = (volatile HCED *)(HostBuf+0x120);
va009039 0:1c6af92fdc79 170 EDBulkIn = (volatile HCED *)(HostBuf+0x130);
va009039 0:1c6af92fdc79 171 EDBulkOut = (volatile HCED *)(HostBuf+0x140);
va009039 0:1c6af92fdc79 172 TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
va009039 0:1c6af92fdc79 173
va009039 0:1c6af92fdc79 174 /* Initialize all the TDs, EDs and HCCA to 0 */
va009039 0:1c6af92fdc79 175 Host_EDInit(EDCtrl);
va009039 0:1c6af92fdc79 176 Host_EDInit(EDBulkIn);
va009039 0:1c6af92fdc79 177 Host_EDInit(EDBulkOut);
va009039 0:1c6af92fdc79 178 Host_TDInit(TDHead);
va009039 0:1c6af92fdc79 179 Host_TDInit(TDTail);
va009039 0:1c6af92fdc79 180 Host_HCCAInit(Hcca);
va009039 0:1c6af92fdc79 181
va009039 0:1c6af92fdc79 182 Host_DelayMS(50); /* Wait 50 ms before apply reset */
va009039 0:1c6af92fdc79 183 LPC_USB->HcControl = 0; /* HARDWARE RESET */
va009039 0:1c6af92fdc79 184 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
va009039 0:1c6af92fdc79 185 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
va009039 0:1c6af92fdc79 186
va009039 0:1c6af92fdc79 187 /* SOFTWARE RESET */
va009039 0:1c6af92fdc79 188 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
va009039 0:1c6af92fdc79 189 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
va009039 0:1c6af92fdc79 190
va009039 0:1c6af92fdc79 191 /* Put HC in operational state */
va009039 0:1c6af92fdc79 192 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
va009039 0:1c6af92fdc79 193 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
va009039 0:1c6af92fdc79 194
va009039 0:1c6af92fdc79 195 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
va009039 0:1c6af92fdc79 196 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
va009039 0:1c6af92fdc79 197
va009039 0:1c6af92fdc79 198
va009039 0:1c6af92fdc79 199 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
va009039 0:1c6af92fdc79 200 OR_INTR_ENABLE_WDH |
va009039 0:1c6af92fdc79 201 OR_INTR_ENABLE_RHSC;
va009039 0:1c6af92fdc79 202
va009039 0:1c6af92fdc79 203 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
va009039 0:1c6af92fdc79 204 /* Enable the USB Interrupt */
va009039 0:1c6af92fdc79 205 NVIC_EnableIRQ(USB_IRQn);
va009039 0:1c6af92fdc79 206 PRINT_Log("Host Initialized\n");
va009039 0:1c6af92fdc79 207 }
va009039 0:1c6af92fdc79 208
va009039 0:1c6af92fdc79 209 /*
va009039 0:1c6af92fdc79 210 **************************************************************************************************************
va009039 0:1c6af92fdc79 211 * INTERRUPT SERVICE ROUTINE
va009039 0:1c6af92fdc79 212 *
va009039 0:1c6af92fdc79 213 * Description: This function services the interrupt caused by host controller
va009039 0:1c6af92fdc79 214 *
va009039 0:1c6af92fdc79 215 * Arguments : None
va009039 0:1c6af92fdc79 216 *
va009039 0:1c6af92fdc79 217 * Returns : None
va009039 0:1c6af92fdc79 218 *
va009039 0:1c6af92fdc79 219 **************************************************************************************************************
va009039 0:1c6af92fdc79 220 */
va009039 0:1c6af92fdc79 221
va009039 0:1c6af92fdc79 222 void USB_IRQHandler (void) __irq
va009039 0:1c6af92fdc79 223 {
va009039 0:1c6af92fdc79 224 USB_INT32U int_status;
va009039 0:1c6af92fdc79 225 USB_INT32U ie_status;
va009039 0:1c6af92fdc79 226
va009039 0:1c6af92fdc79 227 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
va009039 0:1c6af92fdc79 228 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
va009039 0:1c6af92fdc79 229
va009039 0:1c6af92fdc79 230 if (!(int_status & ie_status)) {
va009039 0:1c6af92fdc79 231 return;
va009039 0:1c6af92fdc79 232 } else {
va009039 0:1c6af92fdc79 233
va009039 0:1c6af92fdc79 234 int_status = int_status & ie_status;
va009039 0:1c6af92fdc79 235 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
va009039 0:1c6af92fdc79 236 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
va009039 0:1c6af92fdc79 237 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
va009039 0:1c6af92fdc79 238 /*
va009039 0:1c6af92fdc79 239 * When DRWE is on, Connect Status Change
va009039 0:1c6af92fdc79 240 * means a remote wakeup event.
va009039 0:1c6af92fdc79 241 */
va009039 0:1c6af92fdc79 242 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
va009039 0:1c6af92fdc79 243 }
va009039 0:1c6af92fdc79 244 else {
va009039 0:1c6af92fdc79 245 /*
va009039 0:1c6af92fdc79 246 * When DRWE is off, Connect Status Change
va009039 0:1c6af92fdc79 247 * is NOT a remote wakeup event
va009039 0:1c6af92fdc79 248 */
va009039 0:1c6af92fdc79 249 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
va009039 0:1c6af92fdc79 250 if (!gUSBConnected) {
va009039 0:1c6af92fdc79 251 HOST_TDControlStatus = 0;
va009039 0:1c6af92fdc79 252 HOST_WdhIntr = 0;
va009039 0:1c6af92fdc79 253 HOST_RhscIntr = 1;
va009039 0:1c6af92fdc79 254 gUSBConnected = 1;
va009039 0:1c6af92fdc79 255 }
va009039 0:1c6af92fdc79 256 else
va009039 0:1c6af92fdc79 257 PRINT_Log("Spurious status change (connected)?\n");
va009039 0:1c6af92fdc79 258 } else {
va009039 0:1c6af92fdc79 259 if (gUSBConnected) {
va009039 0:1c6af92fdc79 260 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
va009039 0:1c6af92fdc79 261 HOST_RhscIntr = 0;
va009039 0:1c6af92fdc79 262 gUSBConnected = 0;
va009039 0:1c6af92fdc79 263 }
va009039 0:1c6af92fdc79 264 else
va009039 0:1c6af92fdc79 265 PRINT_Log("Spurious status change (disconnected)?\n");
va009039 0:1c6af92fdc79 266 }
va009039 0:1c6af92fdc79 267 }
va009039 0:1c6af92fdc79 268 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
va009039 0:1c6af92fdc79 269 }
va009039 0:1c6af92fdc79 270 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
va009039 0:1c6af92fdc79 271 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
va009039 0:1c6af92fdc79 272 }
va009039 0:1c6af92fdc79 273 }
va009039 0:1c6af92fdc79 274 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
va009039 0:1c6af92fdc79 275 HOST_WdhIntr = 1;
va009039 0:1c6af92fdc79 276 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
va009039 0:1c6af92fdc79 277 }
va009039 0:1c6af92fdc79 278 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
va009039 0:1c6af92fdc79 279 }
va009039 0:1c6af92fdc79 280 return;
va009039 0:1c6af92fdc79 281 }
va009039 0:1c6af92fdc79 282
va009039 0:1c6af92fdc79 283 /*
va009039 0:1c6af92fdc79 284 **************************************************************************************************************
va009039 0:1c6af92fdc79 285 * PROCESS TRANSFER DESCRIPTOR
va009039 0:1c6af92fdc79 286 *
va009039 0:1c6af92fdc79 287 * Description: This function processes the transfer descriptor
va009039 0:1c6af92fdc79 288 *
va009039 0:1c6af92fdc79 289 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
va009039 0:1c6af92fdc79 290 * token SETUP, IN, OUT
va009039 0:1c6af92fdc79 291 * buffer Current Buffer Pointer of the transfer descriptor
va009039 0:1c6af92fdc79 292 * buffer_len Length of the buffer
va009039 0:1c6af92fdc79 293 *
va009039 0:1c6af92fdc79 294 * Returns : OK if TD submission is successful
va009039 0:1c6af92fdc79 295 * ERROR if TD submission fails
va009039 0:1c6af92fdc79 296 *
va009039 0:1c6af92fdc79 297 **************************************************************************************************************
va009039 0:1c6af92fdc79 298 */
va009039 0:1c6af92fdc79 299
va009039 0:1c6af92fdc79 300 USB_INT32S Host_ProcessTD (volatile HCED *ed,
va009039 0:1c6af92fdc79 301 volatile USB_INT32U token,
va009039 0:1c6af92fdc79 302 volatile USB_INT08U *buffer,
va009039 0:1c6af92fdc79 303 USB_INT32U buffer_len)
va009039 0:1c6af92fdc79 304 {
va009039 0:1c6af92fdc79 305 volatile USB_INT32U td_toggle;
va009039 0:1c6af92fdc79 306
va009039 0:1c6af92fdc79 307
va009039 0:1c6af92fdc79 308 if (ed == EDCtrl) {
va009039 0:1c6af92fdc79 309 if (token == TD_SETUP) {
va009039 0:1c6af92fdc79 310 td_toggle = TD_TOGGLE_0;
va009039 0:1c6af92fdc79 311 } else {
va009039 0:1c6af92fdc79 312 td_toggle = TD_TOGGLE_1;
va009039 0:1c6af92fdc79 313 }
va009039 0:1c6af92fdc79 314 } else {
va009039 0:1c6af92fdc79 315 td_toggle = 0;
va009039 0:1c6af92fdc79 316 }
va009039 0:1c6af92fdc79 317 TDHead->Control = (TD_ROUNDING |
va009039 0:1c6af92fdc79 318 token |
va009039 0:1c6af92fdc79 319 TD_DELAY_INT(0) |
va009039 0:1c6af92fdc79 320 td_toggle |
va009039 0:1c6af92fdc79 321 TD_CC);
va009039 0:1c6af92fdc79 322 TDTail->Control = 0;
va009039 0:1c6af92fdc79 323 TDHead->CurrBufPtr = (USB_INT32U) buffer;
va009039 0:1c6af92fdc79 324 TDTail->CurrBufPtr = 0;
va009039 0:1c6af92fdc79 325 TDHead->Next = (USB_INT32U) TDTail;
va009039 0:1c6af92fdc79 326 TDTail->Next = 0;
va009039 0:1c6af92fdc79 327 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
va009039 0:1c6af92fdc79 328 TDTail->BufEnd = 0;
va009039 0:1c6af92fdc79 329
va009039 0:1c6af92fdc79 330 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
va009039 0:1c6af92fdc79 331 ed->TailTd = (USB_INT32U)TDTail;
va009039 0:1c6af92fdc79 332 ed->Next = 0;
va009039 0:1c6af92fdc79 333
va009039 0:1c6af92fdc79 334 if (ed == EDCtrl) {
va009039 0:1c6af92fdc79 335 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
va009039 0:1c6af92fdc79 336 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
va009039 0:1c6af92fdc79 337 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
va009039 0:1c6af92fdc79 338 } else {
va009039 0:1c6af92fdc79 339 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
va009039 0:1c6af92fdc79 340 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
va009039 0:1c6af92fdc79 341 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
va009039 0:1c6af92fdc79 342 }
va009039 0:1c6af92fdc79 343
va009039 0:1c6af92fdc79 344 Host_WDHWait();
va009039 0:1c6af92fdc79 345
va009039 0:1c6af92fdc79 346 // if (!(TDHead->Control & 0xF0000000)) {
va009039 0:1c6af92fdc79 347 if (!HOST_TDControlStatus) {
va009039 0:1c6af92fdc79 348 return (OK);
va009039 0:1c6af92fdc79 349 } else {
va009039 0:1c6af92fdc79 350 return (ERR_TD_FAIL);
va009039 0:1c6af92fdc79 351 }
va009039 0:1c6af92fdc79 352 }
va009039 0:1c6af92fdc79 353
va009039 0:1c6af92fdc79 354 /*
va009039 0:1c6af92fdc79 355 **************************************************************************************************************
va009039 0:1c6af92fdc79 356 * ENUMERATE THE DEVICE
va009039 0:1c6af92fdc79 357 *
va009039 0:1c6af92fdc79 358 * Description: This function is used to enumerate the device connected
va009039 0:1c6af92fdc79 359 *
va009039 0:1c6af92fdc79 360 * Arguments : None
va009039 0:1c6af92fdc79 361 *
va009039 0:1c6af92fdc79 362 * Returns : None
va009039 0:1c6af92fdc79 363 *
va009039 0:1c6af92fdc79 364 **************************************************************************************************************
va009039 0:1c6af92fdc79 365 */
va009039 0:1c6af92fdc79 366
va009039 0:1c6af92fdc79 367 USB_INT32S Host_EnumDev (void)
va009039 0:1c6af92fdc79 368 {
va009039 0:1c6af92fdc79 369 USB_INT32S rc;
va009039 0:1c6af92fdc79 370
va009039 0:1c6af92fdc79 371 //PRINT_Log("Connect a Mass Storage device\n");
va009039 0:1c6af92fdc79 372 while (!HOST_RhscIntr)
va009039 0:1c6af92fdc79 373 __WFI();
va009039 0:1c6af92fdc79 374 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
va009039 0:1c6af92fdc79 375 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
va009039 0:1c6af92fdc79 376 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
va009039 0:1c6af92fdc79 377 __WFI(); // Wait for port reset to complete...
va009039 0:1c6af92fdc79 378 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
va009039 0:1c6af92fdc79 379 Host_DelayMS(200); /* Wait for 100 MS after port reset */
va009039 0:1c6af92fdc79 380
va009039 0:1c6af92fdc79 381 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
va009039 0:1c6af92fdc79 382 /* Read first 8 bytes of device desc */
va009039 0:1c6af92fdc79 383 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
va009039 0:1c6af92fdc79 384 if (rc != OK) {
va009039 0:1c6af92fdc79 385 PRINT_Err(rc);
va009039 0:1c6af92fdc79 386 return (rc);
va009039 0:1c6af92fdc79 387 }
va009039 0:1c6af92fdc79 388 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
va009039 0:1c6af92fdc79 389 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
va009039 0:1c6af92fdc79 390 if (rc != OK) {
va009039 0:1c6af92fdc79 391 PRINT_Err(rc);
va009039 0:1c6af92fdc79 392 return (rc);
va009039 0:1c6af92fdc79 393 }
va009039 0:1c6af92fdc79 394 Host_DelayMS(2);
va009039 0:1c6af92fdc79 395 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
va009039 0:1c6af92fdc79 396 /* Get the configuration descriptor */
va009039 0:1c6af92fdc79 397 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
va009039 0:1c6af92fdc79 398 if (rc != OK) {
va009039 0:1c6af92fdc79 399 PRINT_Err(rc);
va009039 0:1c6af92fdc79 400 return (rc);
va009039 0:1c6af92fdc79 401 }
va009039 0:1c6af92fdc79 402 /* Get the first configuration data */
va009039 0:1c6af92fdc79 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
va009039 0:1c6af92fdc79 404 if (rc != OK) {
va009039 0:1c6af92fdc79 405 PRINT_Err(rc);
va009039 0:1c6af92fdc79 406 return (rc);
va009039 0:1c6af92fdc79 407 }
va009039 0:1c6af92fdc79 408 //rc = MS_ParseConfiguration(); /* Parse the configuration */
va009039 0:1c6af92fdc79 409 //if (rc != OK) {
va009039 0:1c6af92fdc79 410 // PRINT_Err(rc);
va009039 0:1c6af92fdc79 411 //}
va009039 0:1c6af92fdc79 412 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
va009039 0:1c6af92fdc79 413 if (rc != OK) {
va009039 0:1c6af92fdc79 414 PRINT_Err(rc);
va009039 0:1c6af92fdc79 415 }
va009039 0:1c6af92fdc79 416 Host_DelayMS(100); /* Some devices may require this delay */
va009039 0:1c6af92fdc79 417 return (rc);
va009039 0:1c6af92fdc79 418 }
va009039 0:1c6af92fdc79 419
va009039 0:1c6af92fdc79 420 /*
va009039 0:1c6af92fdc79 421 **************************************************************************************************************
va009039 0:1c6af92fdc79 422 * RECEIVE THE CONTROL INFORMATION
va009039 0:1c6af92fdc79 423 *
va009039 0:1c6af92fdc79 424 * Description: This function is used to receive the control information
va009039 0:1c6af92fdc79 425 *
va009039 0:1c6af92fdc79 426 * Arguments : bm_request_type
va009039 0:1c6af92fdc79 427 * b_request
va009039 0:1c6af92fdc79 428 * w_value
va009039 0:1c6af92fdc79 429 * w_index
va009039 0:1c6af92fdc79 430 * w_length
va009039 0:1c6af92fdc79 431 * buffer
va009039 0:1c6af92fdc79 432 *
va009039 0:1c6af92fdc79 433 * Returns : OK if Success
va009039 0:1c6af92fdc79 434 * ERROR if Failed
va009039 0:1c6af92fdc79 435 *
va009039 0:1c6af92fdc79 436 **************************************************************************************************************
va009039 0:1c6af92fdc79 437 */
va009039 0:1c6af92fdc79 438
va009039 0:1c6af92fdc79 439 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
va009039 0:1c6af92fdc79 440 USB_INT08U b_request,
va009039 0:1c6af92fdc79 441 USB_INT16U w_value,
va009039 0:1c6af92fdc79 442 USB_INT16U w_index,
va009039 0:1c6af92fdc79 443 USB_INT16U w_length,
va009039 0:1c6af92fdc79 444 volatile USB_INT08U *buffer)
va009039 0:1c6af92fdc79 445 {
va009039 0:1c6af92fdc79 446 USB_INT32S rc;
va009039 0:1c6af92fdc79 447
va009039 0:1c6af92fdc79 448
va009039 0:1c6af92fdc79 449 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
va009039 0:1c6af92fdc79 450 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
va009039 0:1c6af92fdc79 451 if (rc == OK) {
va009039 0:1c6af92fdc79 452 if (w_length) {
va009039 0:1c6af92fdc79 453 rc = Host_ProcessTD(EDCtrl, TD_IN, buffer, w_length);
va009039 0:1c6af92fdc79 454 }
va009039 0:1c6af92fdc79 455 if (rc == OK) {
va009039 0:1c6af92fdc79 456 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
va009039 0:1c6af92fdc79 457 }
va009039 0:1c6af92fdc79 458 }
va009039 0:1c6af92fdc79 459 return (rc);
va009039 0:1c6af92fdc79 460 }
va009039 0:1c6af92fdc79 461
va009039 0:1c6af92fdc79 462 /*
va009039 0:1c6af92fdc79 463 **************************************************************************************************************
va009039 0:1c6af92fdc79 464 * SEND THE CONTROL INFORMATION
va009039 0:1c6af92fdc79 465 *
va009039 0:1c6af92fdc79 466 * Description: This function is used to send the control information
va009039 0:1c6af92fdc79 467 *
va009039 0:1c6af92fdc79 468 * Arguments : None
va009039 0:1c6af92fdc79 469 *
va009039 0:1c6af92fdc79 470 * Returns : OK if Success
va009039 0:1c6af92fdc79 471 * ERR_INVALID_BOOTSIG if Failed
va009039 0:1c6af92fdc79 472 *
va009039 0:1c6af92fdc79 473 **************************************************************************************************************
va009039 0:1c6af92fdc79 474 */
va009039 0:1c6af92fdc79 475
va009039 0:1c6af92fdc79 476 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
va009039 0:1c6af92fdc79 477 USB_INT08U b_request,
va009039 0:1c6af92fdc79 478 USB_INT16U w_value,
va009039 0:1c6af92fdc79 479 USB_INT16U w_index,
va009039 0:1c6af92fdc79 480 USB_INT16U w_length,
va009039 0:1c6af92fdc79 481 volatile USB_INT08U *buffer)
va009039 0:1c6af92fdc79 482 {
va009039 0:1c6af92fdc79 483 USB_INT32S rc;
va009039 0:1c6af92fdc79 484
va009039 0:1c6af92fdc79 485
va009039 0:1c6af92fdc79 486 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
va009039 0:1c6af92fdc79 487
va009039 0:1c6af92fdc79 488 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
va009039 0:1c6af92fdc79 489 if (rc == OK) {
va009039 0:1c6af92fdc79 490 if (w_length) {
va009039 0:1c6af92fdc79 491 rc = Host_ProcessTD(EDCtrl, TD_OUT, buffer, w_length);
va009039 0:1c6af92fdc79 492 }
va009039 0:1c6af92fdc79 493 if (rc == OK) {
va009039 0:1c6af92fdc79 494 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
va009039 0:1c6af92fdc79 495 }
va009039 0:1c6af92fdc79 496 }
va009039 0:1c6af92fdc79 497 return (rc);
va009039 0:1c6af92fdc79 498 }
va009039 0:1c6af92fdc79 499
va009039 0:1c6af92fdc79 500 /*
va009039 0:1c6af92fdc79 501 **************************************************************************************************************
va009039 0:1c6af92fdc79 502 * FILL SETUP PACKET
va009039 0:1c6af92fdc79 503 *
va009039 0:1c6af92fdc79 504 * Description: This function is used to fill the setup packet
va009039 0:1c6af92fdc79 505 *
va009039 0:1c6af92fdc79 506 * Arguments : None
va009039 0:1c6af92fdc79 507 *
va009039 0:1c6af92fdc79 508 * Returns : OK if Success
va009039 0:1c6af92fdc79 509 * ERR_INVALID_BOOTSIG if Failed
va009039 0:1c6af92fdc79 510 *
va009039 0:1c6af92fdc79 511 **************************************************************************************************************
va009039 0:1c6af92fdc79 512 */
va009039 0:1c6af92fdc79 513
va009039 0:1c6af92fdc79 514 void Host_FillSetup (USB_INT08U bm_request_type,
va009039 0:1c6af92fdc79 515 USB_INT08U b_request,
va009039 0:1c6af92fdc79 516 USB_INT16U w_value,
va009039 0:1c6af92fdc79 517 USB_INT16U w_index,
va009039 0:1c6af92fdc79 518 USB_INT16U w_length)
va009039 0:1c6af92fdc79 519 {
va009039 0:1c6af92fdc79 520 int i;
va009039 0:1c6af92fdc79 521 for (i=0;i<w_length;i++)
va009039 0:1c6af92fdc79 522 TDBuffer[i] = 0;
va009039 0:1c6af92fdc79 523
va009039 0:1c6af92fdc79 524 TDBuffer[0] = bm_request_type;
va009039 0:1c6af92fdc79 525 TDBuffer[1] = b_request;
va009039 0:1c6af92fdc79 526 WriteLE16U(&TDBuffer[2], w_value);
va009039 0:1c6af92fdc79 527 WriteLE16U(&TDBuffer[4], w_index);
va009039 0:1c6af92fdc79 528 WriteLE16U(&TDBuffer[6], w_length);
va009039 0:1c6af92fdc79 529 }
va009039 0:1c6af92fdc79 530
va009039 0:1c6af92fdc79 531
va009039 0:1c6af92fdc79 532
va009039 0:1c6af92fdc79 533 /*
va009039 0:1c6af92fdc79 534 **************************************************************************************************************
va009039 0:1c6af92fdc79 535 * INITIALIZE THE TRANSFER DESCRIPTOR
va009039 0:1c6af92fdc79 536 *
va009039 0:1c6af92fdc79 537 * Description: This function initializes transfer descriptor
va009039 0:1c6af92fdc79 538 *
va009039 0:1c6af92fdc79 539 * Arguments : Pointer to TD structure
va009039 0:1c6af92fdc79 540 *
va009039 0:1c6af92fdc79 541 * Returns : None
va009039 0:1c6af92fdc79 542 *
va009039 0:1c6af92fdc79 543 **************************************************************************************************************
va009039 0:1c6af92fdc79 544 */
va009039 0:1c6af92fdc79 545
va009039 0:1c6af92fdc79 546 void Host_TDInit (volatile HCTD *td)
va009039 0:1c6af92fdc79 547 {
va009039 0:1c6af92fdc79 548
va009039 0:1c6af92fdc79 549 td->Control = 0;
va009039 0:1c6af92fdc79 550 td->CurrBufPtr = 0;
va009039 0:1c6af92fdc79 551 td->Next = 0;
va009039 0:1c6af92fdc79 552 td->BufEnd = 0;
va009039 0:1c6af92fdc79 553 }
va009039 0:1c6af92fdc79 554
va009039 0:1c6af92fdc79 555 /*
va009039 0:1c6af92fdc79 556 **************************************************************************************************************
va009039 0:1c6af92fdc79 557 * INITIALIZE THE ENDPOINT DESCRIPTOR
va009039 0:1c6af92fdc79 558 *
va009039 0:1c6af92fdc79 559 * Description: This function initializes endpoint descriptor
va009039 0:1c6af92fdc79 560 *
va009039 0:1c6af92fdc79 561 * Arguments : Pointer to ED strcuture
va009039 0:1c6af92fdc79 562 *
va009039 0:1c6af92fdc79 563 * Returns : None
va009039 0:1c6af92fdc79 564 *
va009039 0:1c6af92fdc79 565 **************************************************************************************************************
va009039 0:1c6af92fdc79 566 */
va009039 0:1c6af92fdc79 567
va009039 0:1c6af92fdc79 568 void Host_EDInit (volatile HCED *ed)
va009039 0:1c6af92fdc79 569 {
va009039 0:1c6af92fdc79 570
va009039 0:1c6af92fdc79 571 ed->Control = 0;
va009039 0:1c6af92fdc79 572 ed->TailTd = 0;
va009039 0:1c6af92fdc79 573 ed->HeadTd = 0;
va009039 0:1c6af92fdc79 574 ed->Next = 0;
va009039 0:1c6af92fdc79 575 }
va009039 0:1c6af92fdc79 576
va009039 0:1c6af92fdc79 577 /*
va009039 0:1c6af92fdc79 578 **************************************************************************************************************
va009039 0:1c6af92fdc79 579 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
va009039 0:1c6af92fdc79 580 *
va009039 0:1c6af92fdc79 581 * Description: This function initializes host controller communications area
va009039 0:1c6af92fdc79 582 *
va009039 0:1c6af92fdc79 583 * Arguments : Pointer to HCCA
va009039 0:1c6af92fdc79 584 *
va009039 0:1c6af92fdc79 585 * Returns :
va009039 0:1c6af92fdc79 586 *
va009039 0:1c6af92fdc79 587 **************************************************************************************************************
va009039 0:1c6af92fdc79 588 */
va009039 0:1c6af92fdc79 589
va009039 0:1c6af92fdc79 590 void Host_HCCAInit (volatile HCCA *hcca)
va009039 0:1c6af92fdc79 591 {
va009039 0:1c6af92fdc79 592 USB_INT32U i;
va009039 0:1c6af92fdc79 593
va009039 0:1c6af92fdc79 594
va009039 0:1c6af92fdc79 595 for (i = 0; i < 32; i++) {
va009039 0:1c6af92fdc79 596
va009039 0:1c6af92fdc79 597 hcca->IntTable[i] = 0;
va009039 0:1c6af92fdc79 598 hcca->FrameNumber = 0;
va009039 0:1c6af92fdc79 599 hcca->DoneHead = 0;
va009039 0:1c6af92fdc79 600 }
va009039 0:1c6af92fdc79 601
va009039 0:1c6af92fdc79 602 }
va009039 0:1c6af92fdc79 603
va009039 0:1c6af92fdc79 604 /*
va009039 0:1c6af92fdc79 605 **************************************************************************************************************
va009039 0:1c6af92fdc79 606 * WAIT FOR WDH INTERRUPT
va009039 0:1c6af92fdc79 607 *
va009039 0:1c6af92fdc79 608 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
va009039 0:1c6af92fdc79 609 *
va009039 0:1c6af92fdc79 610 * Arguments : None
va009039 0:1c6af92fdc79 611 *
va009039 0:1c6af92fdc79 612 * Returns : None
va009039 0:1c6af92fdc79 613 *
va009039 0:1c6af92fdc79 614 **************************************************************************************************************
va009039 0:1c6af92fdc79 615 */
va009039 0:1c6af92fdc79 616
va009039 0:1c6af92fdc79 617 void Host_WDHWait (void)
va009039 0:1c6af92fdc79 618 {
va009039 0:1c6af92fdc79 619 while (!HOST_WdhIntr)
va009039 0:1c6af92fdc79 620 __WFI();
va009039 0:1c6af92fdc79 621
va009039 0:1c6af92fdc79 622 HOST_WdhIntr = 0;
va009039 0:1c6af92fdc79 623 }
va009039 0:1c6af92fdc79 624
va009039 0:1c6af92fdc79 625 /*
va009039 0:1c6af92fdc79 626 **************************************************************************************************************
va009039 0:1c6af92fdc79 627 * READ LE 32U
va009039 0:1c6af92fdc79 628 *
va009039 0:1c6af92fdc79 629 * Description: This function is used to read an unsigned integer from a character buffer in the platform
va009039 0:1c6af92fdc79 630 * containing little endian processor
va009039 0:1c6af92fdc79 631 *
va009039 0:1c6af92fdc79 632 * Arguments : pmem Pointer to the character buffer
va009039 0:1c6af92fdc79 633 *
va009039 0:1c6af92fdc79 634 * Returns : val Unsigned integer
va009039 0:1c6af92fdc79 635 *
va009039 0:1c6af92fdc79 636 **************************************************************************************************************
va009039 0:1c6af92fdc79 637 */
va009039 0:1c6af92fdc79 638
va009039 0:1c6af92fdc79 639 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
va009039 0:1c6af92fdc79 640 {
va009039 0:1c6af92fdc79 641 USB_INT32U val = *(USB_INT32U*)pmem;
va009039 0:1c6af92fdc79 642 #ifdef __BIG_ENDIAN
va009039 0:1c6af92fdc79 643 return __REV(val);
va009039 0:1c6af92fdc79 644 #else
va009039 0:1c6af92fdc79 645 return val;
va009039 0:1c6af92fdc79 646 #endif
va009039 0:1c6af92fdc79 647 }
va009039 0:1c6af92fdc79 648
va009039 0:1c6af92fdc79 649 /*
va009039 0:1c6af92fdc79 650 **************************************************************************************************************
va009039 0:1c6af92fdc79 651 * WRITE LE 32U
va009039 0:1c6af92fdc79 652 *
va009039 0:1c6af92fdc79 653 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
va009039 0:1c6af92fdc79 654 * containing little endian processor.
va009039 0:1c6af92fdc79 655 *
va009039 0:1c6af92fdc79 656 * Arguments : pmem Pointer to the charecter buffer
va009039 0:1c6af92fdc79 657 * val Integer value to be placed in the charecter buffer
va009039 0:1c6af92fdc79 658 *
va009039 0:1c6af92fdc79 659 * Returns : None
va009039 0:1c6af92fdc79 660 *
va009039 0:1c6af92fdc79 661 **************************************************************************************************************
va009039 0:1c6af92fdc79 662 */
va009039 0:1c6af92fdc79 663
va009039 0:1c6af92fdc79 664 void WriteLE32U (volatile USB_INT08U *pmem,
va009039 0:1c6af92fdc79 665 USB_INT32U val)
va009039 0:1c6af92fdc79 666 {
va009039 0:1c6af92fdc79 667 #ifdef __BIG_ENDIAN
va009039 0:1c6af92fdc79 668 *(USB_INT32U*)pmem = __REV(val);
va009039 0:1c6af92fdc79 669 #else
va009039 0:1c6af92fdc79 670 *(USB_INT32U*)pmem = val;
va009039 0:1c6af92fdc79 671 #endif
va009039 0:1c6af92fdc79 672 }
va009039 0:1c6af92fdc79 673
va009039 0:1c6af92fdc79 674 /*
va009039 0:1c6af92fdc79 675 **************************************************************************************************************
va009039 0:1c6af92fdc79 676 * READ LE 16U
va009039 0:1c6af92fdc79 677 *
va009039 0:1c6af92fdc79 678 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
va009039 0:1c6af92fdc79 679 * containing little endian processor
va009039 0:1c6af92fdc79 680 *
va009039 0:1c6af92fdc79 681 * Arguments : pmem Pointer to the charecter buffer
va009039 0:1c6af92fdc79 682 *
va009039 0:1c6af92fdc79 683 * Returns : val Unsigned short integer
va009039 0:1c6af92fdc79 684 *
va009039 0:1c6af92fdc79 685 **************************************************************************************************************
va009039 0:1c6af92fdc79 686 */
va009039 0:1c6af92fdc79 687
va009039 0:1c6af92fdc79 688 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
va009039 0:1c6af92fdc79 689 {
va009039 0:1c6af92fdc79 690 USB_INT16U val = *(USB_INT16U*)pmem;
va009039 0:1c6af92fdc79 691 #ifdef __BIG_ENDIAN
va009039 0:1c6af92fdc79 692 return __REV16(val);
va009039 0:1c6af92fdc79 693 #else
va009039 0:1c6af92fdc79 694 return val;
va009039 0:1c6af92fdc79 695 #endif
va009039 0:1c6af92fdc79 696 }
va009039 0:1c6af92fdc79 697
va009039 0:1c6af92fdc79 698 /*
va009039 0:1c6af92fdc79 699 **************************************************************************************************************
va009039 0:1c6af92fdc79 700 * WRITE LE 16U
va009039 0:1c6af92fdc79 701 *
va009039 0:1c6af92fdc79 702 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
va009039 0:1c6af92fdc79 703 * platform containing little endian processor
va009039 0:1c6af92fdc79 704 *
va009039 0:1c6af92fdc79 705 * Arguments : pmem Pointer to the charecter buffer
va009039 0:1c6af92fdc79 706 * val Value to be placed in the charecter buffer
va009039 0:1c6af92fdc79 707 *
va009039 0:1c6af92fdc79 708 * Returns : None
va009039 0:1c6af92fdc79 709 *
va009039 0:1c6af92fdc79 710 **************************************************************************************************************
va009039 0:1c6af92fdc79 711 */
va009039 0:1c6af92fdc79 712
va009039 0:1c6af92fdc79 713 void WriteLE16U (volatile USB_INT08U *pmem,
va009039 0:1c6af92fdc79 714 USB_INT16U val)
va009039 0:1c6af92fdc79 715 {
va009039 0:1c6af92fdc79 716 #ifdef __BIG_ENDIAN
va009039 0:1c6af92fdc79 717 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
va009039 0:1c6af92fdc79 718 #else
va009039 0:1c6af92fdc79 719 *(USB_INT16U*)pmem = val;
va009039 0:1c6af92fdc79 720 #endif
va009039 0:1c6af92fdc79 721 }
va009039 0:1c6af92fdc79 722
va009039 0:1c6af92fdc79 723 /*
va009039 0:1c6af92fdc79 724 **************************************************************************************************************
va009039 0:1c6af92fdc79 725 * READ BE 32U
va009039 0:1c6af92fdc79 726 *
va009039 0:1c6af92fdc79 727 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
va009039 0:1c6af92fdc79 728 * containing big endian processor
va009039 0:1c6af92fdc79 729 *
va009039 0:1c6af92fdc79 730 * Arguments : pmem Pointer to the charecter buffer
va009039 0:1c6af92fdc79 731 *
va009039 0:1c6af92fdc79 732 * Returns : val Unsigned integer
va009039 0:1c6af92fdc79 733 *
va009039 0:1c6af92fdc79 734 **************************************************************************************************************
va009039 0:1c6af92fdc79 735 */
va009039 0:1c6af92fdc79 736
va009039 0:1c6af92fdc79 737 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
va009039 0:1c6af92fdc79 738 {
va009039 0:1c6af92fdc79 739 USB_INT32U val = *(USB_INT32U*)pmem;
va009039 0:1c6af92fdc79 740 #ifdef __BIG_ENDIAN
va009039 0:1c6af92fdc79 741 return val;
va009039 0:1c6af92fdc79 742 #else
va009039 0:1c6af92fdc79 743 return __REV(val);
va009039 0:1c6af92fdc79 744 #endif
va009039 0:1c6af92fdc79 745 }
va009039 0:1c6af92fdc79 746
va009039 0:1c6af92fdc79 747 /*
va009039 0:1c6af92fdc79 748 **************************************************************************************************************
va009039 0:1c6af92fdc79 749 * WRITE BE 32U
va009039 0:1c6af92fdc79 750 *
va009039 0:1c6af92fdc79 751 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
va009039 0:1c6af92fdc79 752 * containing big endian processor
va009039 0:1c6af92fdc79 753 *
va009039 0:1c6af92fdc79 754 * Arguments : pmem Pointer to the charecter buffer
va009039 0:1c6af92fdc79 755 * val Value to be placed in the charecter buffer
va009039 0:1c6af92fdc79 756 *
va009039 0:1c6af92fdc79 757 * Returns : None
va009039 0:1c6af92fdc79 758 *
va009039 0:1c6af92fdc79 759 **************************************************************************************************************
va009039 0:1c6af92fdc79 760 */
va009039 0:1c6af92fdc79 761
va009039 0:1c6af92fdc79 762 void WriteBE32U (volatile USB_INT08U *pmem,
va009039 0:1c6af92fdc79 763 USB_INT32U val)
va009039 0:1c6af92fdc79 764 {
va009039 0:1c6af92fdc79 765 #ifdef __BIG_ENDIAN
va009039 0:1c6af92fdc79 766 *(USB_INT32U*)pmem = val;
va009039 0:1c6af92fdc79 767 #else
va009039 0:1c6af92fdc79 768 *(USB_INT32U*)pmem = __REV(val);
va009039 0:1c6af92fdc79 769 #endif
va009039 0:1c6af92fdc79 770 }
va009039 0:1c6af92fdc79 771
va009039 0:1c6af92fdc79 772 /*
va009039 0:1c6af92fdc79 773 **************************************************************************************************************
va009039 0:1c6af92fdc79 774 * READ BE 16U
va009039 0:1c6af92fdc79 775 *
va009039 0:1c6af92fdc79 776 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
va009039 0:1c6af92fdc79 777 * containing big endian processor
va009039 0:1c6af92fdc79 778 *
va009039 0:1c6af92fdc79 779 * Arguments : pmem Pointer to the charecter buffer
va009039 0:1c6af92fdc79 780 *
va009039 0:1c6af92fdc79 781 * Returns : val Unsigned short integer
va009039 0:1c6af92fdc79 782 *
va009039 0:1c6af92fdc79 783 **************************************************************************************************************
va009039 0:1c6af92fdc79 784 */
va009039 0:1c6af92fdc79 785
va009039 0:1c6af92fdc79 786 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
va009039 0:1c6af92fdc79 787 {
va009039 0:1c6af92fdc79 788 USB_INT16U val = *(USB_INT16U*)pmem;
va009039 0:1c6af92fdc79 789 #ifdef __BIG_ENDIAN
va009039 0:1c6af92fdc79 790 return val;
va009039 0:1c6af92fdc79 791 #else
va009039 0:1c6af92fdc79 792 return __REV16(val);
va009039 0:1c6af92fdc79 793 #endif
va009039 0:1c6af92fdc79 794 }
va009039 0:1c6af92fdc79 795
va009039 0:1c6af92fdc79 796 /*
va009039 0:1c6af92fdc79 797 **************************************************************************************************************
va009039 0:1c6af92fdc79 798 * WRITE BE 16U
va009039 0:1c6af92fdc79 799 *
va009039 0:1c6af92fdc79 800 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
va009039 0:1c6af92fdc79 801 * platform containing big endian processor
va009039 0:1c6af92fdc79 802 *
va009039 0:1c6af92fdc79 803 * Arguments : pmem Pointer to the charecter buffer
va009039 0:1c6af92fdc79 804 * val Value to be placed in the charecter buffer
va009039 0:1c6af92fdc79 805 *
va009039 0:1c6af92fdc79 806 * Returns : None
va009039 0:1c6af92fdc79 807 *
va009039 0:1c6af92fdc79 808 **************************************************************************************************************
va009039 0:1c6af92fdc79 809 */
va009039 0:1c6af92fdc79 810
va009039 0:1c6af92fdc79 811 void WriteBE16U (volatile USB_INT08U *pmem,
va009039 0:1c6af92fdc79 812 USB_INT16U val)
va009039 0:1c6af92fdc79 813 {
va009039 0:1c6af92fdc79 814 #ifdef __BIG_ENDIAN
va009039 0:1c6af92fdc79 815 *(USB_INT16U*)pmem = val;
va009039 0:1c6af92fdc79 816 #else
va009039 0:1c6af92fdc79 817 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
va009039 0:1c6af92fdc79 818 #endif
va009039 0:1c6af92fdc79 819 }