FXOS8700CQ.h

00001 #ifndef _HEXIWEAR_FXOS8700CQ_H_
00002 #define _HEXIWEAR_FXOS8700CQ_H_
00003 
00004 #include "mbed.h"
00005 
00006 #define I2C_SLAVE_ADDR1  (0x1E<<1)
00007 #define I2C_SUCCESS  0x00
00008 #define I2C_ERROR    0xff
00009 
00010 #define UINT14_MAX 16383
00011 
00012 #define FXOS8700CQ_STATUS  0x00
00013 #define FXOS8700CQ_OUT_X_MSB  0x01
00014 #define FXOS8700CQ_WHOAMI  0x0D
00015 
00016 #define FXOS8700CQ_CTRL_REG1  0x2A
00017 #define FXOS8700CQ_CTRL_REG2  0x2B
00018 #define FXOS8700CQ_CTRL_REG3  0x2C
00019 #define FXOS8700CQ_CTRL_REG4  0x2D
00020 #define FXOS8700CQ_CTRL_REG5  0x2E
00021 
00022 #define FXOS8700CQ_TRANSIENT_CFG  0x1D
00023 #define FXOS8700CQ_TRANSIENT_SRC  0x1E
00024 #define FXOS8700CQ_TRANSIENT_THS  0x1F
00025 #define FXOS8700CQ_TRANSIENT_CNT  0x20
00026 
00027 #define FXOS8700CQ_M_THS_COUNT  0x5A
00028 #define FXOS8700CQ_M_CTRL_REG1  0x5B
00029 #define FXOS8700CQ_M_CTRL_REG2  0x5C
00030 
00031 typedef struct
00032 {
00033     int16_t x;
00034     int16_t y;
00035     int16_t z;
00036 } SRAWDATA;
00037 
00038 class FXOS8700CQ
00039 {
00040     I2C i2cAcc;
00041 
00042     void write_regs(char* d, uint8_t len)
00043     {
00044        i2cAcc.write(I2C_SLAVE_ADDR1, d, 2);
00045     }
00046     void read_regs(uint8_t reg_addr, char* data, int len)
00047     {
00048        char t[1] = {reg_addr};
00049        i2cAcc.write(I2C_SLAVE_ADDR1, t, 1, true);
00050        i2cAcc.read(I2C_SLAVE_ADDR1, data, len);
00051     }
00052 
00053     void soft_reset()
00054     {
00055        /* soft reset */
00056        char d[2] = {FXOS8700CQ_CTRL_REG2, 0x40};
00057        write_regs(d, 2);
00058        wait_ms(100);
00059     }
00060     void set_trans_ths()
00061     {
00062        /* TRANSIENT_THS: debounce = clear when cond not true; resolution = 63mg x 5*/
00063        char d[2] = {FXOS8700CQ_TRANSIENT_THS, 0x85};
00064        write_regs(d, 2);
00065     }
00066     void set_trans_count()
00067     {
00068        /* TRANSIENT_COUNT: min num of debounce counts = 80ms*/
00069        char d[2] = {FXOS8700CQ_TRANSIENT_CNT, 0x02};
00070        write_regs(d, 2);
00071     }
00072     void init_tran_msb()
00073     {
00074        /* A_TRAN_INIT_MSB: init ref to 0g for all axes */
00075        char d1[2] = {0x79, 0x00};
00076        write_regs(d1, 2);
00077 
00078        char d2[2] = {0x7A, 0x00};
00079        write_regs(d2, 2);
00080 
00081        char d3[2] = {0x7B, 0x00};
00082        write_regs(d3, 2);
00083 
00084        char d4[2] = {0x7C, 0x00};
00085        write_regs(d4, 2);
00086     }
00087     void set_trans_cfg()
00088     {
00089        /* TRANSIENT_CFG: evt latch, no Z-axis, Y-axis, X-axis, HPF */
00090        char d[2] = {FXOS8700CQ_TRANSIENT_CFG, 0x16};
00091        write_regs(d, 2);
00092     }
00093     void enable_int()
00094     {
00095        /* Enable interrupts using CTRL_REG4 */
00096        char d[2] = {FXOS8700CQ_CTRL_REG4, 0x20};
00097        write_regs(d, 2);
00098     }
00099     void route_int()
00100     {
00101        /* Route interrupts to INT1 using CTRL_REG5 */
00102        char d[2] = {FXOS8700CQ_CTRL_REG5, 0x20};
00103        write_regs(d, 2);
00104     }
00105     void set_hybrid()
00106     {
00107        /* Setup device for hybrid mode, enable hybrid mode, auto-inc, ODR=50Hz OSR=32 */
00108        char d1[2] = {FXOS8700CQ_M_CTRL_REG1, 0x1F};
00109        write_regs(d1, 2);
00110 
00111        char d2[2] = {FXOS8700CQ_M_CTRL_REG2, 0x20};
00112        write_regs(d2, 2);
00113 
00114        char d3[2] = {FXOS8700CQ_CTRL_REG1, 0x19};
00115        write_regs(d3, 2);
00116     }
00117 
00118 public:
00119 
00120     FXOS8700CQ(PinName sda, PinName scl)
00121       : i2cAcc(sda, scl)
00122     {
00123     }
00124 
00125     /* AN4461 */
00126     void enable_trans_accel()
00127     {
00128        soft_reset();
00129        set_trans_ths();
00130        set_trans_count();
00131        init_tran_msb();
00132        set_trans_cfg();
00133        enable_int();
00134        route_int();
00135        set_hybrid();
00136     }
00137     int read_accel(SRAWDATA* accelData)
00138     {
00139         uint8_t d[1];
00140         read_regs(FXOS8700CQ_TRANSIENT_SRC, (char*)d, 1);
00141         if (0x40 == (d[0] & 0x40)) {
00142           uint8_t acc[6];
00143           read_regs(FXOS8700CQ_OUT_X_MSB, (char*)acc, 6);
00144           accelData->x = ((acc[0]<<8)|(acc[1]))>>2; 
00145           accelData->y = ((acc[2]<<8)|(acc[3]))>>2; 
00146           accelData->z = ((acc[4]<<8)|(acc[5]))>>2; 
00147           return I2C_SUCCESS;
00148         }
00149         return I2C_ERROR;
00150     }
00151     void display_status(Serial* pc)
00152     {
00153         pc->printf( "\r\n\nFXOS8700CQ Who Am I= %X Status = %X\r\n", 
00154             who_am_i(),
00155             status());
00156     }
00157     uint8_t status()
00158     {
00159         return 0;
00160     }
00161     uint8_t who_am_i()
00162     {
00163         return 0;
00164     }
00165 };
00166 
00167 #endif /* _HEXIWEAR_FXOS8700CQ_H_ */