A simple 128x32 graphical LCD program to quickstart with LCD on ARM mbed IoT Starter Kit. This requires mbed Applciation Shield with FRDM-K64F platform.
mbed/TARGET_RZ_A1H/inb_iodefine.h@1:eb68c94a8ee5, 2015-04-12 (annotated)
- Committer:
- tushki7
- Date:
- Sun Apr 12 15:45:52 2015 +0000
- Revision:
- 1:eb68c94a8ee5
- Parent:
- 0:60d829a0353a
A simple 128x32 LCD program with ARM mbed IoT Starter Kit;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
tushki7 | 0:60d829a0353a | 1 | /******************************************************************************* |
tushki7 | 0:60d829a0353a | 2 | * DISCLAIMER |
tushki7 | 0:60d829a0353a | 3 | * This software is supplied by Renesas Electronics Corporation and is only |
tushki7 | 0:60d829a0353a | 4 | * intended for use with Renesas products. No other uses are authorized. This |
tushki7 | 0:60d829a0353a | 5 | * software is owned by Renesas Electronics Corporation and is protected under |
tushki7 | 0:60d829a0353a | 6 | * all applicable laws, including copyright laws. |
tushki7 | 0:60d829a0353a | 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
tushki7 | 0:60d829a0353a | 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT |
tushki7 | 0:60d829a0353a | 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE |
tushki7 | 0:60d829a0353a | 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. |
tushki7 | 0:60d829a0353a | 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS |
tushki7 | 0:60d829a0353a | 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE |
tushki7 | 0:60d829a0353a | 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR |
tushki7 | 0:60d829a0353a | 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE |
tushki7 | 0:60d829a0353a | 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
tushki7 | 0:60d829a0353a | 16 | * Renesas reserves the right, without notice, to make changes to this software |
tushki7 | 0:60d829a0353a | 17 | * and to discontinue the availability of this software. By using this software, |
tushki7 | 0:60d829a0353a | 18 | * you agree to the additional terms and conditions found by accessing the |
tushki7 | 0:60d829a0353a | 19 | * following link: |
tushki7 | 0:60d829a0353a | 20 | * http://www.renesas.com/disclaimer* |
tushki7 | 0:60d829a0353a | 21 | * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved. |
tushki7 | 0:60d829a0353a | 22 | *******************************************************************************/ |
tushki7 | 0:60d829a0353a | 23 | /******************************************************************************* |
tushki7 | 0:60d829a0353a | 24 | * File Name : inb_iodefine.h |
tushki7 | 0:60d829a0353a | 25 | * $Rev: $ |
tushki7 | 0:60d829a0353a | 26 | * $Date:: $ |
tushki7 | 0:60d829a0353a | 27 | * Description : Definition of I/O Register (V1.00a) |
tushki7 | 0:60d829a0353a | 28 | ******************************************************************************/ |
tushki7 | 0:60d829a0353a | 29 | #ifndef INB_IODEFINE_H |
tushki7 | 0:60d829a0353a | 30 | #define INB_IODEFINE_H |
tushki7 | 0:60d829a0353a | 31 | |
tushki7 | 0:60d829a0353a | 32 | struct st_inb |
tushki7 | 0:60d829a0353a | 33 | { /* INB */ |
tushki7 | 0:60d829a0353a | 34 | volatile uint32_t RMPR; /* RMPR */ |
tushki7 | 0:60d829a0353a | 35 | #define INB_AXIBUSCTLn_COUNT 11 |
tushki7 | 0:60d829a0353a | 36 | volatile uint32_t AXIBUSCTL0; /* AXIBUSCTL0 */ |
tushki7 | 0:60d829a0353a | 37 | volatile uint32_t AXIBUSCTL1; /* AXIBUSCTL1 */ |
tushki7 | 0:60d829a0353a | 38 | volatile uint32_t AXIBUSCTL2; /* AXIBUSCTL2 */ |
tushki7 | 0:60d829a0353a | 39 | volatile uint32_t AXIBUSCTL3; /* AXIBUSCTL3 */ |
tushki7 | 0:60d829a0353a | 40 | volatile uint32_t AXIBUSCTL4; /* AXIBUSCTL4 */ |
tushki7 | 0:60d829a0353a | 41 | volatile uint32_t AXIBUSCTL5; /* AXIBUSCTL5 */ |
tushki7 | 0:60d829a0353a | 42 | volatile uint32_t AXIBUSCTL6; /* AXIBUSCTL6 */ |
tushki7 | 0:60d829a0353a | 43 | volatile uint32_t AXIBUSCTL7; /* AXIBUSCTL7 */ |
tushki7 | 0:60d829a0353a | 44 | volatile uint32_t AXIBUSCTL8; /* AXIBUSCTL8 */ |
tushki7 | 0:60d829a0353a | 45 | volatile uint32_t AXIBUSCTL9; /* AXIBUSCTL9 */ |
tushki7 | 0:60d829a0353a | 46 | volatile uint32_t AXIBUSCTL10; /* AXIBUSCTL10 */ |
tushki7 | 0:60d829a0353a | 47 | #define INB_AXIRERRCTLn_COUNT 4 |
tushki7 | 0:60d829a0353a | 48 | volatile uint32_t AXIRERRCTL0; /* AXIRERRCTL0 */ |
tushki7 | 0:60d829a0353a | 49 | volatile uint32_t AXIRERRCTL1; /* AXIRERRCTL1 */ |
tushki7 | 0:60d829a0353a | 50 | volatile uint32_t AXIRERRCTL2; /* AXIRERRCTL2 */ |
tushki7 | 0:60d829a0353a | 51 | volatile uint32_t AXIRERRCTL3; /* AXIRERRCTL3 */ |
tushki7 | 0:60d829a0353a | 52 | #define INB_AXIRERRSTn_COUNT 4 |
tushki7 | 0:60d829a0353a | 53 | volatile uint32_t AXIRERRST0; /* AXIRERRST0 */ |
tushki7 | 0:60d829a0353a | 54 | volatile uint32_t AXIRERRST1; /* AXIRERRST1 */ |
tushki7 | 0:60d829a0353a | 55 | volatile uint32_t AXIRERRST2; /* AXIRERRST2 */ |
tushki7 | 0:60d829a0353a | 56 | volatile uint32_t AXIRERRST3; /* AXIRERRST3 */ |
tushki7 | 0:60d829a0353a | 57 | #define INB_AXIRERRCLRn_COUNT 4 |
tushki7 | 0:60d829a0353a | 58 | volatile uint32_t AXIRERRCLR0; /* AXIRERRCLR0 */ |
tushki7 | 0:60d829a0353a | 59 | volatile uint32_t AXIRERRCLR1; /* AXIRERRCLR1 */ |
tushki7 | 0:60d829a0353a | 60 | volatile uint32_t AXIRERRCLR2; /* AXIRERRCLR2 */ |
tushki7 | 0:60d829a0353a | 61 | volatile uint32_t AXIRERRCLR3; /* AXIRERRCLR3 */ |
tushki7 | 0:60d829a0353a | 62 | }; |
tushki7 | 0:60d829a0353a | 63 | |
tushki7 | 0:60d829a0353a | 64 | |
tushki7 | 0:60d829a0353a | 65 | #define INB (*(struct st_inb *)0xFCFE1A00uL) /* INB */ |
tushki7 | 0:60d829a0353a | 66 | |
tushki7 | 0:60d829a0353a | 67 | |
tushki7 | 0:60d829a0353a | 68 | #define INBRMPR INB.RMPR |
tushki7 | 0:60d829a0353a | 69 | #define INBAXIBUSCTL0 INB.AXIBUSCTL0 |
tushki7 | 0:60d829a0353a | 70 | #define INBAXIBUSCTL1 INB.AXIBUSCTL1 |
tushki7 | 0:60d829a0353a | 71 | #define INBAXIBUSCTL2 INB.AXIBUSCTL2 |
tushki7 | 0:60d829a0353a | 72 | #define INBAXIBUSCTL3 INB.AXIBUSCTL3 |
tushki7 | 0:60d829a0353a | 73 | #define INBAXIBUSCTL4 INB.AXIBUSCTL4 |
tushki7 | 0:60d829a0353a | 74 | #define INBAXIBUSCTL5 INB.AXIBUSCTL5 |
tushki7 | 0:60d829a0353a | 75 | #define INBAXIBUSCTL6 INB.AXIBUSCTL6 |
tushki7 | 0:60d829a0353a | 76 | #define INBAXIBUSCTL7 INB.AXIBUSCTL7 |
tushki7 | 0:60d829a0353a | 77 | #define INBAXIBUSCTL8 INB.AXIBUSCTL8 |
tushki7 | 0:60d829a0353a | 78 | #define INBAXIBUSCTL9 INB.AXIBUSCTL9 |
tushki7 | 0:60d829a0353a | 79 | #define INBAXIBUSCTL10 INB.AXIBUSCTL10 |
tushki7 | 0:60d829a0353a | 80 | #define INBAXIRERRCTL0 INB.AXIRERRCTL0 |
tushki7 | 0:60d829a0353a | 81 | #define INBAXIRERRCTL1 INB.AXIRERRCTL1 |
tushki7 | 0:60d829a0353a | 82 | #define INBAXIRERRCTL2 INB.AXIRERRCTL2 |
tushki7 | 0:60d829a0353a | 83 | #define INBAXIRERRCTL3 INB.AXIRERRCTL3 |
tushki7 | 0:60d829a0353a | 84 | #define INBAXIRERRST0 INB.AXIRERRST0 |
tushki7 | 0:60d829a0353a | 85 | #define INBAXIRERRST1 INB.AXIRERRST1 |
tushki7 | 0:60d829a0353a | 86 | #define INBAXIRERRST2 INB.AXIRERRST2 |
tushki7 | 0:60d829a0353a | 87 | #define INBAXIRERRST3 INB.AXIRERRST3 |
tushki7 | 0:60d829a0353a | 88 | #define INBAXIRERRCLR0 INB.AXIRERRCLR0 |
tushki7 | 0:60d829a0353a | 89 | #define INBAXIRERRCLR1 INB.AXIRERRCLR1 |
tushki7 | 0:60d829a0353a | 90 | #define INBAXIRERRCLR2 INB.AXIRERRCLR2 |
tushki7 | 0:60d829a0353a | 91 | #define INBAXIRERRCLR3 INB.AXIRERRCLR3 |
tushki7 | 0:60d829a0353a | 92 | #endif |