Tushar Sachdeva / FRDM_K64F_LCD

A simple 128x32 graphical LCD program to quickstart with LCD on ARM mbed IoT Starter Kit. This requires mbed Applciation Shield with FRDM-K64F platform.

Dependencies:   C12832

mbed/TARGET_NUCLEO_F411RE/stm32f4xx_hal_pwr.h@1:eb68c94a8ee5, 2015-04-12 (annotated)

Committer:
tushki7
Date:
Sun Apr 12 15:45:52 2015 +0000
Revision:
1:eb68c94a8ee5
Parent:
0:60d829a0353a 
A simple 128x32 LCD program with ARM mbed IoT Starter Kit;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tushki7 0:60d829a0353a 1 /**
tushki7 0:60d829a0353a 2 ******************************************************************************
tushki7 0:60d829a0353a 3 * @file stm32f4xx_hal_pwr.h
tushki7 0:60d829a0353a 4 * @author MCD Application Team
tushki7 0:60d829a0353a 5 * @version V1.1.0
tushki7 0:60d829a0353a 6 * @date 19-June-2014
tushki7 0:60d829a0353a 7 * @brief Header file of PWR HAL module.
tushki7 0:60d829a0353a 8 ******************************************************************************
tushki7 0:60d829a0353a 9 * @attention
tushki7 0:60d829a0353a 10 *
tushki7 0:60d829a0353a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
tushki7 0:60d829a0353a 12 *
tushki7 0:60d829a0353a 13 * Redistribution and use in source and binary forms, with or without modification,
tushki7 0:60d829a0353a 14 * are permitted provided that the following conditions are met:
tushki7 0:60d829a0353a 15 * 1. Redistributions of source code must retain the above copyright notice,
tushki7 0:60d829a0353a 16 * this list of conditions and the following disclaimer.
tushki7 0:60d829a0353a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
tushki7 0:60d829a0353a 18 * this list of conditions and the following disclaimer in the documentation
tushki7 0:60d829a0353a 19 * and/or other materials provided with the distribution.
tushki7 0:60d829a0353a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
tushki7 0:60d829a0353a 21 * may be used to endorse or promote products derived from this software
tushki7 0:60d829a0353a 22 * without specific prior written permission.
tushki7 0:60d829a0353a 23 *
tushki7 0:60d829a0353a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
tushki7 0:60d829a0353a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
tushki7 0:60d829a0353a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
tushki7 0:60d829a0353a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
tushki7 0:60d829a0353a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
tushki7 0:60d829a0353a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
tushki7 0:60d829a0353a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
tushki7 0:60d829a0353a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
tushki7 0:60d829a0353a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
tushki7 0:60d829a0353a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
tushki7 0:60d829a0353a 34 *
tushki7 0:60d829a0353a 35 ******************************************************************************
tushki7 0:60d829a0353a 36 */
tushki7 0:60d829a0353a 37
tushki7 0:60d829a0353a 38 /* Define to prevent recursive inclusion -------------------------------------*/
tushki7 0:60d829a0353a 39 #ifndef __STM32F4xx_HAL_PWR_H
tushki7 0:60d829a0353a 40 #define __STM32F4xx_HAL_PWR_H
tushki7 0:60d829a0353a 41
tushki7 0:60d829a0353a 42 #ifdef __cplusplus
tushki7 0:60d829a0353a 43 extern "C" {
tushki7 0:60d829a0353a 44 #endif
tushki7 0:60d829a0353a 45
tushki7 0:60d829a0353a 46 /* Includes ------------------------------------------------------------------*/
tushki7 0:60d829a0353a 47 #include "stm32f4xx_hal_def.h"
tushki7 0:60d829a0353a 48
tushki7 0:60d829a0353a 49 /** @addtogroup STM32F4xx_HAL_Driver
tushki7 0:60d829a0353a 50 * @{
tushki7 0:60d829a0353a 51 */
tushki7 0:60d829a0353a 52
tushki7 0:60d829a0353a 53 /** @addtogroup PWR
tushki7 0:60d829a0353a 54 * @{
tushki7 0:60d829a0353a 55 */
tushki7 0:60d829a0353a 56
tushki7 0:60d829a0353a 57 /* Exported types ------------------------------------------------------------*/
tushki7 0:60d829a0353a 58 /**
tushki7 0:60d829a0353a 59 * @brief PWR PVD configuration structure definition
tushki7 0:60d829a0353a 60 */
tushki7 0:60d829a0353a 61 typedef struct
tushki7 0:60d829a0353a 62 {
tushki7 0:60d829a0353a 63 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
tushki7 0:60d829a0353a 64 This parameter can be a value of @ref PWR_PVD_detection_level */
tushki7 0:60d829a0353a 65
tushki7 0:60d829a0353a 66 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
tushki7 0:60d829a0353a 67 This parameter can be a value of @ref PWR_PVD_Mode */
tushki7 0:60d829a0353a 68 }PWR_PVDTypeDef;
tushki7 0:60d829a0353a 69
tushki7 0:60d829a0353a 70 /* Exported constants --------------------------------------------------------*/
tushki7 0:60d829a0353a 71 /* ------------- PWR registers bit address in the alias region ---------------*/
tushki7 0:60d829a0353a 72 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
tushki7 0:60d829a0353a 73
tushki7 0:60d829a0353a 74 /* --- CR Register ---*/
tushki7 0:60d829a0353a 75 /* Alias word address of DBP bit */
tushki7 0:60d829a0353a 76 #define CR_OFFSET (PWR_OFFSET + 0x00)
tushki7 0:60d829a0353a 77 #define DBP_BitNumber 0x08
tushki7 0:60d829a0353a 78 #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
tushki7 0:60d829a0353a 79
tushki7 0:60d829a0353a 80 /* Alias word address of PVDE bit */
tushki7 0:60d829a0353a 81 #define PVDE_BitNumber 0x04
tushki7 0:60d829a0353a 82 #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
tushki7 0:60d829a0353a 83
tushki7 0:60d829a0353a 84 /* Alias word address of PMODE bit */
tushki7 0:60d829a0353a 85 #define PMODE_BitNumber 0x0E
tushki7 0:60d829a0353a 86 #define CR_PMODE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PMODE_BitNumber * 4))
tushki7 0:60d829a0353a 87
tushki7 0:60d829a0353a 88 /* --- CSR Register ---*/
tushki7 0:60d829a0353a 89 /* Alias word address of EWUP bit */
tushki7 0:60d829a0353a 90 #define CSR_OFFSET (PWR_OFFSET + 0x04)
tushki7 0:60d829a0353a 91 #define EWUP_BitNumber 0x08
tushki7 0:60d829a0353a 92 #define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
tushki7 0:60d829a0353a 93
tushki7 0:60d829a0353a 94 /** @defgroup PWR_Exported_Constants
tushki7 0:60d829a0353a 95 * @{
tushki7 0:60d829a0353a 96 */
tushki7 0:60d829a0353a 97
tushki7 0:60d829a0353a 98 /** @defgroup PWR_WakeUp_Pins
tushki7 0:60d829a0353a 99 * @{
tushki7 0:60d829a0353a 100 */
tushki7 0:60d829a0353a 101
tushki7 0:60d829a0353a 102 #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP
tushki7 0:60d829a0353a 103 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
tushki7 0:60d829a0353a 104 /**
tushki7 0:60d829a0353a 105 * @}
tushki7 0:60d829a0353a 106 */
tushki7 0:60d829a0353a 107
tushki7 0:60d829a0353a 108 /** @defgroup PWR_PVD_detection_level
tushki7 0:60d829a0353a 109 * @{
tushki7 0:60d829a0353a 110 */
tushki7 0:60d829a0353a 111 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
tushki7 0:60d829a0353a 112 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
tushki7 0:60d829a0353a 113 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
tushki7 0:60d829a0353a 114 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
tushki7 0:60d829a0353a 115 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
tushki7 0:60d829a0353a 116 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
tushki7 0:60d829a0353a 117 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
tushki7 0:60d829a0353a 118 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
tushki7 0:60d829a0353a 119 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
tushki7 0:60d829a0353a 120 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
tushki7 0:60d829a0353a 121 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
tushki7 0:60d829a0353a 122 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
tushki7 0:60d829a0353a 123 /**
tushki7 0:60d829a0353a 124 * @}
tushki7 0:60d829a0353a 125 */
tushki7 0:60d829a0353a 126
tushki7 0:60d829a0353a 127 /** @defgroup PWR_PVD_Mode
tushki7 0:60d829a0353a 128 * @{
tushki7 0:60d829a0353a 129 */
tushki7 0:60d829a0353a 130 #define PWR_MODE_EVT ((uint32_t)0x00000000) /*!< No Interrupt */
tushki7 0:60d829a0353a 131 #define PWR_MODE_IT_RISING ((uint32_t)0x00000001) /*!< External Interrupt Mode with Rising edge trigger detection */
tushki7 0:60d829a0353a 132 #define PWR_MODE_IT_FALLING ((uint32_t)0x00000002) /*!< External Interrupt Mode with Falling edge trigger detection */
tushki7 0:60d829a0353a 133 #define PWR_MODE_IT_RISING_FALLING ((uint32_t)0x00000003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
tushki7 0:60d829a0353a 134 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_MODE_EVT) || ((MODE) == PWR_MODE_IT_RISING)|| \
tushki7 0:60d829a0353a 135 ((MODE) == PWR_MODE_IT_FALLING) || ((MODE) == PWR_MODE_IT_RISING_FALLING))
tushki7 0:60d829a0353a 136 /**
tushki7 0:60d829a0353a 137 * @}
tushki7 0:60d829a0353a 138 */
tushki7 0:60d829a0353a 139
tushki7 0:60d829a0353a 140 /** @defgroup PWR_Regulator_state_in_STOP_mode
tushki7 0:60d829a0353a 141 * @{
tushki7 0:60d829a0353a 142 */
tushki7 0:60d829a0353a 143 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
tushki7 0:60d829a0353a 144 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
tushki7 0:60d829a0353a 145
tushki7 0:60d829a0353a 146 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
tushki7 0:60d829a0353a 147 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
tushki7 0:60d829a0353a 148 /**
tushki7 0:60d829a0353a 149 * @}
tushki7 0:60d829a0353a 150 */
tushki7 0:60d829a0353a 151
tushki7 0:60d829a0353a 152 /** @defgroup PWR_SLEEP_mode_entry
tushki7 0:60d829a0353a 153 * @{
tushki7 0:60d829a0353a 154 */
tushki7 0:60d829a0353a 155 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
tushki7 0:60d829a0353a 156 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
tushki7 0:60d829a0353a 157 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
tushki7 0:60d829a0353a 158 /**
tushki7 0:60d829a0353a 159 * @}
tushki7 0:60d829a0353a 160 */
tushki7 0:60d829a0353a 161
tushki7 0:60d829a0353a 162 /** @defgroup PWR_STOP_mode_entry
tushki7 0:60d829a0353a 163 * @{
tushki7 0:60d829a0353a 164 */
tushki7 0:60d829a0353a 165 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
tushki7 0:60d829a0353a 166 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
tushki7 0:60d829a0353a 167 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
tushki7 0:60d829a0353a 168 /**
tushki7 0:60d829a0353a 169 * @}
tushki7 0:60d829a0353a 170 */
tushki7 0:60d829a0353a 171
tushki7 0:60d829a0353a 172 /** @defgroup PWR_Regulator_Voltage_Scale
tushki7 0:60d829a0353a 173 * @{
tushki7 0:60d829a0353a 174 */
tushki7 0:60d829a0353a 175 #define PWR_REGULATOR_VOLTAGE_SCALE1 ((uint32_t)0x0000C000)
tushki7 0:60d829a0353a 176 #define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00008000)
tushki7 0:60d829a0353a 177 #define PWR_REGULATOR_VOLTAGE_SCALE3 ((uint32_t)0x00004000)
tushki7 0:60d829a0353a 178 #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
tushki7 0:60d829a0353a 179 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
tushki7 0:60d829a0353a 180 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
tushki7 0:60d829a0353a 181 /**
tushki7 0:60d829a0353a 182 * @}
tushki7 0:60d829a0353a 183 */
tushki7 0:60d829a0353a 184
tushki7 0:60d829a0353a 185 /** @defgroup PWR_Flag
tushki7 0:60d829a0353a 186 * @{
tushki7 0:60d829a0353a 187 */
tushki7 0:60d829a0353a 188 #define PWR_FLAG_WU PWR_CSR_WUF
tushki7 0:60d829a0353a 189 #define PWR_FLAG_SB PWR_CSR_SBF
tushki7 0:60d829a0353a 190 #define PWR_FLAG_PVDO PWR_CSR_PVDO
tushki7 0:60d829a0353a 191 #define PWR_FLAG_BRR PWR_CSR_BRR
tushki7 0:60d829a0353a 192 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
tushki7 0:60d829a0353a 193
tushki7 0:60d829a0353a 194 /**
tushki7 0:60d829a0353a 195 * @}
tushki7 0:60d829a0353a 196 */
tushki7 0:60d829a0353a 197
tushki7 0:60d829a0353a 198 /**
tushki7 0:60d829a0353a 199 * @}
tushki7 0:60d829a0353a 200 */
tushki7 0:60d829a0353a 201
tushki7 0:60d829a0353a 202 /* Exported macro ------------------------------------------------------------*/
tushki7 0:60d829a0353a 203
tushki7 0:60d829a0353a 204 /** @brief macros configure the main internal regulator output voltage.
tushki7 0:60d829a0353a 205 * @param __REGULATOR__: specifies the regulator output voltage to achieve
tushki7 0:60d829a0353a 206 * a tradeoff between performance and power consumption when the device does
tushki7 0:60d829a0353a 207 * not operate at the maximum frequency (refer to the datasheets for more details).
tushki7 0:60d829a0353a 208 * This parameter can be one of the following values:
tushki7 0:60d829a0353a 209 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
tushki7 0:60d829a0353a 210 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
tushki7 0:60d829a0353a 211 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
tushki7 0:60d829a0353a 212 * @retval None
tushki7 0:60d829a0353a 213 */
tushki7 0:60d829a0353a 214 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
tushki7 0:60d829a0353a 215
tushki7 0:60d829a0353a 216 /** @brief Check PWR flag is set or not.
tushki7 0:60d829a0353a 217 * @param __FLAG__: specifies the flag to check.
tushki7 0:60d829a0353a 218 * This parameter can be one of the following values:
tushki7 0:60d829a0353a 219 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
tushki7 0:60d829a0353a 220 * was received from the WKUP pin or from the RTC alarm (Alarm A
tushki7 0:60d829a0353a 221 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
tushki7 0:60d829a0353a 222 * An additional wakeup event is detected if the WKUP pin is enabled
tushki7 0:60d829a0353a 223 * (by setting the EWUP bit) when the WKUP pin level is already high.
tushki7 0:60d829a0353a 224 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
tushki7 0:60d829a0353a 225 * resumed from StandBy mode.
tushki7 0:60d829a0353a 226 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
tushki7 0:60d829a0353a 227 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
tushki7 0:60d829a0353a 228 * For this reason, this bit is equal to 0 after Standby or reset
tushki7 0:60d829a0353a 229 * until the PVDE bit is set.
tushki7 0:60d829a0353a 230 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
tushki7 0:60d829a0353a 231 * when the device wakes up from Standby mode or by a system reset
tushki7 0:60d829a0353a 232 * or power reset.
tushki7 0:60d829a0353a 233 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
tushki7 0:60d829a0353a 234 * scaling output selection is ready.
tushki7 0:60d829a0353a 235 * @retval The new state of __FLAG__ (TRUE or FALSE).
tushki7 0:60d829a0353a 236 */
tushki7 0:60d829a0353a 237 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
tushki7 0:60d829a0353a 238
tushki7 0:60d829a0353a 239 /** @brief Clear the PWR's pending flags.
tushki7 0:60d829a0353a 240 * @param __FLAG__: specifies the flag to clear.
tushki7 0:60d829a0353a 241 * This parameter can be one of the following values:
tushki7 0:60d829a0353a 242 * @arg PWR_FLAG_WU: Wake Up flag
tushki7 0:60d829a0353a 243 * @arg PWR_FLAG_SB: StandBy flag
tushki7 0:60d829a0353a 244 */
tushki7 0:60d829a0353a 245 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2)
tushki7 0:60d829a0353a 246
tushki7 0:60d829a0353a 247 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
tushki7 0:60d829a0353a 248 /**
tushki7 0:60d829a0353a 249 * @brief Enable the PVD Exti Line.
tushki7 0:60d829a0353a 250 * @param __EXTILINE__: specifies the PVD Exti sources to be enabled.
tushki7 0:60d829a0353a 251 * This parameter can be:
tushki7 0:60d829a0353a 252 * @arg PWR_EXTI_LINE_PVD
tushki7 0:60d829a0353a 253 * @retval None.
tushki7 0:60d829a0353a 254 */
tushki7 0:60d829a0353a 255 #define __HAL_PVD_EXTI_ENABLE_IT(__EXTILINE__) (EXTI->IMR |= (__EXTILINE__))
tushki7 0:60d829a0353a 256
tushki7 0:60d829a0353a 257 /**
tushki7 0:60d829a0353a 258 * @brief Disable the PVD EXTI Line.
tushki7 0:60d829a0353a 259 * @param __EXTILINE__: specifies the PVD EXTI sources to be disabled.
tushki7 0:60d829a0353a 260 * This parameter can be:
tushki7 0:60d829a0353a 261 * @arg PWR_EXTI_LINE_PVD
tushki7 0:60d829a0353a 262 * @retval None.
tushki7 0:60d829a0353a 263 */
tushki7 0:60d829a0353a 264 #define __HAL_PVD_EXTI_DISABLE_IT(__EXTILINE__) (EXTI->IMR &= ~(__EXTILINE__))
tushki7 0:60d829a0353a 265
tushki7 0:60d829a0353a 266 /**
tushki7 0:60d829a0353a 267 * @brief checks whether the specified PVD Exti interrupt flag is set or not.
tushki7 0:60d829a0353a 268 * @param __EXTILINE__: specifies the PVD Exti sources to be cleared.
tushki7 0:60d829a0353a 269 * This parameter can be:
tushki7 0:60d829a0353a 270 * @arg PWR_EXTI_LINE_PVD
tushki7 0:60d829a0353a 271 * @retval EXTI PVD Line Status.
tushki7 0:60d829a0353a 272 */
tushki7 0:60d829a0353a 273 #define __HAL_PVD_EXTI_GET_FLAG(__EXTILINE__) (EXTI->PR & (__EXTILINE__))
tushki7 0:60d829a0353a 274
tushki7 0:60d829a0353a 275 /**
tushki7 0:60d829a0353a 276 * @brief Clear the PVD Exti flag.
tushki7 0:60d829a0353a 277 * @param __EXTILINE__: specifies the PVD Exti sources to be cleared.
tushki7 0:60d829a0353a 278 * This parameter can be:
tushki7 0:60d829a0353a 279 * @arg PWR_EXTI_LINE_PVD
tushki7 0:60d829a0353a 280 * @retval None.
tushki7 0:60d829a0353a 281 */
tushki7 0:60d829a0353a 282 #define __HAL_PVD_EXTI_CLEAR_FLAG(__EXTILINE__) (EXTI->PR = (__EXTILINE__))
tushki7 0:60d829a0353a 283
tushki7 0:60d829a0353a 284 /**
tushki7 0:60d829a0353a 285 * @brief Generates a Software interrupt on selected EXTI line.
tushki7 0:60d829a0353a 286 * @param __EXTILINE__: specifies the PVD EXTI sources to be disabled.
tushki7 0:60d829a0353a 287 * This parameter can be:
tushki7 0:60d829a0353a 288 * @arg PWR_EXTI_LINE_PVD
tushki7 0:60d829a0353a 289 * @retval None
tushki7 0:60d829a0353a 290 */
tushki7 0:60d829a0353a 291 #define __HAL_PVD_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
tushki7 0:60d829a0353a 292
tushki7 0:60d829a0353a 293 /* Include PWR HAL Extension module */
tushki7 0:60d829a0353a 294 #include "stm32f4xx_hal_pwr_ex.h"
tushki7 0:60d829a0353a 295
tushki7 0:60d829a0353a 296 /* Exported functions --------------------------------------------------------*/
tushki7 0:60d829a0353a 297
tushki7 0:60d829a0353a 298 /* Initialization and de-initialization functions *****************************/
tushki7 0:60d829a0353a 299 void HAL_PWR_DeInit(void);
tushki7 0:60d829a0353a 300 void HAL_PWR_EnableBkUpAccess(void);
tushki7 0:60d829a0353a 301 void HAL_PWR_DisableBkUpAccess(void);
tushki7 0:60d829a0353a 302
tushki7 0:60d829a0353a 303 /* Peripheral Control functions **********************************************/
tushki7 0:60d829a0353a 304 /* PVD configuration */
tushki7 0:60d829a0353a 305 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
tushki7 0:60d829a0353a 306 void HAL_PWR_EnablePVD(void);
tushki7 0:60d829a0353a 307 void HAL_PWR_DisablePVD(void);
tushki7 0:60d829a0353a 308
tushki7 0:60d829a0353a 309 /* WakeUp pins configuration */
tushki7 0:60d829a0353a 310 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
tushki7 0:60d829a0353a 311 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
tushki7 0:60d829a0353a 312
tushki7 0:60d829a0353a 313 /* Low Power modes entry */
tushki7 0:60d829a0353a 314 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
tushki7 0:60d829a0353a 315 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
tushki7 0:60d829a0353a 316 void HAL_PWR_EnterSTANDBYMode(void);
tushki7 0:60d829a0353a 317
tushki7 0:60d829a0353a 318 void HAL_PWR_PVD_IRQHandler(void);
tushki7 0:60d829a0353a 319 void HAL_PWR_PVDCallback(void);
tushki7 0:60d829a0353a 320
tushki7 0:60d829a0353a 321
tushki7 0:60d829a0353a 322 /**
tushki7 0:60d829a0353a 323 * @}
tushki7 0:60d829a0353a 324 */
tushki7 0:60d829a0353a 325
tushki7 0:60d829a0353a 326 /**
tushki7 0:60d829a0353a 327 * @}
tushki7 0:60d829a0353a 328 */
tushki7 0:60d829a0353a 329
tushki7 0:60d829a0353a 330 #ifdef __cplusplus
tushki7 0:60d829a0353a 331 }
tushki7 0:60d829a0353a 332 #endif
tushki7 0:60d829a0353a 333
tushki7 0:60d829a0353a 334
tushki7 0:60d829a0353a 335 #endif /* __STM32F4xx_HAL_PWR_H */
tushki7 0:60d829a0353a 336
tushki7 0:60d829a0353a 337 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/