Tushar Sachdeva
A simple 128x32 graphical LCD program to quickstart with LCD on ARM mbed IoT Starter Kit. This requires mbed Applciation Shield with FRDM-K64F platform.
mbed/TARGET_NUCLEO_F334R8/stm32f3xx_hal_usart.h@1:eb68c94a8ee5, 2015-04-12 (annotated)
- Committer:
- tushki7
- Date:
- Sun Apr 12 15:45:52 2015 +0000
- Revision:
- 1:eb68c94a8ee5
- Parent:
- 0:60d829a0353a
A simple 128x32 LCD program with ARM mbed IoT Starter Kit;
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| tushki7 | 0:60d829a0353a | 1 | /** |
| tushki7 | 0:60d829a0353a | 2 | ****************************************************************************** |
| tushki7 | 0:60d829a0353a | 3 | * @file stm32f3xx_hal_usart.h |
| tushki7 | 0:60d829a0353a | 4 | * @author MCD Application Team |
| tushki7 | 0:60d829a0353a | 5 | * @version V1.1.0 |
| tushki7 | 0:60d829a0353a | 6 | * @date 12-Sept-2014 |
| tushki7 | 0:60d829a0353a | 7 | * @brief Header file of USART HAL module. |
| tushki7 | 0:60d829a0353a | 8 | ****************************************************************************** |
| tushki7 | 0:60d829a0353a | 9 | * @attention |
| tushki7 | 0:60d829a0353a | 10 | * |
| tushki7 | 0:60d829a0353a | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| tushki7 | 0:60d829a0353a | 12 | * |
| tushki7 | 0:60d829a0353a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| tushki7 | 0:60d829a0353a | 14 | * are permitted provided that the following conditions are met: |
| tushki7 | 0:60d829a0353a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| tushki7 | 0:60d829a0353a | 16 | * this list of conditions and the following disclaimer. |
| tushki7 | 0:60d829a0353a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| tushki7 | 0:60d829a0353a | 18 | * this list of conditions and the following disclaimer in the documentation |
| tushki7 | 0:60d829a0353a | 19 | * and/or other materials provided with the distribution. |
| tushki7 | 0:60d829a0353a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| tushki7 | 0:60d829a0353a | 21 | * may be used to endorse or promote products derived from this software |
| tushki7 | 0:60d829a0353a | 22 | * without specific prior written permission. |
| tushki7 | 0:60d829a0353a | 23 | * |
| tushki7 | 0:60d829a0353a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| tushki7 | 0:60d829a0353a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| tushki7 | 0:60d829a0353a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| tushki7 | 0:60d829a0353a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| tushki7 | 0:60d829a0353a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| tushki7 | 0:60d829a0353a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| tushki7 | 0:60d829a0353a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| tushki7 | 0:60d829a0353a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| tushki7 | 0:60d829a0353a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| tushki7 | 0:60d829a0353a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| tushki7 | 0:60d829a0353a | 34 | * |
| tushki7 | 0:60d829a0353a | 35 | ****************************************************************************** |
| tushki7 | 0:60d829a0353a | 36 | */ |
| tushki7 | 0:60d829a0353a | 37 | |
| tushki7 | 0:60d829a0353a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 39 | #ifndef __STM32F3xx_HAL_USART_H |
| tushki7 | 0:60d829a0353a | 40 | #define __STM32F3xx_HAL_USART_H |
| tushki7 | 0:60d829a0353a | 41 | |
| tushki7 | 0:60d829a0353a | 42 | #ifdef __cplusplus |
| tushki7 | 0:60d829a0353a | 43 | extern "C" { |
| tushki7 | 0:60d829a0353a | 44 | #endif |
| tushki7 | 0:60d829a0353a | 45 | |
| tushki7 | 0:60d829a0353a | 46 | /* Includes ------------------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 47 | #include "stm32f3xx_hal_def.h" |
| tushki7 | 0:60d829a0353a | 48 | |
| tushki7 | 0:60d829a0353a | 49 | /** @addtogroup STM32F3xx_HAL_Driver |
| tushki7 | 0:60d829a0353a | 50 | * @{ |
| tushki7 | 0:60d829a0353a | 51 | */ |
| tushki7 | 0:60d829a0353a | 52 | |
| tushki7 | 0:60d829a0353a | 53 | /** @addtogroup USART |
| tushki7 | 0:60d829a0353a | 54 | * @{ |
| tushki7 | 0:60d829a0353a | 55 | */ |
| tushki7 | 0:60d829a0353a | 56 | |
| tushki7 | 0:60d829a0353a | 57 | /* Exported types ------------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 58 | /** @defgroup USART_Exported_Types USART Exported Types |
| tushki7 | 0:60d829a0353a | 59 | * @{ |
| tushki7 | 0:60d829a0353a | 60 | */ |
| tushki7 | 0:60d829a0353a | 61 | |
| tushki7 | 0:60d829a0353a | 62 | /** |
| tushki7 | 0:60d829a0353a | 63 | * @brief USART Init Structure definition |
| tushki7 | 0:60d829a0353a | 64 | */ |
| tushki7 | 0:60d829a0353a | 65 | typedef struct |
| tushki7 | 0:60d829a0353a | 66 | { |
| tushki7 | 0:60d829a0353a | 67 | uint32_t BaudRate; /*!< This member configures the Usart communication baud rate. |
| tushki7 | 0:60d829a0353a | 68 | The baud rate is computed using the following formula: |
| tushki7 | 0:60d829a0353a | 69 | Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))) */ |
| tushki7 | 0:60d829a0353a | 70 | |
| tushki7 | 0:60d829a0353a | 71 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
| tushki7 | 0:60d829a0353a | 72 | This parameter can be a value of @ref USARTEx_Word_Length */ |
| tushki7 | 0:60d829a0353a | 73 | |
| tushki7 | 0:60d829a0353a | 74 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
| tushki7 | 0:60d829a0353a | 75 | This parameter can be a value of @ref USART_Stop_Bits */ |
| tushki7 | 0:60d829a0353a | 76 | |
| tushki7 | 0:60d829a0353a | 77 | uint32_t Parity; /*!< Specifies the parity mode. |
| tushki7 | 0:60d829a0353a | 78 | This parameter can be a value of @ref USART_Parity |
| tushki7 | 0:60d829a0353a | 79 | @note When parity is enabled, the computed parity is inserted |
| tushki7 | 0:60d829a0353a | 80 | at the MSB position of the transmitted data (9th bit when |
| tushki7 | 0:60d829a0353a | 81 | the word length is set to 9 data bits; 8th bit when the |
| tushki7 | 0:60d829a0353a | 82 | word length is set to 8 data bits). */ |
| tushki7 | 0:60d829a0353a | 83 | |
| tushki7 | 0:60d829a0353a | 84 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
| tushki7 | 0:60d829a0353a | 85 | This parameter can be a value of @ref USART_Mode */ |
| tushki7 | 0:60d829a0353a | 86 | |
| tushki7 | 0:60d829a0353a | 87 | uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock. |
| tushki7 | 0:60d829a0353a | 88 | This parameter can be a value of @ref USART_Clock_Polarity */ |
| tushki7 | 0:60d829a0353a | 89 | |
| tushki7 | 0:60d829a0353a | 90 | uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. |
| tushki7 | 0:60d829a0353a | 91 | This parameter can be a value of @ref USART_Clock_Phase */ |
| tushki7 | 0:60d829a0353a | 92 | |
| tushki7 | 0:60d829a0353a | 93 | uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted |
| tushki7 | 0:60d829a0353a | 94 | data bit (MSB) has to be output on the SCLK pin in synchronous mode. |
| tushki7 | 0:60d829a0353a | 95 | This parameter can be a value of @ref USART_Last_Bit */ |
| tushki7 | 0:60d829a0353a | 96 | }USART_InitTypeDef; |
| tushki7 | 0:60d829a0353a | 97 | |
| tushki7 | 0:60d829a0353a | 98 | /** |
| tushki7 | 0:60d829a0353a | 99 | * @brief HAL State structures definition |
| tushki7 | 0:60d829a0353a | 100 | */ |
| tushki7 | 0:60d829a0353a | 101 | typedef enum |
| tushki7 | 0:60d829a0353a | 102 | { |
| tushki7 | 0:60d829a0353a | 103 | HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */ |
| tushki7 | 0:60d829a0353a | 104 | HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| tushki7 | 0:60d829a0353a | 105 | HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
| tushki7 | 0:60d829a0353a | 106 | HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
| tushki7 | 0:60d829a0353a | 107 | HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
| tushki7 | 0:60d829a0353a | 108 | HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */ |
| tushki7 | 0:60d829a0353a | 109 | HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| tushki7 | 0:60d829a0353a | 110 | HAL_USART_STATE_ERROR = 0x04 /*!< Error */ |
| tushki7 | 0:60d829a0353a | 111 | }HAL_USART_StateTypeDef; |
| tushki7 | 0:60d829a0353a | 112 | |
| tushki7 | 0:60d829a0353a | 113 | /** |
| tushki7 | 0:60d829a0353a | 114 | * @brief HAL USART Error Code structure definition |
| tushki7 | 0:60d829a0353a | 115 | */ |
| tushki7 | 0:60d829a0353a | 116 | typedef enum |
| tushki7 | 0:60d829a0353a | 117 | { |
| tushki7 | 0:60d829a0353a | 118 | HAL_USART_ERROR_NONE = 0x00, /*!< No error */ |
| tushki7 | 0:60d829a0353a | 119 | HAL_USART_ERROR_PE = 0x01, /*!< Parity error */ |
| tushki7 | 0:60d829a0353a | 120 | HAL_USART_ERROR_NE = 0x02, /*!< Noise error */ |
| tushki7 | 0:60d829a0353a | 121 | HAL_USART_ERROR_FE = 0x04, /*!< frame error */ |
| tushki7 | 0:60d829a0353a | 122 | HAL_USART_ERROR_ORE = 0x08, /*!< Overrun error */ |
| tushki7 | 0:60d829a0353a | 123 | HAL_USART_ERROR_DMA = 0x10 /*!< DMA transfer error */ |
| tushki7 | 0:60d829a0353a | 124 | }HAL_USART_ErrorTypeDef; |
| tushki7 | 0:60d829a0353a | 125 | |
| tushki7 | 0:60d829a0353a | 126 | /** |
| tushki7 | 0:60d829a0353a | 127 | * @brief USART clock sources definitions |
| tushki7 | 0:60d829a0353a | 128 | */ |
| tushki7 | 0:60d829a0353a | 129 | typedef enum |
| tushki7 | 0:60d829a0353a | 130 | { |
| tushki7 | 0:60d829a0353a | 131 | USART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */ |
| tushki7 | 0:60d829a0353a | 132 | USART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */ |
| tushki7 | 0:60d829a0353a | 133 | USART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */ |
| tushki7 | 0:60d829a0353a | 134 | USART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */ |
| tushki7 | 0:60d829a0353a | 135 | USART_CLOCKSOURCE_LSE = 0x08, /*!< LSE clock source */ |
| tushki7 | 0:60d829a0353a | 136 | USART_CLOCKSOURCE_UNDEFINED = 0x10 /*!< Undefined clock source */ |
| tushki7 | 0:60d829a0353a | 137 | }USART_ClockSourceTypeDef; |
| tushki7 | 0:60d829a0353a | 138 | |
| tushki7 | 0:60d829a0353a | 139 | |
| tushki7 | 0:60d829a0353a | 140 | /** |
| tushki7 | 0:60d829a0353a | 141 | * @brief USART handle Structure definition |
| tushki7 | 0:60d829a0353a | 142 | */ |
| tushki7 | 0:60d829a0353a | 143 | typedef struct |
| tushki7 | 0:60d829a0353a | 144 | { |
| tushki7 | 0:60d829a0353a | 145 | USART_TypeDef *Instance; /*!< USART registers base address */ |
| tushki7 | 0:60d829a0353a | 146 | |
| tushki7 | 0:60d829a0353a | 147 | USART_InitTypeDef Init; /*!< USART communication parameters */ |
| tushki7 | 0:60d829a0353a | 148 | |
| tushki7 | 0:60d829a0353a | 149 | uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */ |
| tushki7 | 0:60d829a0353a | 150 | |
| tushki7 | 0:60d829a0353a | 151 | uint16_t TxXferSize; /*!< USART Tx Transfer size */ |
| tushki7 | 0:60d829a0353a | 152 | |
| tushki7 | 0:60d829a0353a | 153 | uint16_t TxXferCount; /*!< USART Tx Transfer Counter */ |
| tushki7 | 0:60d829a0353a | 154 | |
| tushki7 | 0:60d829a0353a | 155 | uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */ |
| tushki7 | 0:60d829a0353a | 156 | |
| tushki7 | 0:60d829a0353a | 157 | uint16_t RxXferSize; /*!< USART Rx Transfer size */ |
| tushki7 | 0:60d829a0353a | 158 | |
| tushki7 | 0:60d829a0353a | 159 | uint16_t RxXferCount; /*!< USART Rx Transfer Counter */ |
| tushki7 | 0:60d829a0353a | 160 | |
| tushki7 | 0:60d829a0353a | 161 | uint16_t Mask; /*!< USART Rx RDR register mask */ |
| tushki7 | 0:60d829a0353a | 162 | |
| tushki7 | 0:60d829a0353a | 163 | DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */ |
| tushki7 | 0:60d829a0353a | 164 | |
| tushki7 | 0:60d829a0353a | 165 | DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */ |
| tushki7 | 0:60d829a0353a | 166 | |
| tushki7 | 0:60d829a0353a | 167 | HAL_LockTypeDef Lock; /*!< Locking object */ |
| tushki7 | 0:60d829a0353a | 168 | |
| tushki7 | 0:60d829a0353a | 169 | HAL_USART_StateTypeDef State; /*!< USART communication state */ |
| tushki7 | 0:60d829a0353a | 170 | |
| tushki7 | 0:60d829a0353a | 171 | HAL_USART_ErrorTypeDef ErrorCode; /*!< USART Error code */ |
| tushki7 | 0:60d829a0353a | 172 | |
| tushki7 | 0:60d829a0353a | 173 | }USART_HandleTypeDef; |
| tushki7 | 0:60d829a0353a | 174 | |
| tushki7 | 0:60d829a0353a | 175 | /** |
| tushki7 | 0:60d829a0353a | 176 | * @} |
| tushki7 | 0:60d829a0353a | 177 | */ |
| tushki7 | 0:60d829a0353a | 178 | |
| tushki7 | 0:60d829a0353a | 179 | /* Exported constants --------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 180 | |
| tushki7 | 0:60d829a0353a | 181 | /** @defgroup USART_Exported_Constants USART Exported Constants |
| tushki7 | 0:60d829a0353a | 182 | * @{ |
| tushki7 | 0:60d829a0353a | 183 | */ |
| tushki7 | 0:60d829a0353a | 184 | |
| tushki7 | 0:60d829a0353a | 185 | /** @defgroup USART_Stop_Bits USART Number of Stop Bits |
| tushki7 | 0:60d829a0353a | 186 | * @{ |
| tushki7 | 0:60d829a0353a | 187 | */ |
| tushki7 | 0:60d829a0353a | 188 | #define USART_STOPBITS_1 ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 189 | #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0) |
| tushki7 | 0:60d829a0353a | 190 | #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
| tushki7 | 0:60d829a0353a | 191 | #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) |
| tushki7 | 0:60d829a0353a | 192 | #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \ |
| tushki7 | 0:60d829a0353a | 193 | ((STOPBITS) == USART_STOPBITS_0_5) || \ |
| tushki7 | 0:60d829a0353a | 194 | ((STOPBITS) == USART_STOPBITS_1_5) || \ |
| tushki7 | 0:60d829a0353a | 195 | ((STOPBITS) == USART_STOPBITS_2)) |
| tushki7 | 0:60d829a0353a | 196 | /** |
| tushki7 | 0:60d829a0353a | 197 | * @} |
| tushki7 | 0:60d829a0353a | 198 | */ |
| tushki7 | 0:60d829a0353a | 199 | |
| tushki7 | 0:60d829a0353a | 200 | /** @defgroup USART_Parity USART Parity |
| tushki7 | 0:60d829a0353a | 201 | * @{ |
| tushki7 | 0:60d829a0353a | 202 | */ |
| tushki7 | 0:60d829a0353a | 203 | #define USART_PARITY_NONE ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 204 | #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
| tushki7 | 0:60d829a0353a | 205 | #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
| tushki7 | 0:60d829a0353a | 206 | #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \ |
| tushki7 | 0:60d829a0353a | 207 | ((PARITY) == USART_PARITY_EVEN) || \ |
| tushki7 | 0:60d829a0353a | 208 | ((PARITY) == USART_PARITY_ODD)) |
| tushki7 | 0:60d829a0353a | 209 | /** |
| tushki7 | 0:60d829a0353a | 210 | * @} |
| tushki7 | 0:60d829a0353a | 211 | */ |
| tushki7 | 0:60d829a0353a | 212 | |
| tushki7 | 0:60d829a0353a | 213 | /** @defgroup USART_Mode USART Mode |
| tushki7 | 0:60d829a0353a | 214 | * @{ |
| tushki7 | 0:60d829a0353a | 215 | */ |
| tushki7 | 0:60d829a0353a | 216 | #define USART_MODE_RX ((uint32_t)USART_CR1_RE) |
| tushki7 | 0:60d829a0353a | 217 | #define USART_MODE_TX ((uint32_t)USART_CR1_TE) |
| tushki7 | 0:60d829a0353a | 218 | #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
| tushki7 | 0:60d829a0353a | 219 | #define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFFFFFF3) == 0x00) && ((MODE) != (uint32_t)0x00)) |
| tushki7 | 0:60d829a0353a | 220 | /** |
| tushki7 | 0:60d829a0353a | 221 | * @} |
| tushki7 | 0:60d829a0353a | 222 | */ |
| tushki7 | 0:60d829a0353a | 223 | |
| tushki7 | 0:60d829a0353a | 224 | /** @defgroup USART_Clock USART Clock |
| tushki7 | 0:60d829a0353a | 225 | * @{ |
| tushki7 | 0:60d829a0353a | 226 | */ |
| tushki7 | 0:60d829a0353a | 227 | #define USART_CLOCK_DISABLED ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 228 | #define USART_CLOCK_ENABLED ((uint32_t)USART_CR2_CLKEN) |
| tushki7 | 0:60d829a0353a | 229 | #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLED) || \ |
| tushki7 | 0:60d829a0353a | 230 | ((CLOCK) == USART_CLOCK_ENABLED)) |
| tushki7 | 0:60d829a0353a | 231 | /** |
| tushki7 | 0:60d829a0353a | 232 | * @} |
| tushki7 | 0:60d829a0353a | 233 | */ |
| tushki7 | 0:60d829a0353a | 234 | |
| tushki7 | 0:60d829a0353a | 235 | /** @defgroup USART_Clock_Polarity USART Clock Polarity |
| tushki7 | 0:60d829a0353a | 236 | * @{ |
| tushki7 | 0:60d829a0353a | 237 | */ |
| tushki7 | 0:60d829a0353a | 238 | #define USART_POLARITY_LOW ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 239 | #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) |
| tushki7 | 0:60d829a0353a | 240 | #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH)) |
| tushki7 | 0:60d829a0353a | 241 | /** |
| tushki7 | 0:60d829a0353a | 242 | * @} |
| tushki7 | 0:60d829a0353a | 243 | */ |
| tushki7 | 0:60d829a0353a | 244 | |
| tushki7 | 0:60d829a0353a | 245 | /** @defgroup USART_Clock_Phase USART Clock Phase |
| tushki7 | 0:60d829a0353a | 246 | * @{ |
| tushki7 | 0:60d829a0353a | 247 | */ |
| tushki7 | 0:60d829a0353a | 248 | #define USART_PHASE_1EDGE ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 249 | #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) |
| tushki7 | 0:60d829a0353a | 250 | #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE)) |
| tushki7 | 0:60d829a0353a | 251 | /** |
| tushki7 | 0:60d829a0353a | 252 | * @} |
| tushki7 | 0:60d829a0353a | 253 | */ |
| tushki7 | 0:60d829a0353a | 254 | |
| tushki7 | 0:60d829a0353a | 255 | /** @defgroup USART_Last_Bit USART Last Bit |
| tushki7 | 0:60d829a0353a | 256 | * @{ |
| tushki7 | 0:60d829a0353a | 257 | */ |
| tushki7 | 0:60d829a0353a | 258 | #define USART_LASTBIT_DISABLE ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 259 | #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) |
| tushki7 | 0:60d829a0353a | 260 | #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 261 | ((LASTBIT) == USART_LASTBIT_ENABLE)) |
| tushki7 | 0:60d829a0353a | 262 | /** |
| tushki7 | 0:60d829a0353a | 263 | * @} |
| tushki7 | 0:60d829a0353a | 264 | */ |
| tushki7 | 0:60d829a0353a | 265 | |
| tushki7 | 0:60d829a0353a | 266 | |
| tushki7 | 0:60d829a0353a | 267 | /** @defgroup USART_Flags USART Flags |
| tushki7 | 0:60d829a0353a | 268 | * Elements values convention: 0xXXXX |
| tushki7 | 0:60d829a0353a | 269 | * - 0xXXXX : Flag mask in the ISR register |
| tushki7 | 0:60d829a0353a | 270 | * @{ |
| tushki7 | 0:60d829a0353a | 271 | */ |
| tushki7 | 0:60d829a0353a | 272 | #define USART_FLAG_REACK ((uint32_t)0x00400000) |
| tushki7 | 0:60d829a0353a | 273 | #define USART_FLAG_TEACK ((uint32_t)0x00200000) |
| tushki7 | 0:60d829a0353a | 274 | #define USART_FLAG_BUSY ((uint32_t)0x00010000) |
| tushki7 | 0:60d829a0353a | 275 | #define USART_FLAG_CTS ((uint32_t)0x00000400) |
| tushki7 | 0:60d829a0353a | 276 | #define USART_FLAG_CTSIF ((uint32_t)0x00000200) |
| tushki7 | 0:60d829a0353a | 277 | #define USART_FLAG_LBDF ((uint32_t)0x00000100) |
| tushki7 | 0:60d829a0353a | 278 | #define USART_FLAG_TXE ((uint32_t)0x00000080) |
| tushki7 | 0:60d829a0353a | 279 | #define USART_FLAG_TC ((uint32_t)0x00000040) |
| tushki7 | 0:60d829a0353a | 280 | #define USART_FLAG_RXNE ((uint32_t)0x00000020) |
| tushki7 | 0:60d829a0353a | 281 | #define USART_FLAG_IDLE ((uint32_t)0x00000010) |
| tushki7 | 0:60d829a0353a | 282 | #define USART_FLAG_ORE ((uint32_t)0x00000008) |
| tushki7 | 0:60d829a0353a | 283 | #define USART_FLAG_NE ((uint32_t)0x00000004) |
| tushki7 | 0:60d829a0353a | 284 | #define USART_FLAG_FE ((uint32_t)0x00000002) |
| tushki7 | 0:60d829a0353a | 285 | #define USART_FLAG_PE ((uint32_t)0x00000001) |
| tushki7 | 0:60d829a0353a | 286 | /** |
| tushki7 | 0:60d829a0353a | 287 | * @} |
| tushki7 | 0:60d829a0353a | 288 | */ |
| tushki7 | 0:60d829a0353a | 289 | |
| tushki7 | 0:60d829a0353a | 290 | /** @defgroup USART_Interrupt_definition USART Interrupts Definition |
| tushki7 | 0:60d829a0353a | 291 | * Elements values convention: 0000ZZZZ0XXYYYYYb |
| tushki7 | 0:60d829a0353a | 292 | * - YYYYY : Interrupt source position in the XX register (5bits) |
| tushki7 | 0:60d829a0353a | 293 | * - XX : Interrupt source register (2bits) |
| tushki7 | 0:60d829a0353a | 294 | * - 01: CR1 register |
| tushki7 | 0:60d829a0353a | 295 | * - 10: CR2 register |
| tushki7 | 0:60d829a0353a | 296 | * - 11: CR3 register |
| tushki7 | 0:60d829a0353a | 297 | * - ZZZZ : Flag position in the ISR register(4bits) |
| tushki7 | 0:60d829a0353a | 298 | * @{ |
| tushki7 | 0:60d829a0353a | 299 | */ |
| tushki7 | 0:60d829a0353a | 300 | |
| tushki7 | 0:60d829a0353a | 301 | #define USART_IT_PE ((uint16_t)0x0028) |
| tushki7 | 0:60d829a0353a | 302 | #define USART_IT_TXE ((uint16_t)0x0727) |
| tushki7 | 0:60d829a0353a | 303 | #define USART_IT_TC ((uint16_t)0x0626) |
| tushki7 | 0:60d829a0353a | 304 | #define USART_IT_RXNE ((uint16_t)0x0525) |
| tushki7 | 0:60d829a0353a | 305 | #define USART_IT_IDLE ((uint16_t)0x0424) |
| tushki7 | 0:60d829a0353a | 306 | #define USART_IT_ERR ((uint16_t)0x0060) |
| tushki7 | 0:60d829a0353a | 307 | |
| tushki7 | 0:60d829a0353a | 308 | #define USART_IT_ORE ((uint16_t)0x0300) |
| tushki7 | 0:60d829a0353a | 309 | #define USART_IT_NE ((uint16_t)0x0200) |
| tushki7 | 0:60d829a0353a | 310 | #define USART_IT_FE ((uint16_t)0x0100) |
| tushki7 | 0:60d829a0353a | 311 | /** |
| tushki7 | 0:60d829a0353a | 312 | * @} |
| tushki7 | 0:60d829a0353a | 313 | */ |
| tushki7 | 0:60d829a0353a | 314 | |
| tushki7 | 0:60d829a0353a | 315 | /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags |
| tushki7 | 0:60d829a0353a | 316 | * @{ |
| tushki7 | 0:60d829a0353a | 317 | */ |
| tushki7 | 0:60d829a0353a | 318 | #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
| tushki7 | 0:60d829a0353a | 319 | #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
| tushki7 | 0:60d829a0353a | 320 | #define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ |
| tushki7 | 0:60d829a0353a | 321 | #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ |
| tushki7 | 0:60d829a0353a | 322 | #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
| tushki7 | 0:60d829a0353a | 323 | #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
| tushki7 | 0:60d829a0353a | 324 | #define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ |
| tushki7 | 0:60d829a0353a | 325 | /** |
| tushki7 | 0:60d829a0353a | 326 | * @} |
| tushki7 | 0:60d829a0353a | 327 | */ |
| tushki7 | 0:60d829a0353a | 328 | |
| tushki7 | 0:60d829a0353a | 329 | /** @defgroup USART_Request_Parameters USART Request Parameters |
| tushki7 | 0:60d829a0353a | 330 | * @{ |
| tushki7 | 0:60d829a0353a | 331 | */ |
| tushki7 | 0:60d829a0353a | 332 | #define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ |
| tushki7 | 0:60d829a0353a | 333 | #define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ |
| tushki7 | 0:60d829a0353a | 334 | #define IS_USART_REQUEST_PARAMETER(PARAM) (((PARAM) == USART_RXDATA_FLUSH_REQUEST) || \ |
| tushki7 | 0:60d829a0353a | 335 | ((PARAM) == USART_TXDATA_FLUSH_REQUEST)) |
| tushki7 | 0:60d829a0353a | 336 | /** |
| tushki7 | 0:60d829a0353a | 337 | * @} |
| tushki7 | 0:60d829a0353a | 338 | */ |
| tushki7 | 0:60d829a0353a | 339 | |
| tushki7 | 0:60d829a0353a | 340 | /** @defgroup USART_Interruption_Mask USART interruptions flag mask |
| tushki7 | 0:60d829a0353a | 341 | * @{ |
| tushki7 | 0:60d829a0353a | 342 | */ |
| tushki7 | 0:60d829a0353a | 343 | #define USART_IT_MASK ((uint16_t)0x001F) |
| tushki7 | 0:60d829a0353a | 344 | /** |
| tushki7 | 0:60d829a0353a | 345 | * @} |
| tushki7 | 0:60d829a0353a | 346 | */ |
| tushki7 | 0:60d829a0353a | 347 | |
| tushki7 | 0:60d829a0353a | 348 | /** |
| tushki7 | 0:60d829a0353a | 349 | * @} |
| tushki7 | 0:60d829a0353a | 350 | */ |
| tushki7 | 0:60d829a0353a | 351 | |
| tushki7 | 0:60d829a0353a | 352 | |
| tushki7 | 0:60d829a0353a | 353 | /* Exported macros ------------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 354 | |
| tushki7 | 0:60d829a0353a | 355 | /** @defgroup USART_Exported_Macros USART Exported Macros |
| tushki7 | 0:60d829a0353a | 356 | * @{ |
| tushki7 | 0:60d829a0353a | 357 | */ |
| tushki7 | 0:60d829a0353a | 358 | |
| tushki7 | 0:60d829a0353a | 359 | /** @brief Reset USART handle state |
| tushki7 | 0:60d829a0353a | 360 | * @param __HANDLE__: USART handle. |
| tushki7 | 0:60d829a0353a | 361 | * @retval None |
| tushki7 | 0:60d829a0353a | 362 | */ |
| tushki7 | 0:60d829a0353a | 363 | #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET) |
| tushki7 | 0:60d829a0353a | 364 | |
| tushki7 | 0:60d829a0353a | 365 | |
| tushki7 | 0:60d829a0353a | 366 | /** @brief Checks whether the specified USART flag is set or not. |
| tushki7 | 0:60d829a0353a | 367 | * @param __HANDLE__: specifies the USART Handle |
| tushki7 | 0:60d829a0353a | 368 | * @param __FLAG__: specifies the flag to check. |
| tushki7 | 0:60d829a0353a | 369 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 370 | * @arg USART_FLAG_REACK: Receive enable ackowledge flag |
| tushki7 | 0:60d829a0353a | 371 | * @arg USART_FLAG_TEACK: Transmit enable ackowledge flag |
| tushki7 | 0:60d829a0353a | 372 | * @arg USART_FLAG_BUSY: Busy flag |
| tushki7 | 0:60d829a0353a | 373 | * @arg USART_FLAG_CTS: CTS Change flag |
| tushki7 | 0:60d829a0353a | 374 | * @arg USART_FLAG_TXE: Transmit data register empty flag |
| tushki7 | 0:60d829a0353a | 375 | * @arg USART_FLAG_TC: Transmission Complete flag |
| tushki7 | 0:60d829a0353a | 376 | * @arg USART_FLAG_RXNE: Receive data register not empty flag |
| tushki7 | 0:60d829a0353a | 377 | * @arg USART_FLAG_IDLE: Idle Line detection flag |
| tushki7 | 0:60d829a0353a | 378 | * @arg USART_FLAG_ORE: OverRun Error flag |
| tushki7 | 0:60d829a0353a | 379 | * @arg USART_FLAG_NE: Noise Error flag |
| tushki7 | 0:60d829a0353a | 380 | * @arg USART_FLAG_FE: Framing Error flag |
| tushki7 | 0:60d829a0353a | 381 | * @arg USART_FLAG_PE: Parity Error flag |
| tushki7 | 0:60d829a0353a | 382 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 383 | */ |
| tushki7 | 0:60d829a0353a | 384 | #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) |
| tushki7 | 0:60d829a0353a | 385 | |
| tushki7 | 0:60d829a0353a | 386 | |
| tushki7 | 0:60d829a0353a | 387 | /** @brief Enables the specified USART interrupt. |
| tushki7 | 0:60d829a0353a | 388 | * @param __HANDLE__: specifies the USART Handle |
| tushki7 | 0:60d829a0353a | 389 | * @param __INTERRUPT__: specifies the USART interrupt source to enable. |
| tushki7 | 0:60d829a0353a | 390 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 391 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
| tushki7 | 0:60d829a0353a | 392 | * @arg USART_IT_TC: Transmission complete interrupt |
| tushki7 | 0:60d829a0353a | 393 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
| tushki7 | 0:60d829a0353a | 394 | * @arg USART_IT_IDLE: Idle line detection interrupt |
| tushki7 | 0:60d829a0353a | 395 | * @arg USART_IT_PE: Parity Error interrupt |
| tushki7 | 0:60d829a0353a | 396 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| tushki7 | 0:60d829a0353a | 397 | * @retval None |
| tushki7 | 0:60d829a0353a | 398 | */ |
| tushki7 | 0:60d829a0353a | 399 | #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
| tushki7 | 0:60d829a0353a | 400 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
| tushki7 | 0:60d829a0353a | 401 | ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) |
| tushki7 | 0:60d829a0353a | 402 | |
| tushki7 | 0:60d829a0353a | 403 | /** @brief Disables the specified USART interrupt. |
| tushki7 | 0:60d829a0353a | 404 | * @param __HANDLE__: specifies the USART Handle. |
| tushki7 | 0:60d829a0353a | 405 | * @param __INTERRUPT__: specifies the USART interrupt source to disable. |
| tushki7 | 0:60d829a0353a | 406 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 407 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
| tushki7 | 0:60d829a0353a | 408 | * @arg USART_IT_TC: Transmission complete interrupt |
| tushki7 | 0:60d829a0353a | 409 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
| tushki7 | 0:60d829a0353a | 410 | * @arg USART_IT_IDLE: Idle line detection interrupt |
| tushki7 | 0:60d829a0353a | 411 | * @arg USART_IT_PE: Parity Error interrupt |
| tushki7 | 0:60d829a0353a | 412 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| tushki7 | 0:60d829a0353a | 413 | * @retval None |
| tushki7 | 0:60d829a0353a | 414 | */ |
| tushki7 | 0:60d829a0353a | 415 | #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
| tushki7 | 0:60d829a0353a | 416 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ |
| tushki7 | 0:60d829a0353a | 417 | ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) |
| tushki7 | 0:60d829a0353a | 418 | |
| tushki7 | 0:60d829a0353a | 419 | |
| tushki7 | 0:60d829a0353a | 420 | /** @brief Checks whether the specified USART interrupt has occurred or not. |
| tushki7 | 0:60d829a0353a | 421 | * @param __HANDLE__: specifies the USART Handle |
| tushki7 | 0:60d829a0353a | 422 | * @param __IT__: specifies the USART interrupt source to check. |
| tushki7 | 0:60d829a0353a | 423 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 424 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
| tushki7 | 0:60d829a0353a | 425 | * @arg USART_IT_TC: Transmission complete interrupt |
| tushki7 | 0:60d829a0353a | 426 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
| tushki7 | 0:60d829a0353a | 427 | * @arg USART_IT_IDLE: Idle line detection interrupt |
| tushki7 | 0:60d829a0353a | 428 | * @arg USART_IT_ORE: OverRun Error interrupt |
| tushki7 | 0:60d829a0353a | 429 | * @arg USART_IT_NE: Noise Error interrupt |
| tushki7 | 0:60d829a0353a | 430 | * @arg USART_IT_FE: Framing Error interrupt |
| tushki7 | 0:60d829a0353a | 431 | * @arg USART_IT_PE: Parity Error interrupt |
| tushki7 | 0:60d829a0353a | 432 | * @retval The new state of __IT__ (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 433 | */ |
| tushki7 | 0:60d829a0353a | 434 | #define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08))) |
| tushki7 | 0:60d829a0353a | 435 | |
| tushki7 | 0:60d829a0353a | 436 | /** @brief Checks whether the specified USART interrupt source is enabled. |
| tushki7 | 0:60d829a0353a | 437 | * @param __HANDLE__: specifies the USART Handle. |
| tushki7 | 0:60d829a0353a | 438 | * @param __IT__: specifies the USART interrupt source to check. |
| tushki7 | 0:60d829a0353a | 439 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 440 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
| tushki7 | 0:60d829a0353a | 441 | * @arg USART_IT_TC: Transmission complete interrupt |
| tushki7 | 0:60d829a0353a | 442 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
| tushki7 | 0:60d829a0353a | 443 | * @arg USART_IT_IDLE: Idle line detection interrupt |
| tushki7 | 0:60d829a0353a | 444 | * @arg USART_IT_ORE: OverRun Error interrupt |
| tushki7 | 0:60d829a0353a | 445 | * @arg USART_IT_NE: Noise Error interrupt |
| tushki7 | 0:60d829a0353a | 446 | * @arg USART_IT_FE: Framing Error interrupt |
| tushki7 | 0:60d829a0353a | 447 | * @arg USART_IT_PE: Parity Error interrupt |
| tushki7 | 0:60d829a0353a | 448 | * @retval The new state of __IT__ (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 449 | */ |
| tushki7 | 0:60d829a0353a | 450 | #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \ |
| tushki7 | 0:60d829a0353a | 451 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << \ |
| tushki7 | 0:60d829a0353a | 452 | (((uint16_t)(__IT__)) & USART_IT_MASK))) |
| tushki7 | 0:60d829a0353a | 453 | |
| tushki7 | 0:60d829a0353a | 454 | |
| tushki7 | 0:60d829a0353a | 455 | /** @brief Clears the specified USART ISR flag, in setting the proper ICR register flag. |
| tushki7 | 0:60d829a0353a | 456 | * @param __HANDLE__: specifies the USART Handle. |
| tushki7 | 0:60d829a0353a | 457 | * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set |
| tushki7 | 0:60d829a0353a | 458 | * to clear the corresponding interrupt |
| tushki7 | 0:60d829a0353a | 459 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 460 | * @arg USART_CLEAR_PEF: Parity Error Clear Flag |
| tushki7 | 0:60d829a0353a | 461 | * @arg USART_CLEAR_FEF: Framing Error Clear Flag |
| tushki7 | 0:60d829a0353a | 462 | * @arg USART_CLEAR_NEF: Noise detected Clear Flag |
| tushki7 | 0:60d829a0353a | 463 | * @arg USART_CLEAR_OREF: OverRun Error Clear Flag |
| tushki7 | 0:60d829a0353a | 464 | * @arg USART_CLEAR_IDLEF: IDLE line detected Clear Flag |
| tushki7 | 0:60d829a0353a | 465 | * @arg USART_CLEAR_TCF: Transmission Complete Clear Flag |
| tushki7 | 0:60d829a0353a | 466 | * @arg USART_CLEAR_CTSF: CTS Interrupt Clear Flag |
| tushki7 | 0:60d829a0353a | 467 | * @retval None |
| tushki7 | 0:60d829a0353a | 468 | */ |
| tushki7 | 0:60d829a0353a | 469 | #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) |
| tushki7 | 0:60d829a0353a | 470 | |
| tushki7 | 0:60d829a0353a | 471 | /** @brief Set a specific USART request flag. |
| tushki7 | 0:60d829a0353a | 472 | * @param __HANDLE__: specifies the USART Handle. |
| tushki7 | 0:60d829a0353a | 473 | * @param __REQ__: specifies the request flag to set |
| tushki7 | 0:60d829a0353a | 474 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 475 | * @arg USART_RXDATA_FLUSH_REQUEST: Receive Data flush Request |
| tushki7 | 0:60d829a0353a | 476 | * @arg USART_TXDATA_FLUSH_REQUEST: Transmit data flush Request |
| tushki7 | 0:60d829a0353a | 477 | * |
| tushki7 | 0:60d829a0353a | 478 | * @retval None |
| tushki7 | 0:60d829a0353a | 479 | */ |
| tushki7 | 0:60d829a0353a | 480 | #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) |
| tushki7 | 0:60d829a0353a | 481 | |
| tushki7 | 0:60d829a0353a | 482 | /** @brief Enable USART |
| tushki7 | 0:60d829a0353a | 483 | * @param __HANDLE__: specifies the USART Handle. |
| tushki7 | 0:60d829a0353a | 484 | * @retval None |
| tushki7 | 0:60d829a0353a | 485 | */ |
| tushki7 | 0:60d829a0353a | 486 | #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
| tushki7 | 0:60d829a0353a | 487 | |
| tushki7 | 0:60d829a0353a | 488 | /** @brief Disable USART |
| tushki7 | 0:60d829a0353a | 489 | * @param __HANDLE__: specifies the USART Handle. |
| tushki7 | 0:60d829a0353a | 490 | * @retval None |
| tushki7 | 0:60d829a0353a | 491 | */ |
| tushki7 | 0:60d829a0353a | 492 | #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
| tushki7 | 0:60d829a0353a | 493 | |
| tushki7 | 0:60d829a0353a | 494 | |
| tushki7 | 0:60d829a0353a | 495 | /** @brief Check USART Baud rate |
| tushki7 | 0:60d829a0353a | 496 | * @param BAUDRATE: Baudrate specified by the user |
| tushki7 | 0:60d829a0353a | 497 | * The maximum Baud Rate is derived from the maximum clock on F3 (i.e. 72 MHz) |
| tushki7 | 0:60d829a0353a | 498 | * divided by the smallest oversampling used on the USART (i.e. 8) |
| tushki7 | 0:60d829a0353a | 499 | * @retval Test result (TRUE or FALSE) |
| tushki7 | 0:60d829a0353a | 500 | */ |
| tushki7 | 0:60d829a0353a | 501 | #define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 9000001) |
| tushki7 | 0:60d829a0353a | 502 | |
| tushki7 | 0:60d829a0353a | 503 | /** |
| tushki7 | 0:60d829a0353a | 504 | * @} |
| tushki7 | 0:60d829a0353a | 505 | */ |
| tushki7 | 0:60d829a0353a | 506 | |
| tushki7 | 0:60d829a0353a | 507 | /* Include USART HAL Extended module */ |
| tushki7 | 0:60d829a0353a | 508 | #include "stm32f3xx_hal_usart_ex.h" |
| tushki7 | 0:60d829a0353a | 509 | |
| tushki7 | 0:60d829a0353a | 510 | /* Exported functions --------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 511 | /** @addtogroup USART_Exported_Functions USART Exported Functions |
| tushki7 | 0:60d829a0353a | 512 | * @{ |
| tushki7 | 0:60d829a0353a | 513 | */ |
| tushki7 | 0:60d829a0353a | 514 | |
| tushki7 | 0:60d829a0353a | 515 | /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions |
| tushki7 | 0:60d829a0353a | 516 | * @brief Initialization and Configuration functions |
| tushki7 | 0:60d829a0353a | 517 | * @{ |
| tushki7 | 0:60d829a0353a | 518 | */ |
| tushki7 | 0:60d829a0353a | 519 | /* Initialization and de-initialization functions ****************************/ |
| tushki7 | 0:60d829a0353a | 520 | HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 521 | HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 522 | void HAL_USART_MspInit(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 523 | void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 524 | HAL_StatusTypeDef HAL_USART_CheckIdleState(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 525 | /** |
| tushki7 | 0:60d829a0353a | 526 | * @} |
| tushki7 | 0:60d829a0353a | 527 | */ |
| tushki7 | 0:60d829a0353a | 528 | |
| tushki7 | 0:60d829a0353a | 529 | /** @defgroup USART_Exported_Functions_Group2 Input and Output operation functions |
| tushki7 | 0:60d829a0353a | 530 | * @brief USART Transmit/Receive functions |
| tushki7 | 0:60d829a0353a | 531 | * @{ |
| tushki7 | 0:60d829a0353a | 532 | */ |
| tushki7 | 0:60d829a0353a | 533 | /* IO operation functions *****************************************************/ |
| tushki7 | 0:60d829a0353a | 534 | HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout); |
| tushki7 | 0:60d829a0353a | 535 | HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
| tushki7 | 0:60d829a0353a | 536 | HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
| tushki7 | 0:60d829a0353a | 537 | HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 538 | HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 539 | HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 540 | HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 541 | HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 542 | HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 543 | HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 544 | HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 545 | HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 546 | void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 547 | void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 548 | void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 549 | void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 550 | void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 551 | void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 552 | void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 553 | /** |
| tushki7 | 0:60d829a0353a | 554 | * @} |
| tushki7 | 0:60d829a0353a | 555 | */ |
| tushki7 | 0:60d829a0353a | 556 | |
| tushki7 | 0:60d829a0353a | 557 | /** @defgroup USART_Exported_Functions_Group3 Peripheral Control functions |
| tushki7 | 0:60d829a0353a | 558 | * @brief USART control functions |
| tushki7 | 0:60d829a0353a | 559 | * @{ |
| tushki7 | 0:60d829a0353a | 560 | */ |
| tushki7 | 0:60d829a0353a | 561 | /* Peripheral Control functions ***********************************************/ |
| tushki7 | 0:60d829a0353a | 562 | |
| tushki7 | 0:60d829a0353a | 563 | /* Peripheral State and Error functions ***************************************/ |
| tushki7 | 0:60d829a0353a | 564 | HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 565 | uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); |
| tushki7 | 0:60d829a0353a | 566 | /** |
| tushki7 | 0:60d829a0353a | 567 | * @} |
| tushki7 | 0:60d829a0353a | 568 | */ |
| tushki7 | 0:60d829a0353a | 569 | |
| tushki7 | 0:60d829a0353a | 570 | /** |
| tushki7 | 0:60d829a0353a | 571 | * @} |
| tushki7 | 0:60d829a0353a | 572 | */ |
| tushki7 | 0:60d829a0353a | 573 | |
| tushki7 | 0:60d829a0353a | 574 | /** |
| tushki7 | 0:60d829a0353a | 575 | * @} |
| tushki7 | 0:60d829a0353a | 576 | */ |
| tushki7 | 0:60d829a0353a | 577 | |
| tushki7 | 0:60d829a0353a | 578 | /** |
| tushki7 | 0:60d829a0353a | 579 | * @} |
| tushki7 | 0:60d829a0353a | 580 | */ |
| tushki7 | 0:60d829a0353a | 581 | |
| tushki7 | 0:60d829a0353a | 582 | #ifdef __cplusplus |
| tushki7 | 0:60d829a0353a | 583 | } |
| tushki7 | 0:60d829a0353a | 584 | #endif |
| tushki7 | 0:60d829a0353a | 585 | |
| tushki7 | 0:60d829a0353a | 586 | #endif /* __STM32F3xx_HAL_USART_H */ |
| tushki7 | 0:60d829a0353a | 587 | |
| tushki7 | 0:60d829a0353a | 588 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |