Tushar Sachdeva
A simple 128x32 graphical LCD program to quickstart with LCD on ARM mbed IoT Starter Kit. This requires mbed Applciation Shield with FRDM-K64F platform.
mbed/TARGET_NUCLEO_F302R8/stm32f3xx_hal_uart.h@1:eb68c94a8ee5, 2015-04-12 (annotated)
- Committer:
- tushki7
- Date:
- Sun Apr 12 15:45:52 2015 +0000
- Revision:
- 1:eb68c94a8ee5
- Parent:
- 0:60d829a0353a
A simple 128x32 LCD program with ARM mbed IoT Starter Kit;
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| tushki7 | 0:60d829a0353a | 1 | /** |
| tushki7 | 0:60d829a0353a | 2 | ****************************************************************************** |
| tushki7 | 0:60d829a0353a | 3 | * @file stm32f3xx_hal_uart.h |
| tushki7 | 0:60d829a0353a | 4 | * @author MCD Application Team |
| tushki7 | 0:60d829a0353a | 5 | * @version V1.1.0 |
| tushki7 | 0:60d829a0353a | 6 | * @date 12-Sept-2014 |
| tushki7 | 0:60d829a0353a | 7 | * @brief Header file of UART HAL module. |
| tushki7 | 0:60d829a0353a | 8 | ****************************************************************************** |
| tushki7 | 0:60d829a0353a | 9 | * @attention |
| tushki7 | 0:60d829a0353a | 10 | * |
| tushki7 | 0:60d829a0353a | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| tushki7 | 0:60d829a0353a | 12 | * |
| tushki7 | 0:60d829a0353a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| tushki7 | 0:60d829a0353a | 14 | * are permitted provided that the following conditions are met: |
| tushki7 | 0:60d829a0353a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| tushki7 | 0:60d829a0353a | 16 | * this list of conditions and the following disclaimer. |
| tushki7 | 0:60d829a0353a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| tushki7 | 0:60d829a0353a | 18 | * this list of conditions and the following disclaimer in the documentation |
| tushki7 | 0:60d829a0353a | 19 | * and/or other materials provided with the distribution. |
| tushki7 | 0:60d829a0353a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| tushki7 | 0:60d829a0353a | 21 | * may be used to endorse or promote products derived from this software |
| tushki7 | 0:60d829a0353a | 22 | * without specific prior written permission. |
| tushki7 | 0:60d829a0353a | 23 | * |
| tushki7 | 0:60d829a0353a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| tushki7 | 0:60d829a0353a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| tushki7 | 0:60d829a0353a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| tushki7 | 0:60d829a0353a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| tushki7 | 0:60d829a0353a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| tushki7 | 0:60d829a0353a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| tushki7 | 0:60d829a0353a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| tushki7 | 0:60d829a0353a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| tushki7 | 0:60d829a0353a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| tushki7 | 0:60d829a0353a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| tushki7 | 0:60d829a0353a | 34 | * |
| tushki7 | 0:60d829a0353a | 35 | ****************************************************************************** |
| tushki7 | 0:60d829a0353a | 36 | */ |
| tushki7 | 0:60d829a0353a | 37 | |
| tushki7 | 0:60d829a0353a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 39 | #ifndef __STM32F3xx_HAL_UART_H |
| tushki7 | 0:60d829a0353a | 40 | #define __STM32F3xx_HAL_UART_H |
| tushki7 | 0:60d829a0353a | 41 | |
| tushki7 | 0:60d829a0353a | 42 | #ifdef __cplusplus |
| tushki7 | 0:60d829a0353a | 43 | extern "C" { |
| tushki7 | 0:60d829a0353a | 44 | #endif |
| tushki7 | 0:60d829a0353a | 45 | |
| tushki7 | 0:60d829a0353a | 46 | /* Includes ------------------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 47 | #include "stm32f3xx_hal_def.h" |
| tushki7 | 0:60d829a0353a | 48 | |
| tushki7 | 0:60d829a0353a | 49 | /** @addtogroup STM32F3xx_HAL_Driver |
| tushki7 | 0:60d829a0353a | 50 | * @{ |
| tushki7 | 0:60d829a0353a | 51 | */ |
| tushki7 | 0:60d829a0353a | 52 | |
| tushki7 | 0:60d829a0353a | 53 | /** @addtogroup UART |
| tushki7 | 0:60d829a0353a | 54 | * @{ |
| tushki7 | 0:60d829a0353a | 55 | */ |
| tushki7 | 0:60d829a0353a | 56 | |
| tushki7 | 0:60d829a0353a | 57 | /* Exported types ------------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 58 | /** @defgroup UART_Exported_Types UART Exported Types |
| tushki7 | 0:60d829a0353a | 59 | * @{ |
| tushki7 | 0:60d829a0353a | 60 | */ |
| tushki7 | 0:60d829a0353a | 61 | |
| tushki7 | 0:60d829a0353a | 62 | /** |
| tushki7 | 0:60d829a0353a | 63 | * @brief UART Init Structure definition |
| tushki7 | 0:60d829a0353a | 64 | */ |
| tushki7 | 0:60d829a0353a | 65 | typedef struct |
| tushki7 | 0:60d829a0353a | 66 | { |
| tushki7 | 0:60d829a0353a | 67 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
| tushki7 | 0:60d829a0353a | 68 | The baud rate register is computed using the following formula: |
| tushki7 | 0:60d829a0353a | 69 | - If oversampling is 16 or in LIN mode, |
| tushki7 | 0:60d829a0353a | 70 | Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))) |
| tushki7 | 0:60d829a0353a | 71 | - If oversampling is 8, |
| tushki7 | 0:60d829a0353a | 72 | Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4] |
| tushki7 | 0:60d829a0353a | 73 | Baud Rate Register[3] = 0 |
| tushki7 | 0:60d829a0353a | 74 | Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */ |
| tushki7 | 0:60d829a0353a | 75 | |
| tushki7 | 0:60d829a0353a | 76 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
| tushki7 | 0:60d829a0353a | 77 | This parameter can be a value of @ref UARTEx_Word_Length */ |
| tushki7 | 0:60d829a0353a | 78 | |
| tushki7 | 0:60d829a0353a | 79 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
| tushki7 | 0:60d829a0353a | 80 | This parameter can be a value of @ref UART_Stop_Bits */ |
| tushki7 | 0:60d829a0353a | 81 | |
| tushki7 | 0:60d829a0353a | 82 | uint32_t Parity; /*!< Specifies the parity mode. |
| tushki7 | 0:60d829a0353a | 83 | This parameter can be a value of @ref UART_Parity |
| tushki7 | 0:60d829a0353a | 84 | @note When parity is enabled, the computed parity is inserted |
| tushki7 | 0:60d829a0353a | 85 | at the MSB position of the transmitted data (9th bit when |
| tushki7 | 0:60d829a0353a | 86 | the word length is set to 9 data bits; 8th bit when the |
| tushki7 | 0:60d829a0353a | 87 | word length is set to 8 data bits). */ |
| tushki7 | 0:60d829a0353a | 88 | |
| tushki7 | 0:60d829a0353a | 89 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
| tushki7 | 0:60d829a0353a | 90 | This parameter can be a value of @ref UART_Mode */ |
| tushki7 | 0:60d829a0353a | 91 | |
| tushki7 | 0:60d829a0353a | 92 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled |
| tushki7 | 0:60d829a0353a | 93 | or disabled. |
| tushki7 | 0:60d829a0353a | 94 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
| tushki7 | 0:60d829a0353a | 95 | |
| tushki7 | 0:60d829a0353a | 96 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
| tushki7 | 0:60d829a0353a | 97 | This parameter can be a value of @ref UART_Over_Sampling */ |
| tushki7 | 0:60d829a0353a | 98 | |
| tushki7 | 0:60d829a0353a | 99 | uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. |
| tushki7 | 0:60d829a0353a | 100 | Selecting the single sample method increases the receiver tolerance to clock |
| tushki7 | 0:60d829a0353a | 101 | deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ |
| tushki7 | 0:60d829a0353a | 102 | }UART_InitTypeDef; |
| tushki7 | 0:60d829a0353a | 103 | |
| tushki7 | 0:60d829a0353a | 104 | /** |
| tushki7 | 0:60d829a0353a | 105 | * @brief UART Advanced Features initalization structure definition |
| tushki7 | 0:60d829a0353a | 106 | */ |
| tushki7 | 0:60d829a0353a | 107 | typedef struct |
| tushki7 | 0:60d829a0353a | 108 | { |
| tushki7 | 0:60d829a0353a | 109 | uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several |
| tushki7 | 0:60d829a0353a | 110 | Advanced Features may be initialized at the same time . |
| tushki7 | 0:60d829a0353a | 111 | This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type */ |
| tushki7 | 0:60d829a0353a | 112 | |
| tushki7 | 0:60d829a0353a | 113 | uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. |
| tushki7 | 0:60d829a0353a | 114 | This parameter can be a value of @ref UART_Tx_Inv */ |
| tushki7 | 0:60d829a0353a | 115 | |
| tushki7 | 0:60d829a0353a | 116 | uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. |
| tushki7 | 0:60d829a0353a | 117 | This parameter can be a value of @ref UART_Rx_Inv */ |
| tushki7 | 0:60d829a0353a | 118 | |
| tushki7 | 0:60d829a0353a | 119 | uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic |
| tushki7 | 0:60d829a0353a | 120 | vs negative/inverted logic). |
| tushki7 | 0:60d829a0353a | 121 | This parameter can be a value of @ref UART_Data_Inv */ |
| tushki7 | 0:60d829a0353a | 122 | |
| tushki7 | 0:60d829a0353a | 123 | uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. |
| tushki7 | 0:60d829a0353a | 124 | This parameter can be a value of @ref UART_Rx_Tx_Swap */ |
| tushki7 | 0:60d829a0353a | 125 | |
| tushki7 | 0:60d829a0353a | 126 | uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. |
| tushki7 | 0:60d829a0353a | 127 | This parameter can be a value of @ref UART_Overrun_Disable */ |
| tushki7 | 0:60d829a0353a | 128 | |
| tushki7 | 0:60d829a0353a | 129 | uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. |
| tushki7 | 0:60d829a0353a | 130 | This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error */ |
| tushki7 | 0:60d829a0353a | 131 | |
| tushki7 | 0:60d829a0353a | 132 | uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. |
| tushki7 | 0:60d829a0353a | 133 | This parameter can be a value of @ref UART_AutoBaudRate_Enable */ |
| tushki7 | 0:60d829a0353a | 134 | |
| tushki7 | 0:60d829a0353a | 135 | uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate |
| tushki7 | 0:60d829a0353a | 136 | detection is carried out. |
| tushki7 | 0:60d829a0353a | 137 | This parameter can be a value of @ref UART_AutoBaud_Rate_Mode */ |
| tushki7 | 0:60d829a0353a | 138 | |
| tushki7 | 0:60d829a0353a | 139 | uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. |
| tushki7 | 0:60d829a0353a | 140 | This parameter can be a value of @ref UART_MSB_First */ |
| tushki7 | 0:60d829a0353a | 141 | } UART_AdvFeatureInitTypeDef; |
| tushki7 | 0:60d829a0353a | 142 | |
| tushki7 | 0:60d829a0353a | 143 | /** |
| tushki7 | 0:60d829a0353a | 144 | * @brief UART wake up from stop mode parameters |
| tushki7 | 0:60d829a0353a | 145 | */ |
| tushki7 | 0:60d829a0353a | 146 | typedef struct |
| tushki7 | 0:60d829a0353a | 147 | { |
| tushki7 | 0:60d829a0353a | 148 | uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF). |
| tushki7 | 0:60d829a0353a | 149 | This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. |
| tushki7 | 0:60d829a0353a | 150 | If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must |
| tushki7 | 0:60d829a0353a | 151 | be filled up. */ |
| tushki7 | 0:60d829a0353a | 152 | |
| tushki7 | 0:60d829a0353a | 153 | uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. |
| tushki7 | 0:60d829a0353a | 154 | This parameter can be a value of @ref UART_WakeUp_Address_Length */ |
| tushki7 | 0:60d829a0353a | 155 | |
| tushki7 | 0:60d829a0353a | 156 | uint8_t Address; /*!< UART/USART node address (7-bit long max) */ |
| tushki7 | 0:60d829a0353a | 157 | } UART_WakeUpTypeDef; |
| tushki7 | 0:60d829a0353a | 158 | |
| tushki7 | 0:60d829a0353a | 159 | /** |
| tushki7 | 0:60d829a0353a | 160 | * @brief HAL UART State structures definition |
| tushki7 | 0:60d829a0353a | 161 | */ |
| tushki7 | 0:60d829a0353a | 162 | typedef enum |
| tushki7 | 0:60d829a0353a | 163 | { |
| tushki7 | 0:60d829a0353a | 164 | HAL_UART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */ |
| tushki7 | 0:60d829a0353a | 165 | HAL_UART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| tushki7 | 0:60d829a0353a | 166 | HAL_UART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
| tushki7 | 0:60d829a0353a | 167 | HAL_UART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
| tushki7 | 0:60d829a0353a | 168 | HAL_UART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
| tushki7 | 0:60d829a0353a | 169 | HAL_UART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ |
| tushki7 | 0:60d829a0353a | 170 | HAL_UART_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| tushki7 | 0:60d829a0353a | 171 | HAL_UART_STATE_ERROR = 0x04 /*!< Error */ |
| tushki7 | 0:60d829a0353a | 172 | }HAL_UART_StateTypeDef; |
| tushki7 | 0:60d829a0353a | 173 | |
| tushki7 | 0:60d829a0353a | 174 | /** |
| tushki7 | 0:60d829a0353a | 175 | * @brief HAL UART Error Code structure definition |
| tushki7 | 0:60d829a0353a | 176 | */ |
| tushki7 | 0:60d829a0353a | 177 | typedef enum |
| tushki7 | 0:60d829a0353a | 178 | { |
| tushki7 | 0:60d829a0353a | 179 | HAL_UART_ERROR_NONE = 0x00, /*!< No error */ |
| tushki7 | 0:60d829a0353a | 180 | HAL_UART_ERROR_PE = 0x01, /*!< Parity error */ |
| tushki7 | 0:60d829a0353a | 181 | HAL_UART_ERROR_NE = 0x02, /*!< Noise error */ |
| tushki7 | 0:60d829a0353a | 182 | HAL_UART_ERROR_FE = 0x04, /*!< frame error */ |
| tushki7 | 0:60d829a0353a | 183 | HAL_UART_ERROR_ORE = 0x08, /*!< Overrun error */ |
| tushki7 | 0:60d829a0353a | 184 | HAL_UART_ERROR_DMA = 0x10 /*!< DMA transfer error */ |
| tushki7 | 0:60d829a0353a | 185 | }HAL_UART_ErrorTypeDef; |
| tushki7 | 0:60d829a0353a | 186 | |
| tushki7 | 0:60d829a0353a | 187 | /** |
| tushki7 | 0:60d829a0353a | 188 | * @brief UART clock sources definition |
| tushki7 | 0:60d829a0353a | 189 | */ |
| tushki7 | 0:60d829a0353a | 190 | typedef enum |
| tushki7 | 0:60d829a0353a | 191 | { |
| tushki7 | 0:60d829a0353a | 192 | UART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */ |
| tushki7 | 0:60d829a0353a | 193 | UART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */ |
| tushki7 | 0:60d829a0353a | 194 | UART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */ |
| tushki7 | 0:60d829a0353a | 195 | UART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */ |
| tushki7 | 0:60d829a0353a | 196 | UART_CLOCKSOURCE_LSE = 0x08, /*!< LSE clock source */ |
| tushki7 | 0:60d829a0353a | 197 | UART_CLOCKSOURCE_UNDEFINED = 0x10 /*!< Undefined clock source */ |
| tushki7 | 0:60d829a0353a | 198 | }UART_ClockSourceTypeDef; |
| tushki7 | 0:60d829a0353a | 199 | |
| tushki7 | 0:60d829a0353a | 200 | /** |
| tushki7 | 0:60d829a0353a | 201 | * @brief UART handle Structure definition |
| tushki7 | 0:60d829a0353a | 202 | */ |
| tushki7 | 0:60d829a0353a | 203 | typedef struct |
| tushki7 | 0:60d829a0353a | 204 | { |
| tushki7 | 0:60d829a0353a | 205 | USART_TypeDef *Instance; /* UART registers base address */ |
| tushki7 | 0:60d829a0353a | 206 | |
| tushki7 | 0:60d829a0353a | 207 | UART_InitTypeDef Init; /* UART communication parameters */ |
| tushki7 | 0:60d829a0353a | 208 | |
| tushki7 | 0:60d829a0353a | 209 | UART_AdvFeatureInitTypeDef AdvancedInit; /* UART Advanced Features initialization parameters */ |
| tushki7 | 0:60d829a0353a | 210 | |
| tushki7 | 0:60d829a0353a | 211 | uint8_t *pTxBuffPtr; /* Pointer to UART Tx transfer Buffer */ |
| tushki7 | 0:60d829a0353a | 212 | |
| tushki7 | 0:60d829a0353a | 213 | uint16_t TxXferSize; /* UART Tx Transfer size */ |
| tushki7 | 0:60d829a0353a | 214 | |
| tushki7 | 0:60d829a0353a | 215 | uint16_t TxXferCount; /* UART Tx Transfer Counter */ |
| tushki7 | 0:60d829a0353a | 216 | |
| tushki7 | 0:60d829a0353a | 217 | uint8_t *pRxBuffPtr; /* Pointer to UART Rx transfer Buffer */ |
| tushki7 | 0:60d829a0353a | 218 | |
| tushki7 | 0:60d829a0353a | 219 | uint16_t RxXferSize; /* UART Rx Transfer size */ |
| tushki7 | 0:60d829a0353a | 220 | |
| tushki7 | 0:60d829a0353a | 221 | uint16_t RxXferCount; /* UART Rx Transfer Counter */ |
| tushki7 | 0:60d829a0353a | 222 | |
| tushki7 | 0:60d829a0353a | 223 | uint16_t Mask; /* UART Rx RDR register mask */ |
| tushki7 | 0:60d829a0353a | 224 | |
| tushki7 | 0:60d829a0353a | 225 | DMA_HandleTypeDef *hdmatx; /* UART Tx DMA Handle parameters */ |
| tushki7 | 0:60d829a0353a | 226 | |
| tushki7 | 0:60d829a0353a | 227 | DMA_HandleTypeDef *hdmarx; /* UART Rx DMA Handle parameters */ |
| tushki7 | 0:60d829a0353a | 228 | |
| tushki7 | 0:60d829a0353a | 229 | HAL_LockTypeDef Lock; /* Locking object */ |
| tushki7 | 0:60d829a0353a | 230 | |
| tushki7 | 0:60d829a0353a | 231 | HAL_UART_StateTypeDef State; /* UART communication state */ |
| tushki7 | 0:60d829a0353a | 232 | |
| tushki7 | 0:60d829a0353a | 233 | HAL_UART_ErrorTypeDef ErrorCode; /* UART Error code */ |
| tushki7 | 0:60d829a0353a | 234 | |
| tushki7 | 0:60d829a0353a | 235 | }UART_HandleTypeDef; |
| tushki7 | 0:60d829a0353a | 236 | |
| tushki7 | 0:60d829a0353a | 237 | /** |
| tushki7 | 0:60d829a0353a | 238 | * @} |
| tushki7 | 0:60d829a0353a | 239 | */ |
| tushki7 | 0:60d829a0353a | 240 | |
| tushki7 | 0:60d829a0353a | 241 | /* Exported constants --------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 242 | /** @defgroup UART_Exported_Constants UART Exported Constants |
| tushki7 | 0:60d829a0353a | 243 | * @{ |
| tushki7 | 0:60d829a0353a | 244 | */ |
| tushki7 | 0:60d829a0353a | 245 | |
| tushki7 | 0:60d829a0353a | 246 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
| tushki7 | 0:60d829a0353a | 247 | * @{ |
| tushki7 | 0:60d829a0353a | 248 | */ |
| tushki7 | 0:60d829a0353a | 249 | #define UART_STOPBITS_1 ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 250 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
| tushki7 | 0:60d829a0353a | 251 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
| tushki7 | 0:60d829a0353a | 252 | ((STOPBITS) == UART_STOPBITS_2)) |
| tushki7 | 0:60d829a0353a | 253 | /** |
| tushki7 | 0:60d829a0353a | 254 | * @} |
| tushki7 | 0:60d829a0353a | 255 | */ |
| tushki7 | 0:60d829a0353a | 256 | |
| tushki7 | 0:60d829a0353a | 257 | /** @defgroup UART_Parity UART Parity |
| tushki7 | 0:60d829a0353a | 258 | * @{ |
| tushki7 | 0:60d829a0353a | 259 | */ |
| tushki7 | 0:60d829a0353a | 260 | #define UART_PARITY_NONE ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 261 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
| tushki7 | 0:60d829a0353a | 262 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
| tushki7 | 0:60d829a0353a | 263 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
| tushki7 | 0:60d829a0353a | 264 | ((PARITY) == UART_PARITY_EVEN) || \ |
| tushki7 | 0:60d829a0353a | 265 | ((PARITY) == UART_PARITY_ODD)) |
| tushki7 | 0:60d829a0353a | 266 | /** |
| tushki7 | 0:60d829a0353a | 267 | * @} |
| tushki7 | 0:60d829a0353a | 268 | */ |
| tushki7 | 0:60d829a0353a | 269 | |
| tushki7 | 0:60d829a0353a | 270 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
| tushki7 | 0:60d829a0353a | 271 | * @{ |
| tushki7 | 0:60d829a0353a | 272 | */ |
| tushki7 | 0:60d829a0353a | 273 | #define UART_HWCONTROL_NONE ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 274 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
| tushki7 | 0:60d829a0353a | 275 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
| tushki7 | 0:60d829a0353a | 276 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
| tushki7 | 0:60d829a0353a | 277 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
| tushki7 | 0:60d829a0353a | 278 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
| tushki7 | 0:60d829a0353a | 279 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
| tushki7 | 0:60d829a0353a | 280 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
| tushki7 | 0:60d829a0353a | 281 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
| tushki7 | 0:60d829a0353a | 282 | /** |
| tushki7 | 0:60d829a0353a | 283 | * @} |
| tushki7 | 0:60d829a0353a | 284 | */ |
| tushki7 | 0:60d829a0353a | 285 | |
| tushki7 | 0:60d829a0353a | 286 | /** @defgroup UART_Mode UART Transfer Mode |
| tushki7 | 0:60d829a0353a | 287 | * @{ |
| tushki7 | 0:60d829a0353a | 288 | */ |
| tushki7 | 0:60d829a0353a | 289 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
| tushki7 | 0:60d829a0353a | 290 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
| tushki7 | 0:60d829a0353a | 291 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
| tushki7 | 0:60d829a0353a | 292 | #define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00)) |
| tushki7 | 0:60d829a0353a | 293 | /** |
| tushki7 | 0:60d829a0353a | 294 | * @} |
| tushki7 | 0:60d829a0353a | 295 | */ |
| tushki7 | 0:60d829a0353a | 296 | |
| tushki7 | 0:60d829a0353a | 297 | /** @defgroup UART_State UART State |
| tushki7 | 0:60d829a0353a | 298 | * @{ |
| tushki7 | 0:60d829a0353a | 299 | */ |
| tushki7 | 0:60d829a0353a | 300 | #define UART_STATE_DISABLE ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 301 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
| tushki7 | 0:60d829a0353a | 302 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 303 | ((STATE) == UART_STATE_ENABLE)) |
| tushki7 | 0:60d829a0353a | 304 | /** |
| tushki7 | 0:60d829a0353a | 305 | * @} |
| tushki7 | 0:60d829a0353a | 306 | */ |
| tushki7 | 0:60d829a0353a | 307 | |
| tushki7 | 0:60d829a0353a | 308 | /** @defgroup UART_Over_Sampling UART Over Sampling |
| tushki7 | 0:60d829a0353a | 309 | * @{ |
| tushki7 | 0:60d829a0353a | 310 | */ |
| tushki7 | 0:60d829a0353a | 311 | #define UART_OVERSAMPLING_16 ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 312 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
| tushki7 | 0:60d829a0353a | 313 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
| tushki7 | 0:60d829a0353a | 314 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
| tushki7 | 0:60d829a0353a | 315 | /** |
| tushki7 | 0:60d829a0353a | 316 | * @} |
| tushki7 | 0:60d829a0353a | 317 | */ |
| tushki7 | 0:60d829a0353a | 318 | |
| tushki7 | 0:60d829a0353a | 319 | /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method |
| tushki7 | 0:60d829a0353a | 320 | * @{ |
| tushki7 | 0:60d829a0353a | 321 | */ |
| tushki7 | 0:60d829a0353a | 322 | #define UART_ONEBIT_SAMPLING_DISABLED ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 323 | #define UART_ONEBIT_SAMPLING_ENABLED ((uint32_t)USART_CR3_ONEBIT) |
| tushki7 | 0:60d829a0353a | 324 | #define IS_UART_ONEBIT_SAMPLING(ONEBIT) (((ONEBIT) == UART_ONEBIT_SAMPLING_DISABLED) || \ |
| tushki7 | 0:60d829a0353a | 325 | ((ONEBIT) == UART_ONEBIT_SAMPLING_ENABLED)) |
| tushki7 | 0:60d829a0353a | 326 | /** |
| tushki7 | 0:60d829a0353a | 327 | * @} |
| tushki7 | 0:60d829a0353a | 328 | */ |
| tushki7 | 0:60d829a0353a | 329 | |
| tushki7 | 0:60d829a0353a | 330 | /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode |
| tushki7 | 0:60d829a0353a | 331 | * @{ |
| tushki7 | 0:60d829a0353a | 332 | */ |
| tushki7 | 0:60d829a0353a | 333 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 334 | #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) |
| tushki7 | 0:60d829a0353a | 335 | #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) |
| tushki7 | 0:60d829a0353a | 336 | #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) |
| tushki7 | 0:60d829a0353a | 337 | #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ |
| tushki7 | 0:60d829a0353a | 338 | ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ |
| tushki7 | 0:60d829a0353a | 339 | ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ |
| tushki7 | 0:60d829a0353a | 340 | ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) |
| tushki7 | 0:60d829a0353a | 341 | /** |
| tushki7 | 0:60d829a0353a | 342 | * @} |
| tushki7 | 0:60d829a0353a | 343 | */ |
| tushki7 | 0:60d829a0353a | 344 | |
| tushki7 | 0:60d829a0353a | 345 | /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut |
| tushki7 | 0:60d829a0353a | 346 | * @{ |
| tushki7 | 0:60d829a0353a | 347 | */ |
| tushki7 | 0:60d829a0353a | 348 | #define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 349 | #define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN) |
| tushki7 | 0:60d829a0353a | 350 | #define IS_UART_RECEIVER_TIMEOUT(TIMEOUT) (((TIMEOUT) == UART_RECEIVER_TIMEOUT_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 351 | ((TIMEOUT) == UART_RECEIVER_TIMEOUT_ENABLE)) |
| tushki7 | 0:60d829a0353a | 352 | /** |
| tushki7 | 0:60d829a0353a | 353 | * @} |
| tushki7 | 0:60d829a0353a | 354 | */ |
| tushki7 | 0:60d829a0353a | 355 | |
| tushki7 | 0:60d829a0353a | 356 | /** @defgroup UART_LIN UART Local Interconnection Network mode |
| tushki7 | 0:60d829a0353a | 357 | * @{ |
| tushki7 | 0:60d829a0353a | 358 | */ |
| tushki7 | 0:60d829a0353a | 359 | #define UART_LIN_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 360 | #define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) |
| tushki7 | 0:60d829a0353a | 361 | #define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 362 | ((LIN) == UART_LIN_ENABLE)) |
| tushki7 | 0:60d829a0353a | 363 | /** |
| tushki7 | 0:60d829a0353a | 364 | * @} |
| tushki7 | 0:60d829a0353a | 365 | */ |
| tushki7 | 0:60d829a0353a | 366 | |
| tushki7 | 0:60d829a0353a | 367 | /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection |
| tushki7 | 0:60d829a0353a | 368 | * @{ |
| tushki7 | 0:60d829a0353a | 369 | */ |
| tushki7 | 0:60d829a0353a | 370 | #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 371 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
| tushki7 | 0:60d829a0353a | 372 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
| tushki7 | 0:60d829a0353a | 373 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
| tushki7 | 0:60d829a0353a | 374 | /** |
| tushki7 | 0:60d829a0353a | 375 | * @} |
| tushki7 | 0:60d829a0353a | 376 | */ |
| tushki7 | 0:60d829a0353a | 377 | |
| tushki7 | 0:60d829a0353a | 378 | |
| tushki7 | 0:60d829a0353a | 379 | |
| tushki7 | 0:60d829a0353a | 380 | /** @defgroup UART_One_Bit UART One Bit sampling |
| tushki7 | 0:60d829a0353a | 381 | * @{ |
| tushki7 | 0:60d829a0353a | 382 | */ |
| tushki7 | 0:60d829a0353a | 383 | #define UART_ONE_BIT_SAMPLE_DISABLED ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 384 | #define UART_ONE_BIT_SAMPLE_ENABLED ((uint32_t)USART_CR3_ONEBIT) |
| tushki7 | 0:60d829a0353a | 385 | #define IS_UART_ONEBIT_SAMPLE(ONEBIT) (((ONEBIT) == UART_ONE_BIT_SAMPLE_DISABLED) || \ |
| tushki7 | 0:60d829a0353a | 386 | ((ONEBIT) == UART_ONE_BIT_SAMPLE_ENABLED)) |
| tushki7 | 0:60d829a0353a | 387 | /** |
| tushki7 | 0:60d829a0353a | 388 | * @} |
| tushki7 | 0:60d829a0353a | 389 | */ |
| tushki7 | 0:60d829a0353a | 390 | |
| tushki7 | 0:60d829a0353a | 391 | /** @defgroup UART_DMA_Tx UART DMA Tx |
| tushki7 | 0:60d829a0353a | 392 | * @{ |
| tushki7 | 0:60d829a0353a | 393 | */ |
| tushki7 | 0:60d829a0353a | 394 | #define UART_DMA_TX_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 395 | #define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) |
| tushki7 | 0:60d829a0353a | 396 | #define IS_UART_DMA_TX(DMATX) (((DMATX) == UART_DMA_TX_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 397 | ((DMATX) == UART_DMA_TX_ENABLE)) |
| tushki7 | 0:60d829a0353a | 398 | /** |
| tushki7 | 0:60d829a0353a | 399 | * @} |
| tushki7 | 0:60d829a0353a | 400 | */ |
| tushki7 | 0:60d829a0353a | 401 | |
| tushki7 | 0:60d829a0353a | 402 | /** @defgroup UART_DMA_Rx UART DMA Rx |
| tushki7 | 0:60d829a0353a | 403 | * @{ |
| tushki7 | 0:60d829a0353a | 404 | */ |
| tushki7 | 0:60d829a0353a | 405 | #define UART_DMA_RX_DISABLE ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 406 | #define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) |
| tushki7 | 0:60d829a0353a | 407 | #define IS_UART_DMA_RX(DMARX) (((DMARX) == UART_DMA_RX_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 408 | ((DMARX) == UART_DMA_RX_ENABLE)) |
| tushki7 | 0:60d829a0353a | 409 | /** |
| tushki7 | 0:60d829a0353a | 410 | * @} |
| tushki7 | 0:60d829a0353a | 411 | */ |
| tushki7 | 0:60d829a0353a | 412 | |
| tushki7 | 0:60d829a0353a | 413 | /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection |
| tushki7 | 0:60d829a0353a | 414 | * @{ |
| tushki7 | 0:60d829a0353a | 415 | */ |
| tushki7 | 0:60d829a0353a | 416 | #define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 417 | #define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL) |
| tushki7 | 0:60d829a0353a | 418 | #define IS_UART_HALF_DUPLEX(HDSEL) (((HDSEL) == UART_HALF_DUPLEX_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 419 | ((HDSEL) == UART_HALF_DUPLEX_ENABLE)) |
| tushki7 | 0:60d829a0353a | 420 | /** |
| tushki7 | 0:60d829a0353a | 421 | * @} |
| tushki7 | 0:60d829a0353a | 422 | */ |
| tushki7 | 0:60d829a0353a | 423 | |
| tushki7 | 0:60d829a0353a | 424 | /** @defgroup UART_WakeUp_Methods UART WakeUp Methods |
| tushki7 | 0:60d829a0353a | 425 | * @{ |
| tushki7 | 0:60d829a0353a | 426 | */ |
| tushki7 | 0:60d829a0353a | 427 | #define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 428 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
| tushki7 | 0:60d829a0353a | 429 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
| tushki7 | 0:60d829a0353a | 430 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
| tushki7 | 0:60d829a0353a | 431 | /** |
| tushki7 | 0:60d829a0353a | 432 | * @} |
| tushki7 | 0:60d829a0353a | 433 | */ |
| tushki7 | 0:60d829a0353a | 434 | |
| tushki7 | 0:60d829a0353a | 435 | /** @defgroup UART_Flags UART Status Flags |
| tushki7 | 0:60d829a0353a | 436 | * Elements values convention: 0xXXXX |
| tushki7 | 0:60d829a0353a | 437 | * - 0xXXXX : Flag mask in the ISR register |
| tushki7 | 0:60d829a0353a | 438 | * @{ |
| tushki7 | 0:60d829a0353a | 439 | */ |
| tushki7 | 0:60d829a0353a | 440 | #define UART_FLAG_REACK ((uint32_t)0x00400000) |
| tushki7 | 0:60d829a0353a | 441 | #define UART_FLAG_TEACK ((uint32_t)0x00200000) |
| tushki7 | 0:60d829a0353a | 442 | #define UART_FLAG_WUF ((uint32_t)0x00100000) |
| tushki7 | 0:60d829a0353a | 443 | #define UART_FLAG_RWU ((uint32_t)0x00080000) |
| tushki7 | 0:60d829a0353a | 444 | #define UART_FLAG_SBKF ((uint32_t)0x00040000 |
| tushki7 | 0:60d829a0353a | 445 | #define UART_FLAG_CMF ((uint32_t)0x00020000) |
| tushki7 | 0:60d829a0353a | 446 | #define UART_FLAG_BUSY ((uint32_t)0x00010000) |
| tushki7 | 0:60d829a0353a | 447 | #define UART_FLAG_ABRF ((uint32_t)0x00008000) |
| tushki7 | 0:60d829a0353a | 448 | #define UART_FLAG_ABRE ((uint32_t)0x00004000) |
| tushki7 | 0:60d829a0353a | 449 | #define UART_FLAG_EOBF ((uint32_t)0x00001000) |
| tushki7 | 0:60d829a0353a | 450 | #define UART_FLAG_RTOF ((uint32_t)0x00000800) |
| tushki7 | 0:60d829a0353a | 451 | #define UART_FLAG_CTS ((uint32_t)0x00000400) |
| tushki7 | 0:60d829a0353a | 452 | #define UART_FLAG_CTSIF ((uint32_t)0x00000200) |
| tushki7 | 0:60d829a0353a | 453 | #define UART_FLAG_LBDF ((uint32_t)0x00000100) |
| tushki7 | 0:60d829a0353a | 454 | #define UART_FLAG_TXE ((uint32_t)0x00000080) |
| tushki7 | 0:60d829a0353a | 455 | #define UART_FLAG_TC ((uint32_t)0x00000040) |
| tushki7 | 0:60d829a0353a | 456 | #define UART_FLAG_RXNE ((uint32_t)0x00000020) |
| tushki7 | 0:60d829a0353a | 457 | #define UART_FLAG_IDLE ((uint32_t)0x00000010) |
| tushki7 | 0:60d829a0353a | 458 | #define UART_FLAG_ORE ((uint32_t)0x00000008) |
| tushki7 | 0:60d829a0353a | 459 | #define UART_FLAG_NE ((uint32_t)0x00000004) |
| tushki7 | 0:60d829a0353a | 460 | #define UART_FLAG_FE ((uint32_t)0x00000002) |
| tushki7 | 0:60d829a0353a | 461 | #define UART_FLAG_PE ((uint32_t)0x00000001) |
| tushki7 | 0:60d829a0353a | 462 | /** |
| tushki7 | 0:60d829a0353a | 463 | * @} |
| tushki7 | 0:60d829a0353a | 464 | */ |
| tushki7 | 0:60d829a0353a | 465 | |
| tushki7 | 0:60d829a0353a | 466 | /** @defgroup UART_Interrupt_definition UART Interrupts Definition |
| tushki7 | 0:60d829a0353a | 467 | * Elements values convention: 0000ZZZZ0XXYYYYYb |
| tushki7 | 0:60d829a0353a | 468 | * - YYYYY : Interrupt source position in the XX register (5bits) |
| tushki7 | 0:60d829a0353a | 469 | * - XX : Interrupt source register (2bits) |
| tushki7 | 0:60d829a0353a | 470 | * - 01: CR1 register |
| tushki7 | 0:60d829a0353a | 471 | * - 10: CR2 register |
| tushki7 | 0:60d829a0353a | 472 | * - 11: CR3 register |
| tushki7 | 0:60d829a0353a | 473 | * - ZZZZ : Flag position in the ISR register(4bits) |
| tushki7 | 0:60d829a0353a | 474 | * @{ |
| tushki7 | 0:60d829a0353a | 475 | */ |
| tushki7 | 0:60d829a0353a | 476 | #define UART_IT_PE ((uint16_t)0x0028) |
| tushki7 | 0:60d829a0353a | 477 | #define UART_IT_TXE ((uint16_t)0x0727) |
| tushki7 | 0:60d829a0353a | 478 | #define UART_IT_TC ((uint16_t)0x0626) |
| tushki7 | 0:60d829a0353a | 479 | #define UART_IT_RXNE ((uint16_t)0x0525) |
| tushki7 | 0:60d829a0353a | 480 | #define UART_IT_IDLE ((uint16_t)0x0424) |
| tushki7 | 0:60d829a0353a | 481 | #define UART_IT_LBD ((uint16_t)0x0846) |
| tushki7 | 0:60d829a0353a | 482 | #define UART_IT_CTS ((uint16_t)0x096A) |
| tushki7 | 0:60d829a0353a | 483 | #define UART_IT_CM ((uint16_t)0x142E) |
| tushki7 | 0:60d829a0353a | 484 | #define UART_IT_WUF ((uint16_t)0x1476) |
| tushki7 | 0:60d829a0353a | 485 | |
| tushki7 | 0:60d829a0353a | 486 | /** Elements values convention: 000000000XXYYYYYb |
| tushki7 | 0:60d829a0353a | 487 | * - YYYYY : Interrupt source position in the XX register (5bits) |
| tushki7 | 0:60d829a0353a | 488 | * - XX : Interrupt source register (2bits) |
| tushki7 | 0:60d829a0353a | 489 | * - 01: CR1 register |
| tushki7 | 0:60d829a0353a | 490 | * - 10: CR2 register |
| tushki7 | 0:60d829a0353a | 491 | * - 11: CR3 register |
| tushki7 | 0:60d829a0353a | 492 | */ |
| tushki7 | 0:60d829a0353a | 493 | #define UART_IT_ERR ((uint16_t)0x0060) |
| tushki7 | 0:60d829a0353a | 494 | |
| tushki7 | 0:60d829a0353a | 495 | /** Elements values convention: 0000ZZZZ00000000b |
| tushki7 | 0:60d829a0353a | 496 | * - ZZZZ : Flag position in the ISR register(4bits) |
| tushki7 | 0:60d829a0353a | 497 | */ |
| tushki7 | 0:60d829a0353a | 498 | #define UART_IT_ORE ((uint16_t)0x0300) |
| tushki7 | 0:60d829a0353a | 499 | #define UART_IT_NE ((uint16_t)0x0200) |
| tushki7 | 0:60d829a0353a | 500 | #define UART_IT_FE ((uint16_t)0x0100) |
| tushki7 | 0:60d829a0353a | 501 | /** |
| tushki7 | 0:60d829a0353a | 502 | * @} |
| tushki7 | 0:60d829a0353a | 503 | */ |
| tushki7 | 0:60d829a0353a | 504 | |
| tushki7 | 0:60d829a0353a | 505 | /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags |
| tushki7 | 0:60d829a0353a | 506 | * @{ |
| tushki7 | 0:60d829a0353a | 507 | */ |
| tushki7 | 0:60d829a0353a | 508 | #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
| tushki7 | 0:60d829a0353a | 509 | #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
| tushki7 | 0:60d829a0353a | 510 | #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ |
| tushki7 | 0:60d829a0353a | 511 | #define UART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ |
| tushki7 | 0:60d829a0353a | 512 | #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
| tushki7 | 0:60d829a0353a | 513 | #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
| tushki7 | 0:60d829a0353a | 514 | #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ |
| tushki7 | 0:60d829a0353a | 515 | #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ |
| tushki7 | 0:60d829a0353a | 516 | #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */ |
| tushki7 | 0:60d829a0353a | 517 | #define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */ |
| tushki7 | 0:60d829a0353a | 518 | #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ |
| tushki7 | 0:60d829a0353a | 519 | #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ |
| tushki7 | 0:60d829a0353a | 520 | /** |
| tushki7 | 0:60d829a0353a | 521 | * @} |
| tushki7 | 0:60d829a0353a | 522 | */ |
| tushki7 | 0:60d829a0353a | 523 | |
| tushki7 | 0:60d829a0353a | 524 | /** @defgroup UART_Request_Parameters UART Request Parameters |
| tushki7 | 0:60d829a0353a | 525 | * @{ |
| tushki7 | 0:60d829a0353a | 526 | */ |
| tushki7 | 0:60d829a0353a | 527 | #define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */ |
| tushki7 | 0:60d829a0353a | 528 | #define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */ |
| tushki7 | 0:60d829a0353a | 529 | #define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */ |
| tushki7 | 0:60d829a0353a | 530 | #define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ |
| tushki7 | 0:60d829a0353a | 531 | #define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ |
| tushki7 | 0:60d829a0353a | 532 | #define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) || \ |
| tushki7 | 0:60d829a0353a | 533 | ((PARAM) == UART_SENDBREAK_REQUEST) || \ |
| tushki7 | 0:60d829a0353a | 534 | ((PARAM) == UART_MUTE_MODE_REQUEST) || \ |
| tushki7 | 0:60d829a0353a | 535 | ((PARAM) == UART_RXDATA_FLUSH_REQUEST) || \ |
| tushki7 | 0:60d829a0353a | 536 | ((PARAM) == UART_TXDATA_FLUSH_REQUEST)) |
| tushki7 | 0:60d829a0353a | 537 | /** |
| tushki7 | 0:60d829a0353a | 538 | * @} |
| tushki7 | 0:60d829a0353a | 539 | */ |
| tushki7 | 0:60d829a0353a | 540 | |
| tushki7 | 0:60d829a0353a | 541 | /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type |
| tushki7 | 0:60d829a0353a | 542 | * @{ |
| tushki7 | 0:60d829a0353a | 543 | */ |
| tushki7 | 0:60d829a0353a | 544 | #define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 545 | #define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001) |
| tushki7 | 0:60d829a0353a | 546 | #define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002) |
| tushki7 | 0:60d829a0353a | 547 | #define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004) |
| tushki7 | 0:60d829a0353a | 548 | #define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008) |
| tushki7 | 0:60d829a0353a | 549 | #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010) |
| tushki7 | 0:60d829a0353a | 550 | #define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020) |
| tushki7 | 0:60d829a0353a | 551 | #define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040) |
| tushki7 | 0:60d829a0353a | 552 | #define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080) |
| tushki7 | 0:60d829a0353a | 553 | #define IS_UART_ADVFEATURE_INIT(INIT) ((INIT) <= (UART_ADVFEATURE_NO_INIT | \ |
| tushki7 | 0:60d829a0353a | 554 | UART_ADVFEATURE_TXINVERT_INIT | \ |
| tushki7 | 0:60d829a0353a | 555 | UART_ADVFEATURE_RXINVERT_INIT | \ |
| tushki7 | 0:60d829a0353a | 556 | UART_ADVFEATURE_DATAINVERT_INIT | \ |
| tushki7 | 0:60d829a0353a | 557 | UART_ADVFEATURE_SWAP_INIT | \ |
| tushki7 | 0:60d829a0353a | 558 | UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ |
| tushki7 | 0:60d829a0353a | 559 | UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ |
| tushki7 | 0:60d829a0353a | 560 | UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ |
| tushki7 | 0:60d829a0353a | 561 | UART_ADVFEATURE_MSBFIRST_INIT)) |
| tushki7 | 0:60d829a0353a | 562 | /** |
| tushki7 | 0:60d829a0353a | 563 | * @} |
| tushki7 | 0:60d829a0353a | 564 | */ |
| tushki7 | 0:60d829a0353a | 565 | |
| tushki7 | 0:60d829a0353a | 566 | /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion |
| tushki7 | 0:60d829a0353a | 567 | * @{ |
| tushki7 | 0:60d829a0353a | 568 | */ |
| tushki7 | 0:60d829a0353a | 569 | #define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 570 | #define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV) |
| tushki7 | 0:60d829a0353a | 571 | #define IS_UART_ADVFEATURE_TXINV(TXINV) (((TXINV) == UART_ADVFEATURE_TXINV_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 572 | ((TXINV) == UART_ADVFEATURE_TXINV_ENABLE)) |
| tushki7 | 0:60d829a0353a | 573 | /** |
| tushki7 | 0:60d829a0353a | 574 | * @} |
| tushki7 | 0:60d829a0353a | 575 | */ |
| tushki7 | 0:60d829a0353a | 576 | |
| tushki7 | 0:60d829a0353a | 577 | /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion |
| tushki7 | 0:60d829a0353a | 578 | * @{ |
| tushki7 | 0:60d829a0353a | 579 | */ |
| tushki7 | 0:60d829a0353a | 580 | #define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 581 | #define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV) |
| tushki7 | 0:60d829a0353a | 582 | #define IS_UART_ADVFEATURE_RXINV(RXINV) (((RXINV) == UART_ADVFEATURE_RXINV_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 583 | ((RXINV) == UART_ADVFEATURE_RXINV_ENABLE)) |
| tushki7 | 0:60d829a0353a | 584 | /** |
| tushki7 | 0:60d829a0353a | 585 | * @} |
| tushki7 | 0:60d829a0353a | 586 | */ |
| tushki7 | 0:60d829a0353a | 587 | |
| tushki7 | 0:60d829a0353a | 588 | /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion |
| tushki7 | 0:60d829a0353a | 589 | * @{ |
| tushki7 | 0:60d829a0353a | 590 | */ |
| tushki7 | 0:60d829a0353a | 591 | #define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 592 | #define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV) |
| tushki7 | 0:60d829a0353a | 593 | #define IS_UART_ADVFEATURE_DATAINV(DATAINV) (((DATAINV) == UART_ADVFEATURE_DATAINV_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 594 | ((DATAINV) == UART_ADVFEATURE_DATAINV_ENABLE)) |
| tushki7 | 0:60d829a0353a | 595 | /** |
| tushki7 | 0:60d829a0353a | 596 | * @} |
| tushki7 | 0:60d829a0353a | 597 | */ |
| tushki7 | 0:60d829a0353a | 598 | |
| tushki7 | 0:60d829a0353a | 599 | /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap |
| tushki7 | 0:60d829a0353a | 600 | * @{ |
| tushki7 | 0:60d829a0353a | 601 | */ |
| tushki7 | 0:60d829a0353a | 602 | #define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 603 | #define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP) |
| tushki7 | 0:60d829a0353a | 604 | #define IS_UART_ADVFEATURE_SWAP(SWAP) (((SWAP) == UART_ADVFEATURE_SWAP_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 605 | ((SWAP) == UART_ADVFEATURE_SWAP_ENABLE)) |
| tushki7 | 0:60d829a0353a | 606 | /** |
| tushki7 | 0:60d829a0353a | 607 | * @} |
| tushki7 | 0:60d829a0353a | 608 | */ |
| tushki7 | 0:60d829a0353a | 609 | |
| tushki7 | 0:60d829a0353a | 610 | /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable |
| tushki7 | 0:60d829a0353a | 611 | * @{ |
| tushki7 | 0:60d829a0353a | 612 | */ |
| tushki7 | 0:60d829a0353a | 613 | #define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 614 | #define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS) |
| tushki7 | 0:60d829a0353a | 615 | #define IS_UART_OVERRUN(OVERRUN) (((OVERRUN) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ |
| tushki7 | 0:60d829a0353a | 616 | ((OVERRUN) == UART_ADVFEATURE_OVERRUN_DISABLE)) |
| tushki7 | 0:60d829a0353a | 617 | /** |
| tushki7 | 0:60d829a0353a | 618 | * @} |
| tushki7 | 0:60d829a0353a | 619 | */ |
| tushki7 | 0:60d829a0353a | 620 | |
| tushki7 | 0:60d829a0353a | 621 | /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable |
| tushki7 | 0:60d829a0353a | 622 | * @{ |
| tushki7 | 0:60d829a0353a | 623 | */ |
| tushki7 | 0:60d829a0353a | 624 | #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 625 | #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN) |
| tushki7 | 0:60d829a0353a | 626 | #define IS_UART_ADVFEATURE_AUTOBAUDRATE(AUTOBAUDRATE) (((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 627 | ((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) |
| tushki7 | 0:60d829a0353a | 628 | /** |
| tushki7 | 0:60d829a0353a | 629 | * @} |
| tushki7 | 0:60d829a0353a | 630 | */ |
| tushki7 | 0:60d829a0353a | 631 | |
| tushki7 | 0:60d829a0353a | 632 | /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error |
| tushki7 | 0:60d829a0353a | 633 | * @{ |
| tushki7 | 0:60d829a0353a | 634 | */ |
| tushki7 | 0:60d829a0353a | 635 | #define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 636 | #define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE) |
| tushki7 | 0:60d829a0353a | 637 | #define IS_UART_ADVFEATURE_DMAONRXERROR(DMA) (((DMA) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ |
| tushki7 | 0:60d829a0353a | 638 | ((DMA) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) |
| tushki7 | 0:60d829a0353a | 639 | /** |
| tushki7 | 0:60d829a0353a | 640 | * @} |
| tushki7 | 0:60d829a0353a | 641 | */ |
| tushki7 | 0:60d829a0353a | 642 | |
| tushki7 | 0:60d829a0353a | 643 | /** @defgroup UART_MSB_First UART Advanced Feature MSB First |
| tushki7 | 0:60d829a0353a | 644 | * @{ |
| tushki7 | 0:60d829a0353a | 645 | */ |
| tushki7 | 0:60d829a0353a | 646 | #define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 647 | #define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST) |
| tushki7 | 0:60d829a0353a | 648 | #define IS_UART_ADVFEATURE_MSBFIRST(MSBFIRST) (((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 649 | ((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_ENABLE)) |
| tushki7 | 0:60d829a0353a | 650 | /** |
| tushki7 | 0:60d829a0353a | 651 | * @} |
| tushki7 | 0:60d829a0353a | 652 | */ |
| tushki7 | 0:60d829a0353a | 653 | |
| tushki7 | 0:60d829a0353a | 654 | /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable |
| tushki7 | 0:60d829a0353a | 655 | * @{ |
| tushki7 | 0:60d829a0353a | 656 | */ |
| tushki7 | 0:60d829a0353a | 657 | #define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 658 | #define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) |
| tushki7 | 0:60d829a0353a | 659 | #define IS_UART_ADVFEATURE_STOPMODE(STOPMODE) (((STOPMODE) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 660 | ((STOPMODE) == UART_ADVFEATURE_STOPMODE_ENABLE)) |
| tushki7 | 0:60d829a0353a | 661 | /** |
| tushki7 | 0:60d829a0353a | 662 | * @} |
| tushki7 | 0:60d829a0353a | 663 | */ |
| tushki7 | 0:60d829a0353a | 664 | |
| tushki7 | 0:60d829a0353a | 665 | /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable |
| tushki7 | 0:60d829a0353a | 666 | * @{ |
| tushki7 | 0:60d829a0353a | 667 | */ |
| tushki7 | 0:60d829a0353a | 668 | #define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 669 | #define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME) |
| tushki7 | 0:60d829a0353a | 670 | #define IS_UART_MUTE_MODE(MUTE) (((MUTE) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ |
| tushki7 | 0:60d829a0353a | 671 | ((MUTE) == UART_ADVFEATURE_MUTEMODE_ENABLE)) |
| tushki7 | 0:60d829a0353a | 672 | /** |
| tushki7 | 0:60d829a0353a | 673 | * @} |
| tushki7 | 0:60d829a0353a | 674 | */ |
| tushki7 | 0:60d829a0353a | 675 | |
| tushki7 | 0:60d829a0353a | 676 | /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register |
| tushki7 | 0:60d829a0353a | 677 | * @{ |
| tushki7 | 0:60d829a0353a | 678 | */ |
| tushki7 | 0:60d829a0353a | 679 | #define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24) |
| tushki7 | 0:60d829a0353a | 680 | /** |
| tushki7 | 0:60d829a0353a | 681 | * @} |
| tushki7 | 0:60d829a0353a | 682 | */ |
| tushki7 | 0:60d829a0353a | 683 | |
| tushki7 | 0:60d829a0353a | 684 | /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection |
| tushki7 | 0:60d829a0353a | 685 | * @{ |
| tushki7 | 0:60d829a0353a | 686 | */ |
| tushki7 | 0:60d829a0353a | 687 | #define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x0000) |
| tushki7 | 0:60d829a0353a | 688 | #define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) |
| tushki7 | 0:60d829a0353a | 689 | #define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) |
| tushki7 | 0:60d829a0353a | 690 | #define IS_UART_WAKEUP_SELECTION(WAKE) (((WAKE) == UART_WAKEUP_ON_ADDRESS) || \ |
| tushki7 | 0:60d829a0353a | 691 | ((WAKE) == UART_WAKEUP_ON_STARTBIT) || \ |
| tushki7 | 0:60d829a0353a | 692 | ((WAKE) == UART_WAKEUP_ON_READDATA_NONEMPTY)) |
| tushki7 | 0:60d829a0353a | 693 | /** |
| tushki7 | 0:60d829a0353a | 694 | * @} |
| tushki7 | 0:60d829a0353a | 695 | */ |
| tushki7 | 0:60d829a0353a | 696 | |
| tushki7 | 0:60d829a0353a | 697 | /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity |
| tushki7 | 0:60d829a0353a | 698 | * @{ |
| tushki7 | 0:60d829a0353a | 699 | */ |
| tushki7 | 0:60d829a0353a | 700 | #define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 701 | #define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP) |
| tushki7 | 0:60d829a0353a | 702 | #define IS_UART_DE_POLARITY(POLARITY) (((POLARITY) == UART_DE_POLARITY_HIGH) || \ |
| tushki7 | 0:60d829a0353a | 703 | ((POLARITY) == UART_DE_POLARITY_LOW)) |
| tushki7 | 0:60d829a0353a | 704 | /** |
| tushki7 | 0:60d829a0353a | 705 | * @} |
| tushki7 | 0:60d829a0353a | 706 | */ |
| tushki7 | 0:60d829a0353a | 707 | |
| tushki7 | 0:60d829a0353a | 708 | /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register |
| tushki7 | 0:60d829a0353a | 709 | * @{ |
| tushki7 | 0:60d829a0353a | 710 | */ |
| tushki7 | 0:60d829a0353a | 711 | #define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21) |
| tushki7 | 0:60d829a0353a | 712 | /** |
| tushki7 | 0:60d829a0353a | 713 | * @} |
| tushki7 | 0:60d829a0353a | 714 | */ |
| tushki7 | 0:60d829a0353a | 715 | |
| tushki7 | 0:60d829a0353a | 716 | /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register |
| tushki7 | 0:60d829a0353a | 717 | * @{ |
| tushki7 | 0:60d829a0353a | 718 | */ |
| tushki7 | 0:60d829a0353a | 719 | #define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16) |
| tushki7 | 0:60d829a0353a | 720 | /** |
| tushki7 | 0:60d829a0353a | 721 | * @} |
| tushki7 | 0:60d829a0353a | 722 | */ |
| tushki7 | 0:60d829a0353a | 723 | |
| tushki7 | 0:60d829a0353a | 724 | /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask |
| tushki7 | 0:60d829a0353a | 725 | * @{ |
| tushki7 | 0:60d829a0353a | 726 | */ |
| tushki7 | 0:60d829a0353a | 727 | #define UART_IT_MASK ((uint32_t)0x001F) |
| tushki7 | 0:60d829a0353a | 728 | /** |
| tushki7 | 0:60d829a0353a | 729 | * @} |
| tushki7 | 0:60d829a0353a | 730 | */ |
| tushki7 | 0:60d829a0353a | 731 | |
| tushki7 | 0:60d829a0353a | 732 | /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value |
| tushki7 | 0:60d829a0353a | 733 | * @{ |
| tushki7 | 0:60d829a0353a | 734 | */ |
| tushki7 | 0:60d829a0353a | 735 | #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFF |
| tushki7 | 0:60d829a0353a | 736 | /** |
| tushki7 | 0:60d829a0353a | 737 | * @} |
| tushki7 | 0:60d829a0353a | 738 | */ |
| tushki7 | 0:60d829a0353a | 739 | |
| tushki7 | 0:60d829a0353a | 740 | /** |
| tushki7 | 0:60d829a0353a | 741 | * @} |
| tushki7 | 0:60d829a0353a | 742 | */ |
| tushki7 | 0:60d829a0353a | 743 | |
| tushki7 | 0:60d829a0353a | 744 | /* Exported macros -----------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 745 | /** @defgroup UART_Exported_Macros UART Exported Macros |
| tushki7 | 0:60d829a0353a | 746 | * @{ |
| tushki7 | 0:60d829a0353a | 747 | */ |
| tushki7 | 0:60d829a0353a | 748 | |
| tushki7 | 0:60d829a0353a | 749 | /** @brief Reset UART handle state |
| tushki7 | 0:60d829a0353a | 750 | * @param __HANDLE__: UART handle. |
| tushki7 | 0:60d829a0353a | 751 | * @retval None |
| tushki7 | 0:60d829a0353a | 752 | */ |
| tushki7 | 0:60d829a0353a | 753 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET) |
| tushki7 | 0:60d829a0353a | 754 | |
| tushki7 | 0:60d829a0353a | 755 | /** @brief Checks whether the specified UART flag is set or not. |
| tushki7 | 0:60d829a0353a | 756 | * @param __HANDLE__: specifies the UART Handle. |
| tushki7 | 0:60d829a0353a | 757 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5 to select the USART or |
| tushki7 | 0:60d829a0353a | 758 | * UART peripheral (datasheet: up to five USART/UARTs) |
| tushki7 | 0:60d829a0353a | 759 | * @param __FLAG__: specifies the flag to check. |
| tushki7 | 0:60d829a0353a | 760 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 761 | * @arg UART_FLAG_REACK: Receive enable ackowledge flag |
| tushki7 | 0:60d829a0353a | 762 | * @arg UART_FLAG_TEACK: Transmit enable ackowledge flag |
| tushki7 | 0:60d829a0353a | 763 | * @arg UART_FLAG_WUF: Wake up from stop mode flag |
| tushki7 | 0:60d829a0353a | 764 | * @arg UART_FLAG_RWU: Receiver wake up flag (is the UART in mute mode) |
| tushki7 | 0:60d829a0353a | 765 | * @arg UART_FLAG_SBKF: Send Break flag |
| tushki7 | 0:60d829a0353a | 766 | * @arg UART_FLAG_CMF: Character match flag |
| tushki7 | 0:60d829a0353a | 767 | * @arg UART_FLAG_BUSY: Busy flag |
| tushki7 | 0:60d829a0353a | 768 | * @arg UART_FLAG_ABRF: Auto Baud rate detection flag |
| tushki7 | 0:60d829a0353a | 769 | * @arg UART_FLAG_ABRE: Auto Baud rate detection error flag |
| tushki7 | 0:60d829a0353a | 770 | * @arg UART_FLAG_EOBF: End of block flag |
| tushki7 | 0:60d829a0353a | 771 | * @arg UART_FLAG_RTOF: Receiver timeout flag |
| tushki7 | 0:60d829a0353a | 772 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
| tushki7 | 0:60d829a0353a | 773 | * @arg UART_FLAG_LBD: LIN Break detection flag |
| tushki7 | 0:60d829a0353a | 774 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
| tushki7 | 0:60d829a0353a | 775 | * @arg UART_FLAG_TC: Transmission Complete flag |
| tushki7 | 0:60d829a0353a | 776 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
| tushki7 | 0:60d829a0353a | 777 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
| tushki7 | 0:60d829a0353a | 778 | * @arg UART_FLAG_ORE: OverRun Error flag |
| tushki7 | 0:60d829a0353a | 779 | * @arg UART_FLAG_NE: Noise Error flag |
| tushki7 | 0:60d829a0353a | 780 | * @arg UART_FLAG_FE: Framing Error flag |
| tushki7 | 0:60d829a0353a | 781 | * @arg UART_FLAG_PE: Parity Error flag |
| tushki7 | 0:60d829a0353a | 782 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 783 | */ |
| tushki7 | 0:60d829a0353a | 784 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) |
| tushki7 | 0:60d829a0353a | 785 | |
| tushki7 | 0:60d829a0353a | 786 | /** @brief Enables the specified UART interrupt. |
| tushki7 | 0:60d829a0353a | 787 | * @param __HANDLE__: specifies the UART Handle. |
| tushki7 | 0:60d829a0353a | 788 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5 to select the USART or |
| tushki7 | 0:60d829a0353a | 789 | * UART peripheral. (datasheet: up to five USART/UARTs) |
| tushki7 | 0:60d829a0353a | 790 | * @param __INTERRUPT__: specifies the UART interrupt source to enable. |
| tushki7 | 0:60d829a0353a | 791 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 792 | * @arg UART_IT_WUF: Wakeup from stop mode interrupt |
| tushki7 | 0:60d829a0353a | 793 | * @arg UART_IT_CM: Character match interrupt |
| tushki7 | 0:60d829a0353a | 794 | * @arg UART_IT_CTS: CTS change interrupt |
| tushki7 | 0:60d829a0353a | 795 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| tushki7 | 0:60d829a0353a | 796 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| tushki7 | 0:60d829a0353a | 797 | * @arg UART_IT_TC: Transmission complete interrupt |
| tushki7 | 0:60d829a0353a | 798 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| tushki7 | 0:60d829a0353a | 799 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| tushki7 | 0:60d829a0353a | 800 | * @arg UART_IT_PE: Parity Error interrupt |
| tushki7 | 0:60d829a0353a | 801 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| tushki7 | 0:60d829a0353a | 802 | * @retval None |
| tushki7 | 0:60d829a0353a | 803 | */ |
| tushki7 | 0:60d829a0353a | 804 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ |
| tushki7 | 0:60d829a0353a | 805 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ |
| tushki7 | 0:60d829a0353a | 806 | ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) |
| tushki7 | 0:60d829a0353a | 807 | |
| tushki7 | 0:60d829a0353a | 808 | |
| tushki7 | 0:60d829a0353a | 809 | /** @brief Disables the specified UART interrupt. |
| tushki7 | 0:60d829a0353a | 810 | * @param __HANDLE__: specifies the UART Handle. |
| tushki7 | 0:60d829a0353a | 811 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5 to select the USART or |
| tushki7 | 0:60d829a0353a | 812 | * UART peripheral. (datasheet: up to five USART/UARTs) |
| tushki7 | 0:60d829a0353a | 813 | * @param __INTERRUPT__: specifies the UART interrupt source to disable. |
| tushki7 | 0:60d829a0353a | 814 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 815 | * @arg UART_IT_WUF: Wakeup from stop mode interrupt |
| tushki7 | 0:60d829a0353a | 816 | * @arg UART_IT_CM: Character match interrupt |
| tushki7 | 0:60d829a0353a | 817 | * @arg UART_IT_CTS: CTS change interrupt |
| tushki7 | 0:60d829a0353a | 818 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| tushki7 | 0:60d829a0353a | 819 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| tushki7 | 0:60d829a0353a | 820 | * @arg UART_IT_TC: Transmission complete interrupt |
| tushki7 | 0:60d829a0353a | 821 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| tushki7 | 0:60d829a0353a | 822 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| tushki7 | 0:60d829a0353a | 823 | * @arg UART_IT_PE: Parity Error interrupt |
| tushki7 | 0:60d829a0353a | 824 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| tushki7 | 0:60d829a0353a | 825 | * @retval None |
| tushki7 | 0:60d829a0353a | 826 | */ |
| tushki7 | 0:60d829a0353a | 827 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ |
| tushki7 | 0:60d829a0353a | 828 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ |
| tushki7 | 0:60d829a0353a | 829 | ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) |
| tushki7 | 0:60d829a0353a | 830 | |
| tushki7 | 0:60d829a0353a | 831 | /** @brief Checks whether the specified UART interrupt has occurred or not. |
| tushki7 | 0:60d829a0353a | 832 | * @param __HANDLE__: specifies the UART Handle. |
| tushki7 | 0:60d829a0353a | 833 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5 to select the USART or |
| tushki7 | 0:60d829a0353a | 834 | * UART peripheral. (datasheet: up to five USART/UARTs) |
| tushki7 | 0:60d829a0353a | 835 | * @param __IT__: specifies the UART interrupt to check. |
| tushki7 | 0:60d829a0353a | 836 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 837 | * @arg UART_IT_WUF: Wakeup from stop mode interrupt |
| tushki7 | 0:60d829a0353a | 838 | * @arg UART_IT_CM: Character match interrupt |
| tushki7 | 0:60d829a0353a | 839 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
| tushki7 | 0:60d829a0353a | 840 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| tushki7 | 0:60d829a0353a | 841 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| tushki7 | 0:60d829a0353a | 842 | * @arg UART_IT_TC: Transmission complete interrupt |
| tushki7 | 0:60d829a0353a | 843 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| tushki7 | 0:60d829a0353a | 844 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| tushki7 | 0:60d829a0353a | 845 | * @arg UART_IT_ORE: OverRun Error interrupt |
| tushki7 | 0:60d829a0353a | 846 | * @arg UART_IT_NE: Noise Error interrupt |
| tushki7 | 0:60d829a0353a | 847 | * @arg UART_IT_FE: Framing Error interrupt |
| tushki7 | 0:60d829a0353a | 848 | * @arg UART_IT_PE: Parity Error interrupt |
| tushki7 | 0:60d829a0353a | 849 | * @retval The new state of __IT__ (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 850 | */ |
| tushki7 | 0:60d829a0353a | 851 | #define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08))) |
| tushki7 | 0:60d829a0353a | 852 | |
| tushki7 | 0:60d829a0353a | 853 | /** @brief Checks whether the specified UART interrupt source is enabled. |
| tushki7 | 0:60d829a0353a | 854 | * @param __HANDLE__: specifies the UART Handle. |
| tushki7 | 0:60d829a0353a | 855 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5 to select the USART or |
| tushki7 | 0:60d829a0353a | 856 | * UART peripheral. (datasheet: up to five USART/UARTs) |
| tushki7 | 0:60d829a0353a | 857 | * @param __IT__: specifies the UART interrupt source to check. |
| tushki7 | 0:60d829a0353a | 858 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 859 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
| tushki7 | 0:60d829a0353a | 860 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| tushki7 | 0:60d829a0353a | 861 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| tushki7 | 0:60d829a0353a | 862 | * @arg UART_IT_TC: Transmission complete interrupt |
| tushki7 | 0:60d829a0353a | 863 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| tushki7 | 0:60d829a0353a | 864 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| tushki7 | 0:60d829a0353a | 865 | * @arg UART_IT_ORE: OverRun Error interrupt |
| tushki7 | 0:60d829a0353a | 866 | * @arg UART_IT_NE: Noise Error interrupt |
| tushki7 | 0:60d829a0353a | 867 | * @arg UART_IT_FE: Framing Error interrupt |
| tushki7 | 0:60d829a0353a | 868 | * @arg UART_IT_PE: Parity Error interrupt |
| tushki7 | 0:60d829a0353a | 869 | * @retval The new state of __IT__ (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 870 | */ |
| tushki7 | 0:60d829a0353a | 871 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2)? \ |
| tushki7 | 0:60d829a0353a | 872 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK))) |
| tushki7 | 0:60d829a0353a | 873 | |
| tushki7 | 0:60d829a0353a | 874 | /** @brief Clears the specified UART ISR flag, in setting the proper ICR register flag. |
| tushki7 | 0:60d829a0353a | 875 | * @param __HANDLE__: specifies the UART Handle. |
| tushki7 | 0:60d829a0353a | 876 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5 to select the USART or |
| tushki7 | 0:60d829a0353a | 877 | * UART peripheral. (datasheet: up to five USART/UARTs) |
| tushki7 | 0:60d829a0353a | 878 | * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set |
| tushki7 | 0:60d829a0353a | 879 | * to clear the corresponding interrupt |
| tushki7 | 0:60d829a0353a | 880 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 881 | * @arg UART_CLEAR_PEF: Parity Error Clear Flag |
| tushki7 | 0:60d829a0353a | 882 | * @arg UART_CLEAR_FEF: Framing Error Clear Flag |
| tushki7 | 0:60d829a0353a | 883 | * @arg UART_CLEAR_NEF: Noise detected Clear Flag |
| tushki7 | 0:60d829a0353a | 884 | * @arg UART_CLEAR_OREF: OverRun Error Clear Flag |
| tushki7 | 0:60d829a0353a | 885 | * @arg UART_CLEAR_IDLEF: IDLE line detected Clear Flag |
| tushki7 | 0:60d829a0353a | 886 | * @arg UART_CLEAR_TCF: Transmission Complete Clear Flag |
| tushki7 | 0:60d829a0353a | 887 | * @arg UART_CLEAR_LBDF: LIN Break Detection Clear Flag |
| tushki7 | 0:60d829a0353a | 888 | * @arg UART_CLEAR_CTSF: CTS Interrupt Clear Flag |
| tushki7 | 0:60d829a0353a | 889 | * @arg UART_CLEAR_RTOF: Receiver Time Out Clear Flag |
| tushki7 | 0:60d829a0353a | 890 | * @arg UART_CLEAR_EOBF: End Of Block Clear Flag |
| tushki7 | 0:60d829a0353a | 891 | * @arg UART_CLEAR_CMF: Character Match Clear Flag |
| tushki7 | 0:60d829a0353a | 892 | * @arg UART_CLEAR_WUF: Wake Up from stop mode Clear Flag |
| tushki7 | 0:60d829a0353a | 893 | * @retval None |
| tushki7 | 0:60d829a0353a | 894 | */ |
| tushki7 | 0:60d829a0353a | 895 | #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) |
| tushki7 | 0:60d829a0353a | 896 | |
| tushki7 | 0:60d829a0353a | 897 | /** @brief Set a specific UART request flag. |
| tushki7 | 0:60d829a0353a | 898 | * @param __HANDLE__: specifies the UART Handle. |
| tushki7 | 0:60d829a0353a | 899 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5 to select the USART or |
| tushki7 | 0:60d829a0353a | 900 | * UART peripheral. (datasheet: up to five USART/UARTs) |
| tushki7 | 0:60d829a0353a | 901 | * @param __REQ__: specifies the request flag to set |
| tushki7 | 0:60d829a0353a | 902 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 903 | * @arg UART_AUTOBAUD_REQUEST: Auto-Baud Rate Request |
| tushki7 | 0:60d829a0353a | 904 | * @arg UART_SENDBREAK_REQUEST: Send Break Request |
| tushki7 | 0:60d829a0353a | 905 | * @arg UART_MUTE_MODE_REQUEST: Mute Mode Request |
| tushki7 | 0:60d829a0353a | 906 | * @arg UART_RXDATA_FLUSH_REQUEST: Receive Data flush Request |
| tushki7 | 0:60d829a0353a | 907 | * @arg UART_TXDATA_FLUSH_REQUEST: Transmit data flush Request |
| tushki7 | 0:60d829a0353a | 908 | * @retval None |
| tushki7 | 0:60d829a0353a | 909 | */ |
| tushki7 | 0:60d829a0353a | 910 | #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__)) |
| tushki7 | 0:60d829a0353a | 911 | |
| tushki7 | 0:60d829a0353a | 912 | /** @brief Enable UART |
| tushki7 | 0:60d829a0353a | 913 | * @param __HANDLE__: specifies the UART Handle. |
| tushki7 | 0:60d829a0353a | 914 | * The Handle Instance can be UARTx where x: 1, 2, 3, 4 or 5 to select the UART peripheral |
| tushki7 | 0:60d829a0353a | 915 | * @retval None |
| tushki7 | 0:60d829a0353a | 916 | */ |
| tushki7 | 0:60d829a0353a | 917 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
| tushki7 | 0:60d829a0353a | 918 | |
| tushki7 | 0:60d829a0353a | 919 | /** @brief Disable UART |
| tushki7 | 0:60d829a0353a | 920 | * @param __HANDLE__: specifies the UART Handle. |
| tushki7 | 0:60d829a0353a | 921 | * The Handle Instance can be UARTx where x: 1, 2, 3, 4 or 5 to select the UART peripheral |
| tushki7 | 0:60d829a0353a | 922 | * @retval None |
| tushki7 | 0:60d829a0353a | 923 | */ |
| tushki7 | 0:60d829a0353a | 924 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
| tushki7 | 0:60d829a0353a | 925 | |
| tushki7 | 0:60d829a0353a | 926 | /** @brief BRR division operation to set BRR register in 8-bit oversampling mode |
| tushki7 | 0:60d829a0353a | 927 | * @param _PCLK_: UART clock |
| tushki7 | 0:60d829a0353a | 928 | * @param _BAUD_: Baud rate set by the user |
| tushki7 | 0:60d829a0353a | 929 | * @retval Division result |
| tushki7 | 0:60d829a0353a | 930 | */ |
| tushki7 | 0:60d829a0353a | 931 | #define __DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*2)/((_BAUD_))) |
| tushki7 | 0:60d829a0353a | 932 | |
| tushki7 | 0:60d829a0353a | 933 | /** @brief BRR division operation to set BRR register in 16-bit oversampling mode |
| tushki7 | 0:60d829a0353a | 934 | * @param _PCLK_: UART clock |
| tushki7 | 0:60d829a0353a | 935 | * @param _BAUD_: Baud rate set by the user |
| tushki7 | 0:60d829a0353a | 936 | * @retval Division result |
| tushki7 | 0:60d829a0353a | 937 | */ |
| tushki7 | 0:60d829a0353a | 938 | #define __DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_))/((_BAUD_))) |
| tushki7 | 0:60d829a0353a | 939 | |
| tushki7 | 0:60d829a0353a | 940 | /** @brief Check UART Baud rate |
| tushki7 | 0:60d829a0353a | 941 | * @param BAUDRATE: Baudrate specified by the user |
| tushki7 | 0:60d829a0353a | 942 | * The maximum Baud Rate is derived from the maximum clock on F3 (i.e. 72 MHz) |
| tushki7 | 0:60d829a0353a | 943 | * divided by the smallest oversampling used on the USART (i.e. 8) |
| tushki7 | 0:60d829a0353a | 944 | * @retval Test result (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 945 | */ |
| tushki7 | 0:60d829a0353a | 946 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 9000001) |
| tushki7 | 0:60d829a0353a | 947 | |
| tushki7 | 0:60d829a0353a | 948 | /** @brief Check UART assertion time |
| tushki7 | 0:60d829a0353a | 949 | * @param TIME: 5-bit value assertion time |
| tushki7 | 0:60d829a0353a | 950 | * @retval Test result (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 951 | */ |
| tushki7 | 0:60d829a0353a | 952 | #define IS_UART_ASSERTIONTIME(TIME) ((TIME) <= 0x1F) |
| tushki7 | 0:60d829a0353a | 953 | |
| tushki7 | 0:60d829a0353a | 954 | /** @brief Check UART deassertion time |
| tushki7 | 0:60d829a0353a | 955 | * @param TIME: 5-bit value deassertion time |
| tushki7 | 0:60d829a0353a | 956 | * @retval Test result (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 957 | */ |
| tushki7 | 0:60d829a0353a | 958 | #define IS_UART_DEASSERTIONTIME(TIME) ((TIME) <= 0x1F) |
| tushki7 | 0:60d829a0353a | 959 | |
| tushki7 | 0:60d829a0353a | 960 | /** |
| tushki7 | 0:60d829a0353a | 961 | * @} |
| tushki7 | 0:60d829a0353a | 962 | */ |
| tushki7 | 0:60d829a0353a | 963 | |
| tushki7 | 0:60d829a0353a | 964 | /* Include UART HAL Extended module */ |
| tushki7 | 0:60d829a0353a | 965 | #include "stm32f3xx_hal_uart_ex.h" |
| tushki7 | 0:60d829a0353a | 966 | |
| tushki7 | 0:60d829a0353a | 967 | /* Exported functions --------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 968 | /** @addtogroup UART_Exported_Functions UART Exported Functions |
| tushki7 | 0:60d829a0353a | 969 | * @{ |
| tushki7 | 0:60d829a0353a | 970 | */ |
| tushki7 | 0:60d829a0353a | 971 | |
| tushki7 | 0:60d829a0353a | 972 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
| tushki7 | 0:60d829a0353a | 973 | * @brief Initialization and Configuration functions |
| tushki7 | 0:60d829a0353a | 974 | * @{ |
| tushki7 | 0:60d829a0353a | 975 | */ |
| tushki7 | 0:60d829a0353a | 976 | /* Initialization and de-initialization functions ****************************/ |
| tushki7 | 0:60d829a0353a | 977 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 978 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 979 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
| tushki7 | 0:60d829a0353a | 980 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
| tushki7 | 0:60d829a0353a | 981 | HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 982 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 983 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 984 | /** |
| tushki7 | 0:60d829a0353a | 985 | * @} |
| tushki7 | 0:60d829a0353a | 986 | */ |
| tushki7 | 0:60d829a0353a | 987 | |
| tushki7 | 0:60d829a0353a | 988 | /** @addtogroup UART_Exported_Functions_Group2 Input and Output operation functions |
| tushki7 | 0:60d829a0353a | 989 | * @brief UART Transmit/Receive functions |
| tushki7 | 0:60d829a0353a | 990 | * @{ |
| tushki7 | 0:60d829a0353a | 991 | */ |
| tushki7 | 0:60d829a0353a | 992 | /* IO operation functions *****************************************************/ |
| tushki7 | 0:60d829a0353a | 993 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| tushki7 | 0:60d829a0353a | 994 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| tushki7 | 0:60d829a0353a | 995 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 996 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 997 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 998 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| tushki7 | 0:60d829a0353a | 999 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1000 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1001 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1002 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1003 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1004 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1005 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1006 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1007 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1008 | void HAL_UART_WakeupCallback(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1009 | |
| tushki7 | 0:60d829a0353a | 1010 | HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
| tushki7 | 0:60d829a0353a | 1011 | /** |
| tushki7 | 0:60d829a0353a | 1012 | * @} |
| tushki7 | 0:60d829a0353a | 1013 | */ |
| tushki7 | 0:60d829a0353a | 1014 | |
| tushki7 | 0:60d829a0353a | 1015 | /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions |
| tushki7 | 0:60d829a0353a | 1016 | * @brief UART control functions |
| tushki7 | 0:60d829a0353a | 1017 | * @{ |
| tushki7 | 0:60d829a0353a | 1018 | */ |
| tushki7 | 0:60d829a0353a | 1019 | /* Peripheral Control functions ***********************************************/ |
| tushki7 | 0:60d829a0353a | 1020 | HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1021 | HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1022 | void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1023 | HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1024 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1025 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1026 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1027 | |
| tushki7 | 0:60d829a0353a | 1028 | HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1029 | void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1030 | void UART_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); |
| tushki7 | 0:60d829a0353a | 1031 | /** |
| tushki7 | 0:60d829a0353a | 1032 | * @} |
| tushki7 | 0:60d829a0353a | 1033 | */ |
| tushki7 | 0:60d829a0353a | 1034 | |
| tushki7 | 0:60d829a0353a | 1035 | /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions |
| tushki7 | 0:60d829a0353a | 1036 | * @brief Peripheral State and Error functions |
| tushki7 | 0:60d829a0353a | 1037 | * @{ |
| tushki7 | 0:60d829a0353a | 1038 | */ |
| tushki7 | 0:60d829a0353a | 1039 | /* Peripheral State and Error functions ***************************************/ |
| tushki7 | 0:60d829a0353a | 1040 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1041 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
| tushki7 | 0:60d829a0353a | 1042 | /** |
| tushki7 | 0:60d829a0353a | 1043 | * @} |
| tushki7 | 0:60d829a0353a | 1044 | */ |
| tushki7 | 0:60d829a0353a | 1045 | |
| tushki7 | 0:60d829a0353a | 1046 | /** |
| tushki7 | 0:60d829a0353a | 1047 | * @} |
| tushki7 | 0:60d829a0353a | 1048 | */ |
| tushki7 | 0:60d829a0353a | 1049 | |
| tushki7 | 0:60d829a0353a | 1050 | /** |
| tushki7 | 0:60d829a0353a | 1051 | * @} |
| tushki7 | 0:60d829a0353a | 1052 | */ |
| tushki7 | 0:60d829a0353a | 1053 | |
| tushki7 | 0:60d829a0353a | 1054 | /** |
| tushki7 | 0:60d829a0353a | 1055 | * @} |
| tushki7 | 0:60d829a0353a | 1056 | */ |
| tushki7 | 0:60d829a0353a | 1057 | |
| tushki7 | 0:60d829a0353a | 1058 | #ifdef __cplusplus |
| tushki7 | 0:60d829a0353a | 1059 | } |
| tushki7 | 0:60d829a0353a | 1060 | #endif |
| tushki7 | 0:60d829a0353a | 1061 | |
| tushki7 | 0:60d829a0353a | 1062 | #endif /* __STM32F3xx_HAL_UART_H */ |
| tushki7 | 0:60d829a0353a | 1063 | |
| tushki7 | 0:60d829a0353a | 1064 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |