Tushar Sachdeva
A simple 128x32 graphical LCD program to quickstart with LCD on ARM mbed IoT Starter Kit. This requires mbed Applciation Shield with FRDM-K64F platform.
mbed/TARGET_NUCLEO_F091RC/stm32f0xx_hal_smbus.h@1:eb68c94a8ee5, 2015-04-12 (annotated)
- Committer:
- tushki7
- Date:
- Sun Apr 12 15:45:52 2015 +0000
- Revision:
- 1:eb68c94a8ee5
- Parent:
- 0:60d829a0353a
A simple 128x32 LCD program with ARM mbed IoT Starter Kit;
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| tushki7 | 0:60d829a0353a | 1 | /** |
| tushki7 | 0:60d829a0353a | 2 | ****************************************************************************** |
| tushki7 | 0:60d829a0353a | 3 | * @file stm32f0xx_hal_smbus.h |
| tushki7 | 0:60d829a0353a | 4 | * @author MCD Application Team |
| tushki7 | 0:60d829a0353a | 5 | * @version V1.2.0 |
| tushki7 | 0:60d829a0353a | 6 | * @date 11-December-2014 |
| tushki7 | 0:60d829a0353a | 7 | * @brief Header file of SMBUS HAL module. |
| tushki7 | 0:60d829a0353a | 8 | ****************************************************************************** |
| tushki7 | 0:60d829a0353a | 9 | * @attention |
| tushki7 | 0:60d829a0353a | 10 | * |
| tushki7 | 0:60d829a0353a | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| tushki7 | 0:60d829a0353a | 12 | * |
| tushki7 | 0:60d829a0353a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| tushki7 | 0:60d829a0353a | 14 | * are permitted provided that the following conditions are met: |
| tushki7 | 0:60d829a0353a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| tushki7 | 0:60d829a0353a | 16 | * this list of conditions and the following disclaimer. |
| tushki7 | 0:60d829a0353a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| tushki7 | 0:60d829a0353a | 18 | * this list of conditions and the following disclaimer in the documentation |
| tushki7 | 0:60d829a0353a | 19 | * and/or other materials provided with the distribution. |
| tushki7 | 0:60d829a0353a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| tushki7 | 0:60d829a0353a | 21 | * may be used to endorse or promote products derived from this software |
| tushki7 | 0:60d829a0353a | 22 | * without specific prior written permission. |
| tushki7 | 0:60d829a0353a | 23 | * |
| tushki7 | 0:60d829a0353a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| tushki7 | 0:60d829a0353a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| tushki7 | 0:60d829a0353a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| tushki7 | 0:60d829a0353a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| tushki7 | 0:60d829a0353a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| tushki7 | 0:60d829a0353a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| tushki7 | 0:60d829a0353a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| tushki7 | 0:60d829a0353a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| tushki7 | 0:60d829a0353a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| tushki7 | 0:60d829a0353a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| tushki7 | 0:60d829a0353a | 34 | * |
| tushki7 | 0:60d829a0353a | 35 | ****************************************************************************** |
| tushki7 | 0:60d829a0353a | 36 | */ |
| tushki7 | 0:60d829a0353a | 37 | |
| tushki7 | 0:60d829a0353a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 39 | #ifndef __STM32F0xx_HAL_SMBUS_H |
| tushki7 | 0:60d829a0353a | 40 | #define __STM32F0xx_HAL_SMBUS_H |
| tushki7 | 0:60d829a0353a | 41 | |
| tushki7 | 0:60d829a0353a | 42 | #ifdef __cplusplus |
| tushki7 | 0:60d829a0353a | 43 | extern "C" { |
| tushki7 | 0:60d829a0353a | 44 | #endif |
| tushki7 | 0:60d829a0353a | 45 | |
| tushki7 | 0:60d829a0353a | 46 | /* Includes ------------------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 47 | #include "stm32f0xx_hal_def.h" |
| tushki7 | 0:60d829a0353a | 48 | |
| tushki7 | 0:60d829a0353a | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
| tushki7 | 0:60d829a0353a | 50 | * @{ |
| tushki7 | 0:60d829a0353a | 51 | */ |
| tushki7 | 0:60d829a0353a | 52 | |
| tushki7 | 0:60d829a0353a | 53 | /** @addtogroup SMBUS |
| tushki7 | 0:60d829a0353a | 54 | * @{ |
| tushki7 | 0:60d829a0353a | 55 | */ |
| tushki7 | 0:60d829a0353a | 56 | |
| tushki7 | 0:60d829a0353a | 57 | /* Exported types ------------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 58 | /** @defgroup SMBUS_Exported_Types SMBUS Exported Types |
| tushki7 | 0:60d829a0353a | 59 | * @{ |
| tushki7 | 0:60d829a0353a | 60 | */ |
| tushki7 | 0:60d829a0353a | 61 | |
| tushki7 | 0:60d829a0353a | 62 | /** |
| tushki7 | 0:60d829a0353a | 63 | * @brief SMBUS Configuration Structure definition |
| tushki7 | 0:60d829a0353a | 64 | */ |
| tushki7 | 0:60d829a0353a | 65 | typedef struct |
| tushki7 | 0:60d829a0353a | 66 | { |
| tushki7 | 0:60d829a0353a | 67 | uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value. |
| tushki7 | 0:60d829a0353a | 68 | This parameter calculated by referring to SMBUS initialization |
| tushki7 | 0:60d829a0353a | 69 | section in Reference manual */ |
| tushki7 | 0:60d829a0353a | 70 | uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not. |
| tushki7 | 0:60d829a0353a | 71 | This parameter can be a a value of @ref SMBUS_Analog_Filter */ |
| tushki7 | 0:60d829a0353a | 72 | |
| tushki7 | 0:60d829a0353a | 73 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
| tushki7 | 0:60d829a0353a | 74 | This parameter can be a 7-bit or 10-bit address. */ |
| tushki7 | 0:60d829a0353a | 75 | |
| tushki7 | 0:60d829a0353a | 76 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected. |
| tushki7 | 0:60d829a0353a | 77 | This parameter can be a value of @ref SMBUS_addressing_mode */ |
| tushki7 | 0:60d829a0353a | 78 | |
| tushki7 | 0:60d829a0353a | 79 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
| tushki7 | 0:60d829a0353a | 80 | This parameter can be a value of @ref SMBUS_dual_addressing_mode */ |
| tushki7 | 0:60d829a0353a | 81 | |
| tushki7 | 0:60d829a0353a | 82 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
| tushki7 | 0:60d829a0353a | 83 | This parameter can be a 7-bit address. */ |
| tushki7 | 0:60d829a0353a | 84 | |
| tushki7 | 0:60d829a0353a | 85 | uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected |
| tushki7 | 0:60d829a0353a | 86 | This parameter can be a value of @ref SMBUS_own_address2_masks. */ |
| tushki7 | 0:60d829a0353a | 87 | |
| tushki7 | 0:60d829a0353a | 88 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
| tushki7 | 0:60d829a0353a | 89 | This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */ |
| tushki7 | 0:60d829a0353a | 90 | |
| tushki7 | 0:60d829a0353a | 91 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
| tushki7 | 0:60d829a0353a | 92 | This parameter can be a value of @ref SMBUS_nostretch_mode */ |
| tushki7 | 0:60d829a0353a | 93 | |
| tushki7 | 0:60d829a0353a | 94 | uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected. |
| tushki7 | 0:60d829a0353a | 95 | This parameter can be a value of @ref SMBUS_packet_error_check_mode */ |
| tushki7 | 0:60d829a0353a | 96 | |
| tushki7 | 0:60d829a0353a | 97 | uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected. |
| tushki7 | 0:60d829a0353a | 98 | This parameter can be a value of @ref SMBUS_peripheral_mode */ |
| tushki7 | 0:60d829a0353a | 99 | |
| tushki7 | 0:60d829a0353a | 100 | uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value. |
| tushki7 | 0:60d829a0353a | 101 | (Enable bits and different timeout values) |
| tushki7 | 0:60d829a0353a | 102 | This parameter calculated by referring to SMBUS initialization |
| tushki7 | 0:60d829a0353a | 103 | section in Reference manual */ |
| tushki7 | 0:60d829a0353a | 104 | } SMBUS_InitTypeDef; |
| tushki7 | 0:60d829a0353a | 105 | |
| tushki7 | 0:60d829a0353a | 106 | /** |
| tushki7 | 0:60d829a0353a | 107 | * @brief SMBUS handle Structure definition |
| tushki7 | 0:60d829a0353a | 108 | */ |
| tushki7 | 0:60d829a0353a | 109 | typedef struct |
| tushki7 | 0:60d829a0353a | 110 | { |
| tushki7 | 0:60d829a0353a | 111 | I2C_TypeDef *Instance; /*!< SMBUS registers base address */ |
| tushki7 | 0:60d829a0353a | 112 | |
| tushki7 | 0:60d829a0353a | 113 | SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */ |
| tushki7 | 0:60d829a0353a | 114 | |
| tushki7 | 0:60d829a0353a | 115 | uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */ |
| tushki7 | 0:60d829a0353a | 116 | |
| tushki7 | 0:60d829a0353a | 117 | uint16_t XferSize; /*!< SMBUS transfer size */ |
| tushki7 | 0:60d829a0353a | 118 | |
| tushki7 | 0:60d829a0353a | 119 | __IO uint16_t XferCount; /*!< SMBUS transfer counter */ |
| tushki7 | 0:60d829a0353a | 120 | |
| tushki7 | 0:60d829a0353a | 121 | __IO uint32_t XferOptions; /*!< SMBUS transfer options */ |
| tushki7 | 0:60d829a0353a | 122 | |
| tushki7 | 0:60d829a0353a | 123 | __IO uint32_t PreviousState; /*!< SMBUS communication Previous state |
| tushki7 | 0:60d829a0353a | 124 | This parameter can be a value of @ref SMBUS_State */ |
| tushki7 | 0:60d829a0353a | 125 | |
| tushki7 | 0:60d829a0353a | 126 | HAL_LockTypeDef Lock; /*!< SMBUS locking object */ |
| tushki7 | 0:60d829a0353a | 127 | |
| tushki7 | 0:60d829a0353a | 128 | __IO uint32_t State; /*!< SMBUS communication state |
| tushki7 | 0:60d829a0353a | 129 | This parameter can be a value of @ref SMBUS_State */ |
| tushki7 | 0:60d829a0353a | 130 | |
| tushki7 | 0:60d829a0353a | 131 | __IO uint32_t ErrorCode; /*!< SMBUS Error code |
| tushki7 | 0:60d829a0353a | 132 | This parameter can be a value of @ref SMBUS_Error */ |
| tushki7 | 0:60d829a0353a | 133 | |
| tushki7 | 0:60d829a0353a | 134 | }SMBUS_HandleTypeDef; |
| tushki7 | 0:60d829a0353a | 135 | /** |
| tushki7 | 0:60d829a0353a | 136 | * @} |
| tushki7 | 0:60d829a0353a | 137 | */ |
| tushki7 | 0:60d829a0353a | 138 | |
| tushki7 | 0:60d829a0353a | 139 | /* Exported constants --------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 140 | |
| tushki7 | 0:60d829a0353a | 141 | /** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants |
| tushki7 | 0:60d829a0353a | 142 | * @{ |
| tushki7 | 0:60d829a0353a | 143 | */ |
| tushki7 | 0:60d829a0353a | 144 | |
| tushki7 | 0:60d829a0353a | 145 | /** @defgroup SMBUS_Error SMBUS Error |
| tushki7 | 0:60d829a0353a | 146 | * @{ |
| tushki7 | 0:60d829a0353a | 147 | */ |
| tushki7 | 0:60d829a0353a | 148 | #define HAL_SMBUS_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| tushki7 | 0:60d829a0353a | 149 | #define HAL_SMBUS_ERROR_BERR ((uint32_t)0x00000001) /*!< BERR error */ |
| tushki7 | 0:60d829a0353a | 150 | #define HAL_SMBUS_ERROR_ARLO ((uint32_t)0x00000002) /*!< ARLO error */ |
| tushki7 | 0:60d829a0353a | 151 | #define HAL_SMBUS_ERROR_ACKF ((uint32_t)0x00000004) /*!< ACKF error */ |
| tushki7 | 0:60d829a0353a | 152 | #define HAL_SMBUS_ERROR_OVR ((uint32_t)0x00000008) /*!< OVR error */ |
| tushki7 | 0:60d829a0353a | 153 | #define HAL_SMBUS_ERROR_HALTIMEOUT ((uint32_t)0x00000010) /*!< Timeout error */ |
| tushki7 | 0:60d829a0353a | 154 | #define HAL_SMBUS_ERROR_BUSTIMEOUT ((uint32_t)0x00000020) /*!< Bus Timeout error */ |
| tushki7 | 0:60d829a0353a | 155 | #define HAL_SMBUS_ERROR_ALERT ((uint32_t)0x00000040) /*!< Alert error */ |
| tushki7 | 0:60d829a0353a | 156 | #define HAL_SMBUS_ERROR_PECERR ((uint32_t)0x00000080) /*!< PEC error */ |
| tushki7 | 0:60d829a0353a | 157 | /** |
| tushki7 | 0:60d829a0353a | 158 | * @} |
| tushki7 | 0:60d829a0353a | 159 | */ |
| tushki7 | 0:60d829a0353a | 160 | |
| tushki7 | 0:60d829a0353a | 161 | /** @defgroup SMBUS_State SMBUS State |
| tushki7 | 0:60d829a0353a | 162 | * @{ |
| tushki7 | 0:60d829a0353a | 163 | */ |
| tushki7 | 0:60d829a0353a | 164 | |
| tushki7 | 0:60d829a0353a | 165 | #define HAL_SMBUS_STATE_RESET ((uint32_t)0x00000000) /*!< SMBUS not yet initialized or disabled */ |
| tushki7 | 0:60d829a0353a | 166 | #define HAL_SMBUS_STATE_READY ((uint32_t)0x00000001) /*!< SMBUS initialized and ready for use */ |
| tushki7 | 0:60d829a0353a | 167 | #define HAL_SMBUS_STATE_BUSY ((uint32_t)0x00000002) /*!< SMBUS internal process is ongoing */ |
| tushki7 | 0:60d829a0353a | 168 | #define HAL_SMBUS_STATE_MASTER_BUSY_TX ((uint32_t)0x00000012) /*!< Master Data Transmission process is ongoing */ |
| tushki7 | 0:60d829a0353a | 169 | #define HAL_SMBUS_STATE_MASTER_BUSY_RX ((uint32_t)0x00000022) /*!< Master Data Reception process is ongoing */ |
| tushki7 | 0:60d829a0353a | 170 | #define HAL_SMBUS_STATE_SLAVE_BUSY_TX ((uint32_t)0x00000032) /*!< Slave Data Transmission process is ongoing */ |
| tushki7 | 0:60d829a0353a | 171 | #define HAL_SMBUS_STATE_SLAVE_BUSY_RX ((uint32_t)0x00000042) /*!< Slave Data Reception process is ongoing */ |
| tushki7 | 0:60d829a0353a | 172 | #define HAL_SMBUS_STATE_TIMEOUT ((uint32_t)0x00000003) /*!< Timeout state */ |
| tushki7 | 0:60d829a0353a | 173 | #define HAL_SMBUS_STATE_ERROR ((uint32_t)0x00000004) /*!< Reception process is ongoing */ |
| tushki7 | 0:60d829a0353a | 174 | #define HAL_SMBUS_STATE_SLAVE_LISTEN ((uint32_t)0x00000008) /*!< Address Listen Mode is ongoing */ |
| tushki7 | 0:60d829a0353a | 175 | /* Aliases for inter STM32 series compatibility */ |
| tushki7 | 0:60d829a0353a | 176 | #define HAL_SMBUS_STATE_LISTEN HAL_SMBUS_STATE_SLAVE_LISTEN |
| tushki7 | 0:60d829a0353a | 177 | |
| tushki7 | 0:60d829a0353a | 178 | /** |
| tushki7 | 0:60d829a0353a | 179 | * @} |
| tushki7 | 0:60d829a0353a | 180 | */ |
| tushki7 | 0:60d829a0353a | 181 | |
| tushki7 | 0:60d829a0353a | 182 | /** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter |
| tushki7 | 0:60d829a0353a | 183 | * @{ |
| tushki7 | 0:60d829a0353a | 184 | */ |
| tushki7 | 0:60d829a0353a | 185 | #define SMBUS_ANALOGFILTER_ENABLED ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 186 | #define SMBUS_ANALOGFILTER_DISABLED I2C_CR1_ANFOFF |
| tushki7 | 0:60d829a0353a | 187 | |
| tushki7 | 0:60d829a0353a | 188 | #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLED) || \ |
| tushki7 | 0:60d829a0353a | 189 | ((FILTER) == SMBUS_ANALOGFILTER_DISABLED)) |
| tushki7 | 0:60d829a0353a | 190 | /** |
| tushki7 | 0:60d829a0353a | 191 | * @} |
| tushki7 | 0:60d829a0353a | 192 | */ |
| tushki7 | 0:60d829a0353a | 193 | |
| tushki7 | 0:60d829a0353a | 194 | /** @defgroup SMBUS_addressing_mode SMBUS addressing mode |
| tushki7 | 0:60d829a0353a | 195 | * @{ |
| tushki7 | 0:60d829a0353a | 196 | */ |
| tushki7 | 0:60d829a0353a | 197 | #define SMBUS_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001) |
| tushki7 | 0:60d829a0353a | 198 | #define SMBUS_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002) |
| tushki7 | 0:60d829a0353a | 199 | |
| tushki7 | 0:60d829a0353a | 200 | #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \ |
| tushki7 | 0:60d829a0353a | 201 | ((MODE) == SMBUS_ADDRESSINGMODE_10BIT)) |
| tushki7 | 0:60d829a0353a | 202 | /** |
| tushki7 | 0:60d829a0353a | 203 | * @} |
| tushki7 | 0:60d829a0353a | 204 | */ |
| tushki7 | 0:60d829a0353a | 205 | |
| tushki7 | 0:60d829a0353a | 206 | /** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode |
| tushki7 | 0:60d829a0353a | 207 | * @{ |
| tushki7 | 0:60d829a0353a | 208 | */ |
| tushki7 | 0:60d829a0353a | 209 | |
| tushki7 | 0:60d829a0353a | 210 | #define SMBUS_DUALADDRESS_DISABLED ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 211 | #define SMBUS_DUALADDRESS_ENABLED I2C_OAR2_OA2EN |
| tushki7 | 0:60d829a0353a | 212 | |
| tushki7 | 0:60d829a0353a | 213 | #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLED) || \ |
| tushki7 | 0:60d829a0353a | 214 | ((ADDRESS) == SMBUS_DUALADDRESS_ENABLED)) |
| tushki7 | 0:60d829a0353a | 215 | /** |
| tushki7 | 0:60d829a0353a | 216 | * @} |
| tushki7 | 0:60d829a0353a | 217 | */ |
| tushki7 | 0:60d829a0353a | 218 | |
| tushki7 | 0:60d829a0353a | 219 | /** @defgroup SMBUS_own_address2_masks SMBUS ownaddress2 masks |
| tushki7 | 0:60d829a0353a | 220 | * @{ |
| tushki7 | 0:60d829a0353a | 221 | */ |
| tushki7 | 0:60d829a0353a | 222 | |
| tushki7 | 0:60d829a0353a | 223 | #define SMBUS_OA2_NOMASK ((uint8_t)0x00) |
| tushki7 | 0:60d829a0353a | 224 | #define SMBUS_OA2_MASK01 ((uint8_t)0x01) |
| tushki7 | 0:60d829a0353a | 225 | #define SMBUS_OA2_MASK02 ((uint8_t)0x02) |
| tushki7 | 0:60d829a0353a | 226 | #define SMBUS_OA2_MASK03 ((uint8_t)0x03) |
| tushki7 | 0:60d829a0353a | 227 | #define SMBUS_OA2_MASK04 ((uint8_t)0x04) |
| tushki7 | 0:60d829a0353a | 228 | #define SMBUS_OA2_MASK05 ((uint8_t)0x05) |
| tushki7 | 0:60d829a0353a | 229 | #define SMBUS_OA2_MASK06 ((uint8_t)0x06) |
| tushki7 | 0:60d829a0353a | 230 | #define SMBUS_OA2_MASK07 ((uint8_t)0x07) |
| tushki7 | 0:60d829a0353a | 231 | |
| tushki7 | 0:60d829a0353a | 232 | #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \ |
| tushki7 | 0:60d829a0353a | 233 | ((MASK) == SMBUS_OA2_MASK01) || \ |
| tushki7 | 0:60d829a0353a | 234 | ((MASK) == SMBUS_OA2_MASK02) || \ |
| tushki7 | 0:60d829a0353a | 235 | ((MASK) == SMBUS_OA2_MASK03) || \ |
| tushki7 | 0:60d829a0353a | 236 | ((MASK) == SMBUS_OA2_MASK04) || \ |
| tushki7 | 0:60d829a0353a | 237 | ((MASK) == SMBUS_OA2_MASK05) || \ |
| tushki7 | 0:60d829a0353a | 238 | ((MASK) == SMBUS_OA2_MASK06) || \ |
| tushki7 | 0:60d829a0353a | 239 | ((MASK) == SMBUS_OA2_MASK07)) |
| tushki7 | 0:60d829a0353a | 240 | /** |
| tushki7 | 0:60d829a0353a | 241 | * @} |
| tushki7 | 0:60d829a0353a | 242 | */ |
| tushki7 | 0:60d829a0353a | 243 | |
| tushki7 | 0:60d829a0353a | 244 | |
| tushki7 | 0:60d829a0353a | 245 | /** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode |
| tushki7 | 0:60d829a0353a | 246 | * @{ |
| tushki7 | 0:60d829a0353a | 247 | */ |
| tushki7 | 0:60d829a0353a | 248 | #define SMBUS_GENERALCALL_DISABLED ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 249 | #define SMBUS_GENERALCALL_ENABLED I2C_CR1_GCEN |
| tushki7 | 0:60d829a0353a | 250 | |
| tushki7 | 0:60d829a0353a | 251 | #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLED) || \ |
| tushki7 | 0:60d829a0353a | 252 | ((CALL) == SMBUS_GENERALCALL_ENABLED)) |
| tushki7 | 0:60d829a0353a | 253 | /** |
| tushki7 | 0:60d829a0353a | 254 | * @} |
| tushki7 | 0:60d829a0353a | 255 | */ |
| tushki7 | 0:60d829a0353a | 256 | |
| tushki7 | 0:60d829a0353a | 257 | /** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode |
| tushki7 | 0:60d829a0353a | 258 | * @{ |
| tushki7 | 0:60d829a0353a | 259 | */ |
| tushki7 | 0:60d829a0353a | 260 | #define SMBUS_NOSTRETCH_DISABLED ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 261 | #define SMBUS_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH |
| tushki7 | 0:60d829a0353a | 262 | |
| tushki7 | 0:60d829a0353a | 263 | #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLED) || \ |
| tushki7 | 0:60d829a0353a | 264 | ((STRETCH) == SMBUS_NOSTRETCH_ENABLED)) |
| tushki7 | 0:60d829a0353a | 265 | /** |
| tushki7 | 0:60d829a0353a | 266 | * @} |
| tushki7 | 0:60d829a0353a | 267 | */ |
| tushki7 | 0:60d829a0353a | 268 | |
| tushki7 | 0:60d829a0353a | 269 | /** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode |
| tushki7 | 0:60d829a0353a | 270 | * @{ |
| tushki7 | 0:60d829a0353a | 271 | */ |
| tushki7 | 0:60d829a0353a | 272 | #define SMBUS_PEC_DISABLED ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 273 | #define SMBUS_PEC_ENABLED I2C_CR1_PECEN |
| tushki7 | 0:60d829a0353a | 274 | |
| tushki7 | 0:60d829a0353a | 275 | #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLED) || \ |
| tushki7 | 0:60d829a0353a | 276 | ((PEC) == SMBUS_PEC_ENABLED)) |
| tushki7 | 0:60d829a0353a | 277 | /** |
| tushki7 | 0:60d829a0353a | 278 | * @} |
| tushki7 | 0:60d829a0353a | 279 | */ |
| tushki7 | 0:60d829a0353a | 280 | |
| tushki7 | 0:60d829a0353a | 281 | /** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode |
| tushki7 | 0:60d829a0353a | 282 | * @{ |
| tushki7 | 0:60d829a0353a | 283 | */ |
| tushki7 | 0:60d829a0353a | 284 | #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBHEN) |
| tushki7 | 0:60d829a0353a | 285 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (uint32_t)(0x00000000) |
| tushki7 | 0:60d829a0353a | 286 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBDEN) |
| tushki7 | 0:60d829a0353a | 287 | |
| tushki7 | 0:60d829a0353a | 288 | #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \ |
| tushki7 | 0:60d829a0353a | 289 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ |
| tushki7 | 0:60d829a0353a | 290 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)) |
| tushki7 | 0:60d829a0353a | 291 | /** |
| tushki7 | 0:60d829a0353a | 292 | * @} |
| tushki7 | 0:60d829a0353a | 293 | */ |
| tushki7 | 0:60d829a0353a | 294 | |
| tushki7 | 0:60d829a0353a | 295 | /** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition |
| tushki7 | 0:60d829a0353a | 296 | * @{ |
| tushki7 | 0:60d829a0353a | 297 | */ |
| tushki7 | 0:60d829a0353a | 298 | |
| tushki7 | 0:60d829a0353a | 299 | #define SMBUS_SOFTEND_MODE ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 300 | #define SMBUS_RELOAD_MODE I2C_CR2_RELOAD |
| tushki7 | 0:60d829a0353a | 301 | #define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND |
| tushki7 | 0:60d829a0353a | 302 | #define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE |
| tushki7 | 0:60d829a0353a | 303 | |
| tushki7 | 0:60d829a0353a | 304 | #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \ |
| tushki7 | 0:60d829a0353a | 305 | ((MODE) == SMBUS_AUTOEND_MODE) || \ |
| tushki7 | 0:60d829a0353a | 306 | ((MODE) == SMBUS_SOFTEND_MODE) || \ |
| tushki7 | 0:60d829a0353a | 307 | ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \ |
| tushki7 | 0:60d829a0353a | 308 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \ |
| tushki7 | 0:60d829a0353a | 309 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \ |
| tushki7 | 0:60d829a0353a | 310 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE ))) |
| tushki7 | 0:60d829a0353a | 311 | |
| tushki7 | 0:60d829a0353a | 312 | /** |
| tushki7 | 0:60d829a0353a | 313 | * @} |
| tushki7 | 0:60d829a0353a | 314 | */ |
| tushki7 | 0:60d829a0353a | 315 | |
| tushki7 | 0:60d829a0353a | 316 | /** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition |
| tushki7 | 0:60d829a0353a | 317 | * @{ |
| tushki7 | 0:60d829a0353a | 318 | */ |
| tushki7 | 0:60d829a0353a | 319 | |
| tushki7 | 0:60d829a0353a | 320 | #define SMBUS_NO_STARTSTOP ((uint32_t)0x00000000) |
| tushki7 | 0:60d829a0353a | 321 | #define SMBUS_GENERATE_STOP I2C_CR2_STOP |
| tushki7 | 0:60d829a0353a | 322 | #define SMBUS_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) |
| tushki7 | 0:60d829a0353a | 323 | #define SMBUS_GENERATE_START_WRITE I2C_CR2_START |
| tushki7 | 0:60d829a0353a | 324 | |
| tushki7 | 0:60d829a0353a | 325 | #define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \ |
| tushki7 | 0:60d829a0353a | 326 | ((REQUEST) == SMBUS_GENERATE_START_READ) || \ |
| tushki7 | 0:60d829a0353a | 327 | ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \ |
| tushki7 | 0:60d829a0353a | 328 | ((REQUEST) == SMBUS_NO_STARTSTOP)) |
| tushki7 | 0:60d829a0353a | 329 | |
| tushki7 | 0:60d829a0353a | 330 | /** |
| tushki7 | 0:60d829a0353a | 331 | * @} |
| tushki7 | 0:60d829a0353a | 332 | */ |
| tushki7 | 0:60d829a0353a | 333 | |
| tushki7 | 0:60d829a0353a | 334 | /** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition |
| tushki7 | 0:60d829a0353a | 335 | * @{ |
| tushki7 | 0:60d829a0353a | 336 | */ |
| tushki7 | 0:60d829a0353a | 337 | |
| tushki7 | 0:60d829a0353a | 338 | #define SMBUS_FIRST_FRAME ((uint32_t)(SMBUS_SOFTEND_MODE)) |
| tushki7 | 0:60d829a0353a | 339 | #define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE)) |
| tushki7 | 0:60d829a0353a | 340 | #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| tushki7 | 0:60d829a0353a | 341 | #define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| tushki7 | 0:60d829a0353a | 342 | #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| tushki7 | 0:60d829a0353a | 343 | #define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| tushki7 | 0:60d829a0353a | 344 | |
| tushki7 | 0:60d829a0353a | 345 | #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \ |
| tushki7 | 0:60d829a0353a | 346 | ((REQUEST) == SMBUS_NEXT_FRAME) || \ |
| tushki7 | 0:60d829a0353a | 347 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \ |
| tushki7 | 0:60d829a0353a | 348 | ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \ |
| tushki7 | 0:60d829a0353a | 349 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \ |
| tushki7 | 0:60d829a0353a | 350 | ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)) |
| tushki7 | 0:60d829a0353a | 351 | |
| tushki7 | 0:60d829a0353a | 352 | /** |
| tushki7 | 0:60d829a0353a | 353 | * @} |
| tushki7 | 0:60d829a0353a | 354 | */ |
| tushki7 | 0:60d829a0353a | 355 | |
| tushki7 | 0:60d829a0353a | 356 | /** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition |
| tushki7 | 0:60d829a0353a | 357 | * @brief SMBUS Interrupt definition |
| tushki7 | 0:60d829a0353a | 358 | * Elements values convention: 0xXXXXXXXX |
| tushki7 | 0:60d829a0353a | 359 | * - XXXXXXXX : Interrupt control mask |
| tushki7 | 0:60d829a0353a | 360 | * @{ |
| tushki7 | 0:60d829a0353a | 361 | */ |
| tushki7 | 0:60d829a0353a | 362 | #define SMBUS_IT_ERRI I2C_CR1_ERRIE |
| tushki7 | 0:60d829a0353a | 363 | #define SMBUS_IT_TCI I2C_CR1_TCIE |
| tushki7 | 0:60d829a0353a | 364 | #define SMBUS_IT_STOPI I2C_CR1_STOPIE |
| tushki7 | 0:60d829a0353a | 365 | #define SMBUS_IT_NACKI I2C_CR1_NACKIE |
| tushki7 | 0:60d829a0353a | 366 | #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE |
| tushki7 | 0:60d829a0353a | 367 | #define SMBUS_IT_RXI I2C_CR1_RXIE |
| tushki7 | 0:60d829a0353a | 368 | #define SMBUS_IT_TXI I2C_CR1_TXIE |
| tushki7 | 0:60d829a0353a | 369 | #define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI) |
| tushki7 | 0:60d829a0353a | 370 | #define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI) |
| tushki7 | 0:60d829a0353a | 371 | #define SMBUS_IT_ALERT (SMBUS_IT_ERRI) |
| tushki7 | 0:60d829a0353a | 372 | #define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI) |
| tushki7 | 0:60d829a0353a | 373 | /** |
| tushki7 | 0:60d829a0353a | 374 | * @} |
| tushki7 | 0:60d829a0353a | 375 | */ |
| tushki7 | 0:60d829a0353a | 376 | |
| tushki7 | 0:60d829a0353a | 377 | /** @defgroup SMBUS_Flag_definition SMBUS Flag definition |
| tushki7 | 0:60d829a0353a | 378 | * @brief Flag definition |
| tushki7 | 0:60d829a0353a | 379 | * Elements values convention: 0xXXXXYYYY |
| tushki7 | 0:60d829a0353a | 380 | * - XXXXXXXX : Flag mask |
| tushki7 | 0:60d829a0353a | 381 | * @{ |
| tushki7 | 0:60d829a0353a | 382 | */ |
| tushki7 | 0:60d829a0353a | 383 | |
| tushki7 | 0:60d829a0353a | 384 | #define SMBUS_FLAG_TXE I2C_ISR_TXE |
| tushki7 | 0:60d829a0353a | 385 | #define SMBUS_FLAG_TXIS I2C_ISR_TXIS |
| tushki7 | 0:60d829a0353a | 386 | #define SMBUS_FLAG_RXNE I2C_ISR_RXNE |
| tushki7 | 0:60d829a0353a | 387 | #define SMBUS_FLAG_ADDR I2C_ISR_ADDR |
| tushki7 | 0:60d829a0353a | 388 | #define SMBUS_FLAG_AF I2C_ISR_NACKF |
| tushki7 | 0:60d829a0353a | 389 | #define SMBUS_FLAG_STOPF I2C_ISR_STOPF |
| tushki7 | 0:60d829a0353a | 390 | #define SMBUS_FLAG_TC I2C_ISR_TC |
| tushki7 | 0:60d829a0353a | 391 | #define SMBUS_FLAG_TCR I2C_ISR_TCR |
| tushki7 | 0:60d829a0353a | 392 | #define SMBUS_FLAG_BERR I2C_ISR_BERR |
| tushki7 | 0:60d829a0353a | 393 | #define SMBUS_FLAG_ARLO I2C_ISR_ARLO |
| tushki7 | 0:60d829a0353a | 394 | #define SMBUS_FLAG_OVR I2C_ISR_OVR |
| tushki7 | 0:60d829a0353a | 395 | #define SMBUS_FLAG_PECERR I2C_ISR_PECERR |
| tushki7 | 0:60d829a0353a | 396 | #define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
| tushki7 | 0:60d829a0353a | 397 | #define SMBUS_FLAG_ALERT I2C_ISR_ALERT |
| tushki7 | 0:60d829a0353a | 398 | #define SMBUS_FLAG_BUSY I2C_ISR_BUSY |
| tushki7 | 0:60d829a0353a | 399 | #define SMBUS_FLAG_DIR I2C_ISR_DIR |
| tushki7 | 0:60d829a0353a | 400 | /** |
| tushki7 | 0:60d829a0353a | 401 | * @} |
| tushki7 | 0:60d829a0353a | 402 | */ |
| tushki7 | 0:60d829a0353a | 403 | |
| tushki7 | 0:60d829a0353a | 404 | /** |
| tushki7 | 0:60d829a0353a | 405 | * @} |
| tushki7 | 0:60d829a0353a | 406 | */ |
| tushki7 | 0:60d829a0353a | 407 | |
| tushki7 | 0:60d829a0353a | 408 | /* Exported macros ------------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 409 | /** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros |
| tushki7 | 0:60d829a0353a | 410 | * @{ |
| tushki7 | 0:60d829a0353a | 411 | */ |
| tushki7 | 0:60d829a0353a | 412 | |
| tushki7 | 0:60d829a0353a | 413 | /** @brief Reset SMBUS handle state |
| tushki7 | 0:60d829a0353a | 414 | * @param __HANDLE__: SMBUS handle. |
| tushki7 | 0:60d829a0353a | 415 | * @retval None |
| tushki7 | 0:60d829a0353a | 416 | */ |
| tushki7 | 0:60d829a0353a | 417 | #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET) |
| tushki7 | 0:60d829a0353a | 418 | |
| tushki7 | 0:60d829a0353a | 419 | /** @brief Enable or disable the specified SMBUS interrupts. |
| tushki7 | 0:60d829a0353a | 420 | * @param __HANDLE__: specifies the SMBUS Handle. |
| tushki7 | 0:60d829a0353a | 421 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| tushki7 | 0:60d829a0353a | 422 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| tushki7 | 0:60d829a0353a | 423 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 424 | * @arg SMBUS_IT_ERRI: Errors interrupt enable |
| tushki7 | 0:60d829a0353a | 425 | * @arg SMBUS_IT_TCI: Transfer complete interrupt enable |
| tushki7 | 0:60d829a0353a | 426 | * @arg SMBUS_IT_STOPI: STOP detection interrupt enable |
| tushki7 | 0:60d829a0353a | 427 | * @arg SMBUS_IT_NACKI: NACK received interrupt enable |
| tushki7 | 0:60d829a0353a | 428 | * @arg SMBUS_IT_ADDRI: Address match interrupt enable |
| tushki7 | 0:60d829a0353a | 429 | * @arg SMBUS_IT_RXI: RX interrupt enable |
| tushki7 | 0:60d829a0353a | 430 | * @arg SMBUS_IT_TXI: TX interrupt enable |
| tushki7 | 0:60d829a0353a | 431 | * |
| tushki7 | 0:60d829a0353a | 432 | * @retval None |
| tushki7 | 0:60d829a0353a | 433 | */ |
| tushki7 | 0:60d829a0353a | 434 | |
| tushki7 | 0:60d829a0353a | 435 | #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
| tushki7 | 0:60d829a0353a | 436 | #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
| tushki7 | 0:60d829a0353a | 437 | |
| tushki7 | 0:60d829a0353a | 438 | /** @brief Checks if the specified SMBUS interrupt source is enabled or disabled. |
| tushki7 | 0:60d829a0353a | 439 | * @param __HANDLE__: specifies the SMBUS Handle. |
| tushki7 | 0:60d829a0353a | 440 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| tushki7 | 0:60d829a0353a | 441 | * @param __INTERRUPT__: specifies the SMBUS interrupt source to check. |
| tushki7 | 0:60d829a0353a | 442 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 443 | * @arg SMBUS_IT_ERRI: Errors interrupt enable |
| tushki7 | 0:60d829a0353a | 444 | * @arg SMBUS_IT_TCI: Transfer complete interrupt enable |
| tushki7 | 0:60d829a0353a | 445 | * @arg SMBUS_IT_STOPI: STOP detection interrupt enable |
| tushki7 | 0:60d829a0353a | 446 | * @arg SMBUS_IT_NACKI: NACK received interrupt enable |
| tushki7 | 0:60d829a0353a | 447 | * @arg SMBUS_IT_ADDRI: Address match interrupt enable |
| tushki7 | 0:60d829a0353a | 448 | * @arg SMBUS_IT_RXI: RX interrupt enable |
| tushki7 | 0:60d829a0353a | 449 | * @arg SMBUS_IT_TXI: TX interrupt enable |
| tushki7 | 0:60d829a0353a | 450 | * |
| tushki7 | 0:60d829a0353a | 451 | * @retval The new state of __IT__ (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 452 | */ |
| tushki7 | 0:60d829a0353a | 453 | #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| tushki7 | 0:60d829a0353a | 454 | |
| tushki7 | 0:60d829a0353a | 455 | /** @brief Checks whether the specified SMBUS flag is set or not. |
| tushki7 | 0:60d829a0353a | 456 | * @param __HANDLE__: specifies the SMBUS Handle. |
| tushki7 | 0:60d829a0353a | 457 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| tushki7 | 0:60d829a0353a | 458 | * @param __FLAG__: specifies the flag to check. |
| tushki7 | 0:60d829a0353a | 459 | * This parameter can be one of the following values: |
| tushki7 | 0:60d829a0353a | 460 | * @arg SMBUS_FLAG_TXE: Transmit data register empty |
| tushki7 | 0:60d829a0353a | 461 | * @arg SMBUS_FLAG_TXIS: Transmit interrupt status |
| tushki7 | 0:60d829a0353a | 462 | * @arg SMBUS_FLAG_RXNE: Receive data register not empty |
| tushki7 | 0:60d829a0353a | 463 | * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) |
| tushki7 | 0:60d829a0353a | 464 | * @arg SMBUS_FLAG_AF: NACK received flag |
| tushki7 | 0:60d829a0353a | 465 | * @arg SMBUS_FLAG_STOPF: STOP detection flag |
| tushki7 | 0:60d829a0353a | 466 | * @arg SMBUS_FLAG_TC: Transfer complete (master mode) |
| tushki7 | 0:60d829a0353a | 467 | * @arg SMBUS_FLAG_TCR: Transfer complete reload |
| tushki7 | 0:60d829a0353a | 468 | * @arg SMBUS_FLAG_BERR: Bus error |
| tushki7 | 0:60d829a0353a | 469 | * @arg SMBUS_FLAG_ARLO: Arbitration lost |
| tushki7 | 0:60d829a0353a | 470 | * @arg SMBUS_FLAG_OVR: Overrun/Underrun |
| tushki7 | 0:60d829a0353a | 471 | * @arg SMBUS_FLAG_PECERR: PEC error in reception |
| tushki7 | 0:60d829a0353a | 472 | * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| tushki7 | 0:60d829a0353a | 473 | * @arg SMBUS_FLAG_ALERT: SMBus alert |
| tushki7 | 0:60d829a0353a | 474 | * @arg SMBUS_FLAG_BUSY: Bus busy |
| tushki7 | 0:60d829a0353a | 475 | * @arg SMBUS_FLAG_DIR: Transfer direction (slave mode) |
| tushki7 | 0:60d829a0353a | 476 | * |
| tushki7 | 0:60d829a0353a | 477 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| tushki7 | 0:60d829a0353a | 478 | */ |
| tushki7 | 0:60d829a0353a | 479 | #define SMBUS_FLAG_MASK ((uint32_t)0x0001FFFF) |
| tushki7 | 0:60d829a0353a | 480 | #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
| tushki7 | 0:60d829a0353a | 481 | |
| tushki7 | 0:60d829a0353a | 482 | /** @brief Clears the SMBUS pending flags which are cleared by writing 1 in a specific bit. |
| tushki7 | 0:60d829a0353a | 483 | * @param __HANDLE__: specifies the SMBUS Handle. |
| tushki7 | 0:60d829a0353a | 484 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| tushki7 | 0:60d829a0353a | 485 | * @param __FLAG__: specifies the flag to clear. |
| tushki7 | 0:60d829a0353a | 486 | * This parameter can be any combination of the following values: |
| tushki7 | 0:60d829a0353a | 487 | * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) |
| tushki7 | 0:60d829a0353a | 488 | * @arg SMBUS_FLAG_AF: NACK received flag |
| tushki7 | 0:60d829a0353a | 489 | * @arg SMBUS_FLAG_STOPF: STOP detection flag |
| tushki7 | 0:60d829a0353a | 490 | * @arg SMBUS_FLAG_BERR: Bus error |
| tushki7 | 0:60d829a0353a | 491 | * @arg SMBUS_FLAG_ARLO: Arbitration lost |
| tushki7 | 0:60d829a0353a | 492 | * @arg SMBUS_FLAG_OVR: Overrun/Underrun |
| tushki7 | 0:60d829a0353a | 493 | * @arg SMBUS_FLAG_PECERR: PEC error in reception |
| tushki7 | 0:60d829a0353a | 494 | * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| tushki7 | 0:60d829a0353a | 495 | * @arg SMBUS_FLAG_ALERT: SMBus alert |
| tushki7 | 0:60d829a0353a | 496 | * |
| tushki7 | 0:60d829a0353a | 497 | * @retval None |
| tushki7 | 0:60d829a0353a | 498 | */ |
| tushki7 | 0:60d829a0353a | 499 | #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| tushki7 | 0:60d829a0353a | 500 | |
| tushki7 | 0:60d829a0353a | 501 | |
| tushki7 | 0:60d829a0353a | 502 | #define __HAL_SMBUS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) |
| tushki7 | 0:60d829a0353a | 503 | #define __HAL_SMBUS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) |
| tushki7 | 0:60d829a0353a | 504 | |
| tushki7 | 0:60d829a0353a | 505 | #define __HAL_SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN))) |
| tushki7 | 0:60d829a0353a | 506 | #define __HAL_SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
| tushki7 | 0:60d829a0353a | 507 | |
| tushki7 | 0:60d829a0353a | 508 | #define __HAL_SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
| tushki7 | 0:60d829a0353a | 509 | (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
| tushki7 | 0:60d829a0353a | 510 | |
| tushki7 | 0:60d829a0353a | 511 | #define __HAL_SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17) |
| tushki7 | 0:60d829a0353a | 512 | #define __HAL_SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16) |
| tushki7 | 0:60d829a0353a | 513 | #define __HAL_SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) |
| tushki7 | 0:60d829a0353a | 514 | #define __HAL_SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE) |
| tushki7 | 0:60d829a0353a | 515 | #define __HAL_SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN) |
| tushki7 | 0:60d829a0353a | 516 | #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= I2C_CR2_NACK) |
| tushki7 | 0:60d829a0353a | 517 | |
| tushki7 | 0:60d829a0353a | 518 | #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF) |
| tushki7 | 0:60d829a0353a | 519 | #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF) |
| tushki7 | 0:60d829a0353a | 520 | /** |
| tushki7 | 0:60d829a0353a | 521 | * @} |
| tushki7 | 0:60d829a0353a | 522 | */ |
| tushki7 | 0:60d829a0353a | 523 | |
| tushki7 | 0:60d829a0353a | 524 | /* Exported functions --------------------------------------------------------*/ |
| tushki7 | 0:60d829a0353a | 525 | /** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions |
| tushki7 | 0:60d829a0353a | 526 | * @{ |
| tushki7 | 0:60d829a0353a | 527 | */ |
| tushki7 | 0:60d829a0353a | 528 | |
| tushki7 | 0:60d829a0353a | 529 | /** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions |
| tushki7 | 0:60d829a0353a | 530 | * @{ |
| tushki7 | 0:60d829a0353a | 531 | */ |
| tushki7 | 0:60d829a0353a | 532 | |
| tushki7 | 0:60d829a0353a | 533 | /* Initialization and de-initialization functions **********************************/ |
| tushki7 | 0:60d829a0353a | 534 | HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 535 | HAL_StatusTypeDef HAL_SMBUS_DeInit (SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 536 | void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 537 | void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 538 | |
| tushki7 | 0:60d829a0353a | 539 | /** |
| tushki7 | 0:60d829a0353a | 540 | * @} |
| tushki7 | 0:60d829a0353a | 541 | */ |
| tushki7 | 0:60d829a0353a | 542 | |
| tushki7 | 0:60d829a0353a | 543 | /** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions |
| tushki7 | 0:60d829a0353a | 544 | * @{ |
| tushki7 | 0:60d829a0353a | 545 | */ |
| tushki7 | 0:60d829a0353a | 546 | |
| tushki7 | 0:60d829a0353a | 547 | /* IO operation functions *****************************************************/ |
| tushki7 | 0:60d829a0353a | 548 | /******* Blocking mode: Polling */ |
| tushki7 | 0:60d829a0353a | 549 | HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
| tushki7 | 0:60d829a0353a | 550 | |
| tushki7 | 0:60d829a0353a | 551 | /******* Non-Blocking mode: Interrupt */ |
| tushki7 | 0:60d829a0353a | 552 | HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| tushki7 | 0:60d829a0353a | 553 | HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| tushki7 | 0:60d829a0353a | 554 | HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress); |
| tushki7 | 0:60d829a0353a | 555 | HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| tushki7 | 0:60d829a0353a | 556 | HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| tushki7 | 0:60d829a0353a | 557 | |
| tushki7 | 0:60d829a0353a | 558 | HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 559 | HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 560 | HAL_StatusTypeDef HAL_SMBUS_Slave_Listen_IT(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 561 | HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 562 | |
| tushki7 | 0:60d829a0353a | 563 | /* Aliases for new API and to insure inter STM32 series compatibility */ |
| tushki7 | 0:60d829a0353a | 564 | #define HAL_SMBUS_EnableListen_IT HAL_SMBUS_Slave_Listen_IT |
| tushki7 | 0:60d829a0353a | 565 | |
| tushki7 | 0:60d829a0353a | 566 | /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */ |
| tushki7 | 0:60d829a0353a | 567 | void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 568 | void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 569 | void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 570 | void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 571 | void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 572 | void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 573 | void HAL_SMBUS_SlaveAddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); |
| tushki7 | 0:60d829a0353a | 574 | void HAL_SMBUS_SlaveListenCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 575 | |
| tushki7 | 0:60d829a0353a | 576 | /* Aliases for new API and to insure inter STM32 series compatibility */ |
| tushki7 | 0:60d829a0353a | 577 | #define HAL_SMBUS_AddrCallback HAL_SMBUS_SlaveAddrCallback |
| tushki7 | 0:60d829a0353a | 578 | #define HAL_SMBUS_ListenCpltCallback HAL_SMBUS_SlaveListenCpltCallback |
| tushki7 | 0:60d829a0353a | 579 | |
| tushki7 | 0:60d829a0353a | 580 | void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 581 | |
| tushki7 | 0:60d829a0353a | 582 | /** |
| tushki7 | 0:60d829a0353a | 583 | * @} |
| tushki7 | 0:60d829a0353a | 584 | */ |
| tushki7 | 0:60d829a0353a | 585 | |
| tushki7 | 0:60d829a0353a | 586 | /** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions |
| tushki7 | 0:60d829a0353a | 587 | * @{ |
| tushki7 | 0:60d829a0353a | 588 | */ |
| tushki7 | 0:60d829a0353a | 589 | |
| tushki7 | 0:60d829a0353a | 590 | /* Peripheral State and Errors functions **************************************************/ |
| tushki7 | 0:60d829a0353a | 591 | uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 592 | uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus); |
| tushki7 | 0:60d829a0353a | 593 | |
| tushki7 | 0:60d829a0353a | 594 | /** |
| tushki7 | 0:60d829a0353a | 595 | * @} |
| tushki7 | 0:60d829a0353a | 596 | */ |
| tushki7 | 0:60d829a0353a | 597 | |
| tushki7 | 0:60d829a0353a | 598 | /** |
| tushki7 | 0:60d829a0353a | 599 | * @} |
| tushki7 | 0:60d829a0353a | 600 | */ |
| tushki7 | 0:60d829a0353a | 601 | |
| tushki7 | 0:60d829a0353a | 602 | /** |
| tushki7 | 0:60d829a0353a | 603 | * @} |
| tushki7 | 0:60d829a0353a | 604 | */ |
| tushki7 | 0:60d829a0353a | 605 | |
| tushki7 | 0:60d829a0353a | 606 | /** |
| tushki7 | 0:60d829a0353a | 607 | * @} |
| tushki7 | 0:60d829a0353a | 608 | */ |
| tushki7 | 0:60d829a0353a | 609 | #ifdef __cplusplus |
| tushki7 | 0:60d829a0353a | 610 | } |
| tushki7 | 0:60d829a0353a | 611 | #endif |
| tushki7 | 0:60d829a0353a | 612 | |
| tushki7 | 0:60d829a0353a | 613 | |
| tushki7 | 0:60d829a0353a | 614 | #endif /* __STM32F0xx_HAL_SMBUS_H */ |
| tushki7 | 0:60d829a0353a | 615 | |
| tushki7 | 0:60d829a0353a | 616 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| tushki7 | 0:60d829a0353a | 617 |