Tushar Sachdeva / FRDM_K64F_LCD

A simple 128x32 graphical LCD program to quickstart with LCD on ARM mbed IoT Starter Kit. This requires mbed Applciation Shield with FRDM-K64F platform.

Dependencies:   C12832

mbed/TARGET_NUCLEO_F030R8/stm32f0xx_hal_usart_ex.h@1:eb68c94a8ee5, 2015-04-12 (annotated)

Committer:
tushki7
Date:
Sun Apr 12 15:45:52 2015 +0000
Revision:
1:eb68c94a8ee5
Parent:
0:60d829a0353a 
A simple 128x32 LCD program with ARM mbed IoT Starter Kit;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tushki7 0:60d829a0353a 1 /**
tushki7 0:60d829a0353a 2 ******************************************************************************
tushki7 0:60d829a0353a 3 * @file stm32f0xx_hal_usart_ex.h
tushki7 0:60d829a0353a 4 * @author MCD Application Team
tushki7 0:60d829a0353a 5 * @version V1.2.0
tushki7 0:60d829a0353a 6 * @date 11-December-2014
tushki7 0:60d829a0353a 7 * @brief Header file of USART HAL Extension module.
tushki7 0:60d829a0353a 8 ******************************************************************************
tushki7 0:60d829a0353a 9 * @attention
tushki7 0:60d829a0353a 10 *
tushki7 0:60d829a0353a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
tushki7 0:60d829a0353a 12 *
tushki7 0:60d829a0353a 13 * Redistribution and use in source and binary forms, with or without modification,
tushki7 0:60d829a0353a 14 * are permitted provided that the following conditions are met:
tushki7 0:60d829a0353a 15 * 1. Redistributions of source code must retain the above copyright notice,
tushki7 0:60d829a0353a 16 * this list of conditions and the following disclaimer.
tushki7 0:60d829a0353a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
tushki7 0:60d829a0353a 18 * this list of conditions and the following disclaimer in the documentation
tushki7 0:60d829a0353a 19 * and/or other materials provided with the distribution.
tushki7 0:60d829a0353a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
tushki7 0:60d829a0353a 21 * may be used to endorse or promote products derived from this software
tushki7 0:60d829a0353a 22 * without specific prior written permission.
tushki7 0:60d829a0353a 23 *
tushki7 0:60d829a0353a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
tushki7 0:60d829a0353a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
tushki7 0:60d829a0353a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
tushki7 0:60d829a0353a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
tushki7 0:60d829a0353a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
tushki7 0:60d829a0353a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
tushki7 0:60d829a0353a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
tushki7 0:60d829a0353a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
tushki7 0:60d829a0353a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
tushki7 0:60d829a0353a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
tushki7 0:60d829a0353a 34 *
tushki7 0:60d829a0353a 35 ******************************************************************************
tushki7 0:60d829a0353a 36 */
tushki7 0:60d829a0353a 37
tushki7 0:60d829a0353a 38 /* Define to prevent recursive inclusion -------------------------------------*/
tushki7 0:60d829a0353a 39 #ifndef __STM32F0xx_HAL_USART_EX_H
tushki7 0:60d829a0353a 40 #define __STM32F0xx_HAL_USART_EX_H
tushki7 0:60d829a0353a 41
tushki7 0:60d829a0353a 42 #ifdef __cplusplus
tushki7 0:60d829a0353a 43 extern "C" {
tushki7 0:60d829a0353a 44 #endif
tushki7 0:60d829a0353a 45
tushki7 0:60d829a0353a 46 /* Includes ------------------------------------------------------------------*/
tushki7 0:60d829a0353a 47 #include "stm32f0xx_hal_def.h"
tushki7 0:60d829a0353a 48
tushki7 0:60d829a0353a 49 /** @addtogroup STM32F0xx_HAL_Driver
tushki7 0:60d829a0353a 50 * @{
tushki7 0:60d829a0353a 51 */
tushki7 0:60d829a0353a 52
tushki7 0:60d829a0353a 53 /** @defgroup USARTEx USARTEx Extended HAL module driver
tushki7 0:60d829a0353a 54 * @{
tushki7 0:60d829a0353a 55 */
tushki7 0:60d829a0353a 56
tushki7 0:60d829a0353a 57 /* Exported types ------------------------------------------------------------*/
tushki7 0:60d829a0353a 58 /* Exported constants --------------------------------------------------------*/
tushki7 0:60d829a0353a 59 /** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants
tushki7 0:60d829a0353a 60 * @{
tushki7 0:60d829a0353a 61 */
tushki7 0:60d829a0353a 62
tushki7 0:60d829a0353a 63 /** @defgroup USARTEx_Word_Length USARTEx Word Length
tushki7 0:60d829a0353a 64 * @{
tushki7 0:60d829a0353a 65 */
tushki7 0:60d829a0353a 66 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
tushki7 0:60d829a0353a 67 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
tushki7 0:60d829a0353a 68 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
tushki7 0:60d829a0353a 69 #define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1)
tushki7 0:60d829a0353a 70 #define USART_WORDLENGTH_8B ((uint32_t)0x00000000)
tushki7 0:60d829a0353a 71 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0)
tushki7 0:60d829a0353a 72 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_7B) || \
tushki7 0:60d829a0353a 73 ((LENGTH) == USART_WORDLENGTH_8B) || \
tushki7 0:60d829a0353a 74 ((LENGTH) == USART_WORDLENGTH_9B))
tushki7 0:60d829a0353a 75 #else
tushki7 0:60d829a0353a 76 #define USART_WORDLENGTH_8B ((uint32_t)0x00000000)
tushki7 0:60d829a0353a 77 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
tushki7 0:60d829a0353a 78 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \
tushki7 0:60d829a0353a 79 ((LENGTH) == USART_WORDLENGTH_9B))
tushki7 0:60d829a0353a 80 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || defined (STM32F070xB) || \
tushki7 0:60d829a0353a 81 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
tushki7 0:60d829a0353a 82 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
tushki7 0:60d829a0353a 83 /**
tushki7 0:60d829a0353a 84 * @}
tushki7 0:60d829a0353a 85 */
tushki7 0:60d829a0353a 86
tushki7 0:60d829a0353a 87 /**
tushki7 0:60d829a0353a 88 * @}
tushki7 0:60d829a0353a 89 */
tushki7 0:60d829a0353a 90
tushki7 0:60d829a0353a 91 /* Exported macro ------------------------------------------------------------*/
tushki7 0:60d829a0353a 92
tushki7 0:60d829a0353a 93 /** @defgroup USARTEx_Exported_Macros USARTEx Exported Macros
tushki7 0:60d829a0353a 94 * @{
tushki7 0:60d829a0353a 95 */
tushki7 0:60d829a0353a 96
tushki7 0:60d829a0353a 97 /** @brief Reports the USART clock source.
tushki7 0:60d829a0353a 98 * @param __HANDLE__: specifies the USART Handle
tushki7 0:60d829a0353a 99 * @param __CLOCKSOURCE__ : output variable
tushki7 0:60d829a0353a 100 * @retval the USART clocking source, written in __CLOCKSOURCE__.
tushki7 0:60d829a0353a 101 */
tushki7 0:60d829a0353a 102 #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx)
tushki7 0:60d829a0353a 103 #define __HAL_USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
tushki7 0:60d829a0353a 104 do { \
tushki7 0:60d829a0353a 105 switch(__HAL_RCC_GET_USART1_SOURCE()) \
tushki7 0:60d829a0353a 106 { \
tushki7 0:60d829a0353a 107 case RCC_USART1CLKSOURCE_PCLK1: \
tushki7 0:60d829a0353a 108 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 109 break; \
tushki7 0:60d829a0353a 110 case RCC_USART1CLKSOURCE_HSI: \
tushki7 0:60d829a0353a 111 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
tushki7 0:60d829a0353a 112 break; \
tushki7 0:60d829a0353a 113 case RCC_USART1CLKSOURCE_SYSCLK: \
tushki7 0:60d829a0353a 114 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
tushki7 0:60d829a0353a 115 break; \
tushki7 0:60d829a0353a 116 case RCC_USART1CLKSOURCE_LSE: \
tushki7 0:60d829a0353a 117 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
tushki7 0:60d829a0353a 118 break; \
tushki7 0:60d829a0353a 119 default: \
tushki7 0:60d829a0353a 120 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 121 break; \
tushki7 0:60d829a0353a 122 } \
tushki7 0:60d829a0353a 123 } while(0)
tushki7 0:60d829a0353a 124 #elif defined (STM32F030x8) || defined (STM32F070x6) || \
tushki7 0:60d829a0353a 125 defined (STM32F042x6) || defined (STM32F048xx) || \
tushki7 0:60d829a0353a 126 defined (STM32F051x8) || defined (STM32F058xx)
tushki7 0:60d829a0353a 127 #define __HAL_USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
tushki7 0:60d829a0353a 128 do { \
tushki7 0:60d829a0353a 129 if((__HANDLE__)->Instance == USART1) \
tushki7 0:60d829a0353a 130 { \
tushki7 0:60d829a0353a 131 switch(__HAL_RCC_GET_USART1_SOURCE()) \
tushki7 0:60d829a0353a 132 { \
tushki7 0:60d829a0353a 133 case RCC_USART1CLKSOURCE_PCLK1: \
tushki7 0:60d829a0353a 134 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 135 break; \
tushki7 0:60d829a0353a 136 case RCC_USART1CLKSOURCE_HSI: \
tushki7 0:60d829a0353a 137 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
tushki7 0:60d829a0353a 138 break; \
tushki7 0:60d829a0353a 139 case RCC_USART1CLKSOURCE_SYSCLK: \
tushki7 0:60d829a0353a 140 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
tushki7 0:60d829a0353a 141 break; \
tushki7 0:60d829a0353a 142 case RCC_USART1CLKSOURCE_LSE: \
tushki7 0:60d829a0353a 143 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
tushki7 0:60d829a0353a 144 break; \
tushki7 0:60d829a0353a 145 default: \
tushki7 0:60d829a0353a 146 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 147 break; \
tushki7 0:60d829a0353a 148 } \
tushki7 0:60d829a0353a 149 } \
tushki7 0:60d829a0353a 150 else if((__HANDLE__)->Instance == USART2) \
tushki7 0:60d829a0353a 151 { \
tushki7 0:60d829a0353a 152 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 153 } \
tushki7 0:60d829a0353a 154 else \
tushki7 0:60d829a0353a 155 { \
tushki7 0:60d829a0353a 156 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 157 } \
tushki7 0:60d829a0353a 158 } while(0)
tushki7 0:60d829a0353a 159 #elif defined (STM32F070xB)
tushki7 0:60d829a0353a 160 #define __HAL_USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
tushki7 0:60d829a0353a 161 do { \
tushki7 0:60d829a0353a 162 if((__HANDLE__)->Instance == USART1) \
tushki7 0:60d829a0353a 163 { \
tushki7 0:60d829a0353a 164 switch(__HAL_RCC_GET_USART1_SOURCE()) \
tushki7 0:60d829a0353a 165 { \
tushki7 0:60d829a0353a 166 case RCC_USART1CLKSOURCE_PCLK1: \
tushki7 0:60d829a0353a 167 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 168 break; \
tushki7 0:60d829a0353a 169 case RCC_USART1CLKSOURCE_HSI: \
tushki7 0:60d829a0353a 170 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
tushki7 0:60d829a0353a 171 break; \
tushki7 0:60d829a0353a 172 case RCC_USART1CLKSOURCE_SYSCLK: \
tushki7 0:60d829a0353a 173 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
tushki7 0:60d829a0353a 174 break; \
tushki7 0:60d829a0353a 175 case RCC_USART1CLKSOURCE_LSE: \
tushki7 0:60d829a0353a 176 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
tushki7 0:60d829a0353a 177 break; \
tushki7 0:60d829a0353a 178 default: \
tushki7 0:60d829a0353a 179 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 180 break; \
tushki7 0:60d829a0353a 181 } \
tushki7 0:60d829a0353a 182 } \
tushki7 0:60d829a0353a 183 else if((__HANDLE__)->Instance == USART2) \
tushki7 0:60d829a0353a 184 { \
tushki7 0:60d829a0353a 185 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 186 } \
tushki7 0:60d829a0353a 187 else if((__HANDLE__)->Instance == USART3) \
tushki7 0:60d829a0353a 188 { \
tushki7 0:60d829a0353a 189 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 190 } \
tushki7 0:60d829a0353a 191 else if((__HANDLE__)->Instance == USART4) \
tushki7 0:60d829a0353a 192 { \
tushki7 0:60d829a0353a 193 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 194 } \
tushki7 0:60d829a0353a 195 else \
tushki7 0:60d829a0353a 196 { \
tushki7 0:60d829a0353a 197 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 198 } \
tushki7 0:60d829a0353a 199 } while(0)
tushki7 0:60d829a0353a 200 #elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)
tushki7 0:60d829a0353a 201 #define __HAL_USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
tushki7 0:60d829a0353a 202 do { \
tushki7 0:60d829a0353a 203 if((__HANDLE__)->Instance == USART1) \
tushki7 0:60d829a0353a 204 { \
tushki7 0:60d829a0353a 205 switch(__HAL_RCC_GET_USART1_SOURCE()) \
tushki7 0:60d829a0353a 206 { \
tushki7 0:60d829a0353a 207 case RCC_USART1CLKSOURCE_PCLK1: \
tushki7 0:60d829a0353a 208 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 209 break; \
tushki7 0:60d829a0353a 210 case RCC_USART1CLKSOURCE_HSI: \
tushki7 0:60d829a0353a 211 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
tushki7 0:60d829a0353a 212 break; \
tushki7 0:60d829a0353a 213 case RCC_USART1CLKSOURCE_SYSCLK: \
tushki7 0:60d829a0353a 214 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
tushki7 0:60d829a0353a 215 break; \
tushki7 0:60d829a0353a 216 case RCC_USART1CLKSOURCE_LSE: \
tushki7 0:60d829a0353a 217 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
tushki7 0:60d829a0353a 218 break; \
tushki7 0:60d829a0353a 219 default: \
tushki7 0:60d829a0353a 220 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 221 break; \
tushki7 0:60d829a0353a 222 } \
tushki7 0:60d829a0353a 223 } \
tushki7 0:60d829a0353a 224 else if((__HANDLE__)->Instance == USART2) \
tushki7 0:60d829a0353a 225 { \
tushki7 0:60d829a0353a 226 switch(__HAL_RCC_GET_USART2_SOURCE()) \
tushki7 0:60d829a0353a 227 { \
tushki7 0:60d829a0353a 228 case RCC_USART2CLKSOURCE_PCLK1: \
tushki7 0:60d829a0353a 229 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 230 break; \
tushki7 0:60d829a0353a 231 case RCC_USART2CLKSOURCE_HSI: \
tushki7 0:60d829a0353a 232 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
tushki7 0:60d829a0353a 233 break; \
tushki7 0:60d829a0353a 234 case RCC_USART2CLKSOURCE_SYSCLK: \
tushki7 0:60d829a0353a 235 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
tushki7 0:60d829a0353a 236 break; \
tushki7 0:60d829a0353a 237 case RCC_USART2CLKSOURCE_LSE: \
tushki7 0:60d829a0353a 238 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
tushki7 0:60d829a0353a 239 break; \
tushki7 0:60d829a0353a 240 default: \
tushki7 0:60d829a0353a 241 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 242 break; \
tushki7 0:60d829a0353a 243 } \
tushki7 0:60d829a0353a 244 } \
tushki7 0:60d829a0353a 245 else if((__HANDLE__)->Instance == USART3) \
tushki7 0:60d829a0353a 246 { \
tushki7 0:60d829a0353a 247 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 248 } \
tushki7 0:60d829a0353a 249 else if((__HANDLE__)->Instance == USART4) \
tushki7 0:60d829a0353a 250 { \
tushki7 0:60d829a0353a 251 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 252 } \
tushki7 0:60d829a0353a 253 else \
tushki7 0:60d829a0353a 254 { \
tushki7 0:60d829a0353a 255 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 256 } \
tushki7 0:60d829a0353a 257 } while(0)
tushki7 0:60d829a0353a 258 #elif defined(STM32F091xC) || defined (STM32F098xx)
tushki7 0:60d829a0353a 259 #define __HAL_USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
tushki7 0:60d829a0353a 260 do { \
tushki7 0:60d829a0353a 261 if((__HANDLE__)->Instance == USART1) \
tushki7 0:60d829a0353a 262 { \
tushki7 0:60d829a0353a 263 switch(__HAL_RCC_GET_USART1_SOURCE()) \
tushki7 0:60d829a0353a 264 { \
tushki7 0:60d829a0353a 265 case RCC_USART1CLKSOURCE_PCLK1: \
tushki7 0:60d829a0353a 266 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 267 break; \
tushki7 0:60d829a0353a 268 case RCC_USART1CLKSOURCE_HSI: \
tushki7 0:60d829a0353a 269 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
tushki7 0:60d829a0353a 270 break; \
tushki7 0:60d829a0353a 271 case RCC_USART1CLKSOURCE_SYSCLK: \
tushki7 0:60d829a0353a 272 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
tushki7 0:60d829a0353a 273 break; \
tushki7 0:60d829a0353a 274 case RCC_USART1CLKSOURCE_LSE: \
tushki7 0:60d829a0353a 275 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
tushki7 0:60d829a0353a 276 break; \
tushki7 0:60d829a0353a 277 default: \
tushki7 0:60d829a0353a 278 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 279 break; \
tushki7 0:60d829a0353a 280 } \
tushki7 0:60d829a0353a 281 } \
tushki7 0:60d829a0353a 282 else if((__HANDLE__)->Instance == USART2) \
tushki7 0:60d829a0353a 283 { \
tushki7 0:60d829a0353a 284 switch(__HAL_RCC_GET_USART2_SOURCE()) \
tushki7 0:60d829a0353a 285 { \
tushki7 0:60d829a0353a 286 case RCC_USART2CLKSOURCE_PCLK1: \
tushki7 0:60d829a0353a 287 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 288 break; \
tushki7 0:60d829a0353a 289 case RCC_USART2CLKSOURCE_HSI: \
tushki7 0:60d829a0353a 290 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
tushki7 0:60d829a0353a 291 break; \
tushki7 0:60d829a0353a 292 case RCC_USART2CLKSOURCE_SYSCLK: \
tushki7 0:60d829a0353a 293 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
tushki7 0:60d829a0353a 294 break; \
tushki7 0:60d829a0353a 295 case RCC_USART2CLKSOURCE_LSE: \
tushki7 0:60d829a0353a 296 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
tushki7 0:60d829a0353a 297 break; \
tushki7 0:60d829a0353a 298 default: \
tushki7 0:60d829a0353a 299 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 300 break; \
tushki7 0:60d829a0353a 301 } \
tushki7 0:60d829a0353a 302 } \
tushki7 0:60d829a0353a 303 else if((__HANDLE__)->Instance == USART3) \
tushki7 0:60d829a0353a 304 { \
tushki7 0:60d829a0353a 305 switch(__HAL_RCC_GET_USART3_SOURCE()) \
tushki7 0:60d829a0353a 306 { \
tushki7 0:60d829a0353a 307 case RCC_USART3CLKSOURCE_PCLK1: \
tushki7 0:60d829a0353a 308 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 309 break; \
tushki7 0:60d829a0353a 310 case RCC_USART3CLKSOURCE_HSI: \
tushki7 0:60d829a0353a 311 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
tushki7 0:60d829a0353a 312 break; \
tushki7 0:60d829a0353a 313 case RCC_USART3CLKSOURCE_SYSCLK: \
tushki7 0:60d829a0353a 314 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
tushki7 0:60d829a0353a 315 break; \
tushki7 0:60d829a0353a 316 case RCC_USART3CLKSOURCE_LSE: \
tushki7 0:60d829a0353a 317 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
tushki7 0:60d829a0353a 318 break; \
tushki7 0:60d829a0353a 319 default: \
tushki7 0:60d829a0353a 320 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 321 break; \
tushki7 0:60d829a0353a 322 } \
tushki7 0:60d829a0353a 323 } \
tushki7 0:60d829a0353a 324 else if((__HANDLE__)->Instance == USART4) \
tushki7 0:60d829a0353a 325 { \
tushki7 0:60d829a0353a 326 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 327 } \
tushki7 0:60d829a0353a 328 else if((__HANDLE__)->Instance == USART5) \
tushki7 0:60d829a0353a 329 { \
tushki7 0:60d829a0353a 330 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 331 } \
tushki7 0:60d829a0353a 332 else if((__HANDLE__)->Instance == USART6) \
tushki7 0:60d829a0353a 333 { \
tushki7 0:60d829a0353a 334 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 335 } \
tushki7 0:60d829a0353a 336 else if((__HANDLE__)->Instance == USART7) \
tushki7 0:60d829a0353a 337 { \
tushki7 0:60d829a0353a 338 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 339 } \
tushki7 0:60d829a0353a 340 else if((__HANDLE__)->Instance == USART8) \
tushki7 0:60d829a0353a 341 { \
tushki7 0:60d829a0353a 342 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 343 } \
tushki7 0:60d829a0353a 344 else \
tushki7 0:60d829a0353a 345 { \
tushki7 0:60d829a0353a 346 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 347 } \
tushki7 0:60d829a0353a 348 } while(0)
tushki7 0:60d829a0353a 349 #elif defined(STM32F030xC)
tushki7 0:60d829a0353a 350 #define __HAL_USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
tushki7 0:60d829a0353a 351 do { \
tushki7 0:60d829a0353a 352 if((__HANDLE__)->Instance == USART1) \
tushki7 0:60d829a0353a 353 { \
tushki7 0:60d829a0353a 354 switch(__HAL_RCC_GET_USART1_SOURCE()) \
tushki7 0:60d829a0353a 355 { \
tushki7 0:60d829a0353a 356 case RCC_USART1CLKSOURCE_PCLK1: \
tushki7 0:60d829a0353a 357 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 358 break; \
tushki7 0:60d829a0353a 359 case RCC_USART1CLKSOURCE_HSI: \
tushki7 0:60d829a0353a 360 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
tushki7 0:60d829a0353a 361 break; \
tushki7 0:60d829a0353a 362 case RCC_USART1CLKSOURCE_SYSCLK: \
tushki7 0:60d829a0353a 363 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
tushki7 0:60d829a0353a 364 break; \
tushki7 0:60d829a0353a 365 case RCC_USART1CLKSOURCE_LSE: \
tushki7 0:60d829a0353a 366 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
tushki7 0:60d829a0353a 367 break; \
tushki7 0:60d829a0353a 368 default: \
tushki7 0:60d829a0353a 369 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 370 break; \
tushki7 0:60d829a0353a 371 } \
tushki7 0:60d829a0353a 372 } \
tushki7 0:60d829a0353a 373 else if((__HANDLE__)->Instance == USART2) \
tushki7 0:60d829a0353a 374 { \
tushki7 0:60d829a0353a 375 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 376 } \
tushki7 0:60d829a0353a 377 else if((__HANDLE__)->Instance == USART3) \
tushki7 0:60d829a0353a 378 { \
tushki7 0:60d829a0353a 379 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 380 } \
tushki7 0:60d829a0353a 381 else if((__HANDLE__)->Instance == USART4) \
tushki7 0:60d829a0353a 382 { \
tushki7 0:60d829a0353a 383 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 384 } \
tushki7 0:60d829a0353a 385 else if((__HANDLE__)->Instance == USART5) \
tushki7 0:60d829a0353a 386 { \
tushki7 0:60d829a0353a 387 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 388 } \
tushki7 0:60d829a0353a 389 else if((__HANDLE__)->Instance == USART6) \
tushki7 0:60d829a0353a 390 { \
tushki7 0:60d829a0353a 391 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
tushki7 0:60d829a0353a 392 } \
tushki7 0:60d829a0353a 393 else \
tushki7 0:60d829a0353a 394 { \
tushki7 0:60d829a0353a 395 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
tushki7 0:60d829a0353a 396 } \
tushki7 0:60d829a0353a 397 } while(0)
tushki7 0:60d829a0353a 398 #endif /* defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) */
tushki7 0:60d829a0353a 399
tushki7 0:60d829a0353a 400
tushki7 0:60d829a0353a 401 /** @brief Reports the USART mask to apply to retrieve the received data
tushki7 0:60d829a0353a 402 * according to the word length and to the parity bits activation.
tushki7 0:60d829a0353a 403 * If PCE = 1, the parity bit is not included in the data extracted
tushki7 0:60d829a0353a 404 * by the reception API().
tushki7 0:60d829a0353a 405 * This masking operation is not carried out in the case of
tushki7 0:60d829a0353a 406 * DMA transfers.
tushki7 0:60d829a0353a 407 * @param __HANDLE__: specifies the USART Handle
tushki7 0:60d829a0353a 408 * @retval none
tushki7 0:60d829a0353a 409 */
tushki7 0:60d829a0353a 410 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
tushki7 0:60d829a0353a 411 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
tushki7 0:60d829a0353a 412 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
tushki7 0:60d829a0353a 413 #define __HAL_USART_MASK_COMPUTATION(__HANDLE__) \
tushki7 0:60d829a0353a 414 do { \
tushki7 0:60d829a0353a 415 if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
tushki7 0:60d829a0353a 416 { \
tushki7 0:60d829a0353a 417 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
tushki7 0:60d829a0353a 418 { \
tushki7 0:60d829a0353a 419 (__HANDLE__)->Mask = 0x01FF ; \
tushki7 0:60d829a0353a 420 } \
tushki7 0:60d829a0353a 421 else \
tushki7 0:60d829a0353a 422 { \
tushki7 0:60d829a0353a 423 (__HANDLE__)->Mask = 0x00FF ; \
tushki7 0:60d829a0353a 424 } \
tushki7 0:60d829a0353a 425 } \
tushki7 0:60d829a0353a 426 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
tushki7 0:60d829a0353a 427 { \
tushki7 0:60d829a0353a 428 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
tushki7 0:60d829a0353a 429 { \
tushki7 0:60d829a0353a 430 (__HANDLE__)->Mask = 0x00FF ; \
tushki7 0:60d829a0353a 431 } \
tushki7 0:60d829a0353a 432 else \
tushki7 0:60d829a0353a 433 { \
tushki7 0:60d829a0353a 434 (__HANDLE__)->Mask = 0x007F ; \
tushki7 0:60d829a0353a 435 } \
tushki7 0:60d829a0353a 436 } \
tushki7 0:60d829a0353a 437 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \
tushki7 0:60d829a0353a 438 { \
tushki7 0:60d829a0353a 439 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
tushki7 0:60d829a0353a 440 { \
tushki7 0:60d829a0353a 441 (__HANDLE__)->Mask = 0x007F ; \
tushki7 0:60d829a0353a 442 } \
tushki7 0:60d829a0353a 443 else \
tushki7 0:60d829a0353a 444 { \
tushki7 0:60d829a0353a 445 (__HANDLE__)->Mask = 0x003F ; \
tushki7 0:60d829a0353a 446 } \
tushki7 0:60d829a0353a 447 } \
tushki7 0:60d829a0353a 448 } while(0)
tushki7 0:60d829a0353a 449 #else
tushki7 0:60d829a0353a 450 #define __HAL_USART_MASK_COMPUTATION(__HANDLE__) \
tushki7 0:60d829a0353a 451 do { \
tushki7 0:60d829a0353a 452 if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
tushki7 0:60d829a0353a 453 { \
tushki7 0:60d829a0353a 454 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
tushki7 0:60d829a0353a 455 { \
tushki7 0:60d829a0353a 456 (__HANDLE__)->Mask = 0x01FF ; \
tushki7 0:60d829a0353a 457 } \
tushki7 0:60d829a0353a 458 else \
tushki7 0:60d829a0353a 459 { \
tushki7 0:60d829a0353a 460 (__HANDLE__)->Mask = 0x00FF ; \
tushki7 0:60d829a0353a 461 } \
tushki7 0:60d829a0353a 462 } \
tushki7 0:60d829a0353a 463 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
tushki7 0:60d829a0353a 464 { \
tushki7 0:60d829a0353a 465 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
tushki7 0:60d829a0353a 466 { \
tushki7 0:60d829a0353a 467 (__HANDLE__)->Mask = 0x00FF ; \
tushki7 0:60d829a0353a 468 } \
tushki7 0:60d829a0353a 469 else \
tushki7 0:60d829a0353a 470 { \
tushki7 0:60d829a0353a 471 (__HANDLE__)->Mask = 0x007F ; \
tushki7 0:60d829a0353a 472 } \
tushki7 0:60d829a0353a 473 } \
tushki7 0:60d829a0353a 474 } while(0)
tushki7 0:60d829a0353a 475 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
tushki7 0:60d829a0353a 476 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
tushki7 0:60d829a0353a 477 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
tushki7 0:60d829a0353a 478 /**
tushki7 0:60d829a0353a 479 * @}
tushki7 0:60d829a0353a 480 */
tushki7 0:60d829a0353a 481
tushki7 0:60d829a0353a 482 /* Exported functions --------------------------------------------------------*/
tushki7 0:60d829a0353a 483 /* Initialization and de-initialization functions ****************************/
tushki7 0:60d829a0353a 484 /* I/O operation functions ***************************************************/
tushki7 0:60d829a0353a 485 /* Peripheral Control functions **********************************************/
tushki7 0:60d829a0353a 486 /* Peripheral State functions ************************************************/
tushki7 0:60d829a0353a 487
tushki7 0:60d829a0353a 488 /**
tushki7 0:60d829a0353a 489 * @}
tushki7 0:60d829a0353a 490 */
tushki7 0:60d829a0353a 491
tushki7 0:60d829a0353a 492 /**
tushki7 0:60d829a0353a 493 * @}
tushki7 0:60d829a0353a 494 */
tushki7 0:60d829a0353a 495
tushki7 0:60d829a0353a 496 #ifdef __cplusplus
tushki7 0:60d829a0353a 497 }
tushki7 0:60d829a0353a 498 #endif
tushki7 0:60d829a0353a 499
tushki7 0:60d829a0353a 500 #endif /* __STM32F0xx_HAL_USART_EX_H */
tushki7 0:60d829a0353a 501
tushki7 0:60d829a0353a 502 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
tushki7 0:60d829a0353a 503