Tushar Sachdeva / FRDM_K64F_LCD

A simple 128x32 graphical LCD program to quickstart with LCD on ARM mbed IoT Starter Kit. This requires mbed Applciation Shield with FRDM-K64F platform.

Dependencies:   C12832

mbed/TARGET_NUCLEO_F030R8/core_cmInstr.h@1:eb68c94a8ee5, 2015-04-12 (annotated)

Committer:
tushki7
Date:
Sun Apr 12 15:45:52 2015 +0000
Revision:
1:eb68c94a8ee5
Parent:
0:60d829a0353a 
A simple 128x32 LCD program with ARM mbed IoT Starter Kit;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tushki7 0:60d829a0353a 1 /**************************************************************************//**
tushki7 0:60d829a0353a 2 * @file core_cmInstr.h
tushki7 0:60d829a0353a 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
tushki7 0:60d829a0353a 4 * @version V3.20
tushki7 0:60d829a0353a 5 * @date 05. March 2013
tushki7 0:60d829a0353a 6 *
tushki7 0:60d829a0353a 7 * @note
tushki7 0:60d829a0353a 8 *
tushki7 0:60d829a0353a 9 ******************************************************************************/
tushki7 0:60d829a0353a 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
tushki7 0:60d829a0353a 11
tushki7 0:60d829a0353a 12 All rights reserved.
tushki7 0:60d829a0353a 13 Redistribution and use in source and binary forms, with or without
tushki7 0:60d829a0353a 14 modification, are permitted provided that the following conditions are met:
tushki7 0:60d829a0353a 15 - Redistributions of source code must retain the above copyright
tushki7 0:60d829a0353a 16 notice, this list of conditions and the following disclaimer.
tushki7 0:60d829a0353a 17 - Redistributions in binary form must reproduce the above copyright
tushki7 0:60d829a0353a 18 notice, this list of conditions and the following disclaimer in the
tushki7 0:60d829a0353a 19 documentation and/or other materials provided with the distribution.
tushki7 0:60d829a0353a 20 - Neither the name of ARM nor the names of its contributors may be used
tushki7 0:60d829a0353a 21 to endorse or promote products derived from this software without
tushki7 0:60d829a0353a 22 specific prior written permission.
tushki7 0:60d829a0353a 23 *
tushki7 0:60d829a0353a 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
tushki7 0:60d829a0353a 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
tushki7 0:60d829a0353a 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
tushki7 0:60d829a0353a 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
tushki7 0:60d829a0353a 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
tushki7 0:60d829a0353a 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
tushki7 0:60d829a0353a 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
tushki7 0:60d829a0353a 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
tushki7 0:60d829a0353a 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
tushki7 0:60d829a0353a 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
tushki7 0:60d829a0353a 34 POSSIBILITY OF SUCH DAMAGE.
tushki7 0:60d829a0353a 35 ---------------------------------------------------------------------------*/
tushki7 0:60d829a0353a 36
tushki7 0:60d829a0353a 37
tushki7 0:60d829a0353a 38 #ifndef __CORE_CMINSTR_H
tushki7 0:60d829a0353a 39 #define __CORE_CMINSTR_H
tushki7 0:60d829a0353a 40
tushki7 0:60d829a0353a 41
tushki7 0:60d829a0353a 42 /* ########################## Core Instruction Access ######################### */
tushki7 0:60d829a0353a 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
tushki7 0:60d829a0353a 44 Access to dedicated instructions
tushki7 0:60d829a0353a 45 @{
tushki7 0:60d829a0353a 46 */
tushki7 0:60d829a0353a 47
tushki7 0:60d829a0353a 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
tushki7 0:60d829a0353a 49 /* ARM armcc specific functions */
tushki7 0:60d829a0353a 50
tushki7 0:60d829a0353a 51 #if (__ARMCC_VERSION < 400677)
tushki7 0:60d829a0353a 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
tushki7 0:60d829a0353a 53 #endif
tushki7 0:60d829a0353a 54
tushki7 0:60d829a0353a 55
tushki7 0:60d829a0353a 56 /** \brief No Operation
tushki7 0:60d829a0353a 57
tushki7 0:60d829a0353a 58 No Operation does nothing. This instruction can be used for code alignment purposes.
tushki7 0:60d829a0353a 59 */
tushki7 0:60d829a0353a 60 #define __NOP __nop
tushki7 0:60d829a0353a 61
tushki7 0:60d829a0353a 62
tushki7 0:60d829a0353a 63 /** \brief Wait For Interrupt
tushki7 0:60d829a0353a 64
tushki7 0:60d829a0353a 65 Wait For Interrupt is a hint instruction that suspends execution
tushki7 0:60d829a0353a 66 until one of a number of events occurs.
tushki7 0:60d829a0353a 67 */
tushki7 0:60d829a0353a 68 #define __WFI __wfi
tushki7 0:60d829a0353a 69
tushki7 0:60d829a0353a 70
tushki7 0:60d829a0353a 71 /** \brief Wait For Event
tushki7 0:60d829a0353a 72
tushki7 0:60d829a0353a 73 Wait For Event is a hint instruction that permits the processor to enter
tushki7 0:60d829a0353a 74 a low-power state until one of a number of events occurs.
tushki7 0:60d829a0353a 75 */
tushki7 0:60d829a0353a 76 #define __WFE __wfe
tushki7 0:60d829a0353a 77
tushki7 0:60d829a0353a 78
tushki7 0:60d829a0353a 79 /** \brief Send Event
tushki7 0:60d829a0353a 80
tushki7 0:60d829a0353a 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
tushki7 0:60d829a0353a 82 */
tushki7 0:60d829a0353a 83 #define __SEV __sev
tushki7 0:60d829a0353a 84
tushki7 0:60d829a0353a 85
tushki7 0:60d829a0353a 86 /** \brief Instruction Synchronization Barrier
tushki7 0:60d829a0353a 87
tushki7 0:60d829a0353a 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
tushki7 0:60d829a0353a 89 so that all instructions following the ISB are fetched from cache or
tushki7 0:60d829a0353a 90 memory, after the instruction has been completed.
tushki7 0:60d829a0353a 91 */
tushki7 0:60d829a0353a 92 #define __ISB() __isb(0xF)
tushki7 0:60d829a0353a 93
tushki7 0:60d829a0353a 94
tushki7 0:60d829a0353a 95 /** \brief Data Synchronization Barrier
tushki7 0:60d829a0353a 96
tushki7 0:60d829a0353a 97 This function acts as a special kind of Data Memory Barrier.
tushki7 0:60d829a0353a 98 It completes when all explicit memory accesses before this instruction complete.
tushki7 0:60d829a0353a 99 */
tushki7 0:60d829a0353a 100 #define __DSB() __dsb(0xF)
tushki7 0:60d829a0353a 101
tushki7 0:60d829a0353a 102
tushki7 0:60d829a0353a 103 /** \brief Data Memory Barrier
tushki7 0:60d829a0353a 104
tushki7 0:60d829a0353a 105 This function ensures the apparent order of the explicit memory operations before
tushki7 0:60d829a0353a 106 and after the instruction, without ensuring their completion.
tushki7 0:60d829a0353a 107 */
tushki7 0:60d829a0353a 108 #define __DMB() __dmb(0xF)
tushki7 0:60d829a0353a 109
tushki7 0:60d829a0353a 110
tushki7 0:60d829a0353a 111 /** \brief Reverse byte order (32 bit)
tushki7 0:60d829a0353a 112
tushki7 0:60d829a0353a 113 This function reverses the byte order in integer value.
tushki7 0:60d829a0353a 114
tushki7 0:60d829a0353a 115 \param [in] value Value to reverse
tushki7 0:60d829a0353a 116 \return Reversed value
tushki7 0:60d829a0353a 117 */
tushki7 0:60d829a0353a 118 #define __REV __rev
tushki7 0:60d829a0353a 119
tushki7 0:60d829a0353a 120
tushki7 0:60d829a0353a 121 /** \brief Reverse byte order (16 bit)
tushki7 0:60d829a0353a 122
tushki7 0:60d829a0353a 123 This function reverses the byte order in two unsigned short values.
tushki7 0:60d829a0353a 124
tushki7 0:60d829a0353a 125 \param [in] value Value to reverse
tushki7 0:60d829a0353a 126 \return Reversed value
tushki7 0:60d829a0353a 127 */
tushki7 0:60d829a0353a 128 #ifndef __NO_EMBEDDED_ASM
tushki7 0:60d829a0353a 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
tushki7 0:60d829a0353a 130 {
tushki7 0:60d829a0353a 131 rev16 r0, r0
tushki7 0:60d829a0353a 132 bx lr
tushki7 0:60d829a0353a 133 }
tushki7 0:60d829a0353a 134 #endif
tushki7 0:60d829a0353a 135
tushki7 0:60d829a0353a 136 /** \brief Reverse byte order in signed short value
tushki7 0:60d829a0353a 137
tushki7 0:60d829a0353a 138 This function reverses the byte order in a signed short value with sign extension to integer.
tushki7 0:60d829a0353a 139
tushki7 0:60d829a0353a 140 \param [in] value Value to reverse
tushki7 0:60d829a0353a 141 \return Reversed value
tushki7 0:60d829a0353a 142 */
tushki7 0:60d829a0353a 143 #ifndef __NO_EMBEDDED_ASM
tushki7 0:60d829a0353a 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
tushki7 0:60d829a0353a 145 {
tushki7 0:60d829a0353a 146 revsh r0, r0
tushki7 0:60d829a0353a 147 bx lr
tushki7 0:60d829a0353a 148 }
tushki7 0:60d829a0353a 149 #endif
tushki7 0:60d829a0353a 150
tushki7 0:60d829a0353a 151
tushki7 0:60d829a0353a 152 /** \brief Rotate Right in unsigned value (32 bit)
tushki7 0:60d829a0353a 153
tushki7 0:60d829a0353a 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
tushki7 0:60d829a0353a 155
tushki7 0:60d829a0353a 156 \param [in] value Value to rotate
tushki7 0:60d829a0353a 157 \param [in] value Number of Bits to rotate
tushki7 0:60d829a0353a 158 \return Rotated value
tushki7 0:60d829a0353a 159 */
tushki7 0:60d829a0353a 160 #define __ROR __ror
tushki7 0:60d829a0353a 161
tushki7 0:60d829a0353a 162
tushki7 0:60d829a0353a 163 /** \brief Breakpoint
tushki7 0:60d829a0353a 164
tushki7 0:60d829a0353a 165 This function causes the processor to enter Debug state.
tushki7 0:60d829a0353a 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
tushki7 0:60d829a0353a 167
tushki7 0:60d829a0353a 168 \param [in] value is ignored by the processor.
tushki7 0:60d829a0353a 169 If required, a debugger can use it to store additional information about the breakpoint.
tushki7 0:60d829a0353a 170 */
tushki7 0:60d829a0353a 171 #define __BKPT(value) __breakpoint(value)
tushki7 0:60d829a0353a 172
tushki7 0:60d829a0353a 173
tushki7 0:60d829a0353a 174 #if (__CORTEX_M >= 0x03)
tushki7 0:60d829a0353a 175
tushki7 0:60d829a0353a 176 /** \brief Reverse bit order of value
tushki7 0:60d829a0353a 177
tushki7 0:60d829a0353a 178 This function reverses the bit order of the given value.
tushki7 0:60d829a0353a 179
tushki7 0:60d829a0353a 180 \param [in] value Value to reverse
tushki7 0:60d829a0353a 181 \return Reversed value
tushki7 0:60d829a0353a 182 */
tushki7 0:60d829a0353a 183 #define __RBIT __rbit
tushki7 0:60d829a0353a 184
tushki7 0:60d829a0353a 185
tushki7 0:60d829a0353a 186 /** \brief LDR Exclusive (8 bit)
tushki7 0:60d829a0353a 187
tushki7 0:60d829a0353a 188 This function performs a exclusive LDR command for 8 bit value.
tushki7 0:60d829a0353a 189
tushki7 0:60d829a0353a 190 \param [in] ptr Pointer to data
tushki7 0:60d829a0353a 191 \return value of type uint8_t at (*ptr)
tushki7 0:60d829a0353a 192 */
tushki7 0:60d829a0353a 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
tushki7 0:60d829a0353a 194
tushki7 0:60d829a0353a 195
tushki7 0:60d829a0353a 196 /** \brief LDR Exclusive (16 bit)
tushki7 0:60d829a0353a 197
tushki7 0:60d829a0353a 198 This function performs a exclusive LDR command for 16 bit values.
tushki7 0:60d829a0353a 199
tushki7 0:60d829a0353a 200 \param [in] ptr Pointer to data
tushki7 0:60d829a0353a 201 \return value of type uint16_t at (*ptr)
tushki7 0:60d829a0353a 202 */
tushki7 0:60d829a0353a 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
tushki7 0:60d829a0353a 204
tushki7 0:60d829a0353a 205
tushki7 0:60d829a0353a 206 /** \brief LDR Exclusive (32 bit)
tushki7 0:60d829a0353a 207
tushki7 0:60d829a0353a 208 This function performs a exclusive LDR command for 32 bit values.
tushki7 0:60d829a0353a 209
tushki7 0:60d829a0353a 210 \param [in] ptr Pointer to data
tushki7 0:60d829a0353a 211 \return value of type uint32_t at (*ptr)
tushki7 0:60d829a0353a 212 */
tushki7 0:60d829a0353a 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
tushki7 0:60d829a0353a 214
tushki7 0:60d829a0353a 215
tushki7 0:60d829a0353a 216 /** \brief STR Exclusive (8 bit)
tushki7 0:60d829a0353a 217
tushki7 0:60d829a0353a 218 This function performs a exclusive STR command for 8 bit values.
tushki7 0:60d829a0353a 219
tushki7 0:60d829a0353a 220 \param [in] value Value to store
tushki7 0:60d829a0353a 221 \param [in] ptr Pointer to location
tushki7 0:60d829a0353a 222 \return 0 Function succeeded
tushki7 0:60d829a0353a 223 \return 1 Function failed
tushki7 0:60d829a0353a 224 */
tushki7 0:60d829a0353a 225 #define __STREXB(value, ptr) __strex(value, ptr)
tushki7 0:60d829a0353a 226
tushki7 0:60d829a0353a 227
tushki7 0:60d829a0353a 228 /** \brief STR Exclusive (16 bit)
tushki7 0:60d829a0353a 229
tushki7 0:60d829a0353a 230 This function performs a exclusive STR command for 16 bit values.
tushki7 0:60d829a0353a 231
tushki7 0:60d829a0353a 232 \param [in] value Value to store
tushki7 0:60d829a0353a 233 \param [in] ptr Pointer to location
tushki7 0:60d829a0353a 234 \return 0 Function succeeded
tushki7 0:60d829a0353a 235 \return 1 Function failed
tushki7 0:60d829a0353a 236 */
tushki7 0:60d829a0353a 237 #define __STREXH(value, ptr) __strex(value, ptr)
tushki7 0:60d829a0353a 238
tushki7 0:60d829a0353a 239
tushki7 0:60d829a0353a 240 /** \brief STR Exclusive (32 bit)
tushki7 0:60d829a0353a 241
tushki7 0:60d829a0353a 242 This function performs a exclusive STR command for 32 bit values.
tushki7 0:60d829a0353a 243
tushki7 0:60d829a0353a 244 \param [in] value Value to store
tushki7 0:60d829a0353a 245 \param [in] ptr Pointer to location
tushki7 0:60d829a0353a 246 \return 0 Function succeeded
tushki7 0:60d829a0353a 247 \return 1 Function failed
tushki7 0:60d829a0353a 248 */
tushki7 0:60d829a0353a 249 #define __STREXW(value, ptr) __strex(value, ptr)
tushki7 0:60d829a0353a 250
tushki7 0:60d829a0353a 251
tushki7 0:60d829a0353a 252 /** \brief Remove the exclusive lock
tushki7 0:60d829a0353a 253
tushki7 0:60d829a0353a 254 This function removes the exclusive lock which is created by LDREX.
tushki7 0:60d829a0353a 255
tushki7 0:60d829a0353a 256 */
tushki7 0:60d829a0353a 257 #define __CLREX __clrex
tushki7 0:60d829a0353a 258
tushki7 0:60d829a0353a 259
tushki7 0:60d829a0353a 260 /** \brief Signed Saturate
tushki7 0:60d829a0353a 261
tushki7 0:60d829a0353a 262 This function saturates a signed value.
tushki7 0:60d829a0353a 263
tushki7 0:60d829a0353a 264 \param [in] value Value to be saturated
tushki7 0:60d829a0353a 265 \param [in] sat Bit position to saturate to (1..32)
tushki7 0:60d829a0353a 266 \return Saturated value
tushki7 0:60d829a0353a 267 */
tushki7 0:60d829a0353a 268 #define __SSAT __ssat
tushki7 0:60d829a0353a 269
tushki7 0:60d829a0353a 270
tushki7 0:60d829a0353a 271 /** \brief Unsigned Saturate
tushki7 0:60d829a0353a 272
tushki7 0:60d829a0353a 273 This function saturates an unsigned value.
tushki7 0:60d829a0353a 274
tushki7 0:60d829a0353a 275 \param [in] value Value to be saturated
tushki7 0:60d829a0353a 276 \param [in] sat Bit position to saturate to (0..31)
tushki7 0:60d829a0353a 277 \return Saturated value
tushki7 0:60d829a0353a 278 */
tushki7 0:60d829a0353a 279 #define __USAT __usat
tushki7 0:60d829a0353a 280
tushki7 0:60d829a0353a 281
tushki7 0:60d829a0353a 282 /** \brief Count leading zeros
tushki7 0:60d829a0353a 283
tushki7 0:60d829a0353a 284 This function counts the number of leading zeros of a data value.
tushki7 0:60d829a0353a 285
tushki7 0:60d829a0353a 286 \param [in] value Value to count the leading zeros
tushki7 0:60d829a0353a 287 \return number of leading zeros in value
tushki7 0:60d829a0353a 288 */
tushki7 0:60d829a0353a 289 #define __CLZ __clz
tushki7 0:60d829a0353a 290
tushki7 0:60d829a0353a 291 #endif /* (__CORTEX_M >= 0x03) */
tushki7 0:60d829a0353a 292
tushki7 0:60d829a0353a 293
tushki7 0:60d829a0353a 294
tushki7 0:60d829a0353a 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
tushki7 0:60d829a0353a 296 /* IAR iccarm specific functions */
tushki7 0:60d829a0353a 297
tushki7 0:60d829a0353a 298 #include <cmsis_iar.h>
tushki7 0:60d829a0353a 299
tushki7 0:60d829a0353a 300
tushki7 0:60d829a0353a 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
tushki7 0:60d829a0353a 302 /* TI CCS specific functions */
tushki7 0:60d829a0353a 303
tushki7 0:60d829a0353a 304 #include <cmsis_ccs.h>
tushki7 0:60d829a0353a 305
tushki7 0:60d829a0353a 306
tushki7 0:60d829a0353a 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
tushki7 0:60d829a0353a 308 /* GNU gcc specific functions */
tushki7 0:60d829a0353a 309
tushki7 0:60d829a0353a 310 /* Define macros for porting to both thumb1 and thumb2.
tushki7 0:60d829a0353a 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
tushki7 0:60d829a0353a 312 * Otherwise, use general registers, specified by constrant "r" */
tushki7 0:60d829a0353a 313 #if defined (__thumb__) && !defined (__thumb2__)
tushki7 0:60d829a0353a 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
tushki7 0:60d829a0353a 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
tushki7 0:60d829a0353a 316 #else
tushki7 0:60d829a0353a 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
tushki7 0:60d829a0353a 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
tushki7 0:60d829a0353a 319 #endif
tushki7 0:60d829a0353a 320
tushki7 0:60d829a0353a 321 /** \brief No Operation
tushki7 0:60d829a0353a 322
tushki7 0:60d829a0353a 323 No Operation does nothing. This instruction can be used for code alignment purposes.
tushki7 0:60d829a0353a 324 */
tushki7 0:60d829a0353a 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
tushki7 0:60d829a0353a 326 {
tushki7 0:60d829a0353a 327 __ASM volatile ("nop");
tushki7 0:60d829a0353a 328 }
tushki7 0:60d829a0353a 329
tushki7 0:60d829a0353a 330
tushki7 0:60d829a0353a 331 /** \brief Wait For Interrupt
tushki7 0:60d829a0353a 332
tushki7 0:60d829a0353a 333 Wait For Interrupt is a hint instruction that suspends execution
tushki7 0:60d829a0353a 334 until one of a number of events occurs.
tushki7 0:60d829a0353a 335 */
tushki7 0:60d829a0353a 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
tushki7 0:60d829a0353a 337 {
tushki7 0:60d829a0353a 338 __ASM volatile ("wfi");
tushki7 0:60d829a0353a 339 }
tushki7 0:60d829a0353a 340
tushki7 0:60d829a0353a 341
tushki7 0:60d829a0353a 342 /** \brief Wait For Event
tushki7 0:60d829a0353a 343
tushki7 0:60d829a0353a 344 Wait For Event is a hint instruction that permits the processor to enter
tushki7 0:60d829a0353a 345 a low-power state until one of a number of events occurs.
tushki7 0:60d829a0353a 346 */
tushki7 0:60d829a0353a 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
tushki7 0:60d829a0353a 348 {
tushki7 0:60d829a0353a 349 __ASM volatile ("wfe");
tushki7 0:60d829a0353a 350 }
tushki7 0:60d829a0353a 351
tushki7 0:60d829a0353a 352
tushki7 0:60d829a0353a 353 /** \brief Send Event
tushki7 0:60d829a0353a 354
tushki7 0:60d829a0353a 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
tushki7 0:60d829a0353a 356 */
tushki7 0:60d829a0353a 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
tushki7 0:60d829a0353a 358 {
tushki7 0:60d829a0353a 359 __ASM volatile ("sev");
tushki7 0:60d829a0353a 360 }
tushki7 0:60d829a0353a 361
tushki7 0:60d829a0353a 362
tushki7 0:60d829a0353a 363 /** \brief Instruction Synchronization Barrier
tushki7 0:60d829a0353a 364
tushki7 0:60d829a0353a 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
tushki7 0:60d829a0353a 366 so that all instructions following the ISB are fetched from cache or
tushki7 0:60d829a0353a 367 memory, after the instruction has been completed.
tushki7 0:60d829a0353a 368 */
tushki7 0:60d829a0353a 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
tushki7 0:60d829a0353a 370 {
tushki7 0:60d829a0353a 371 __ASM volatile ("isb");
tushki7 0:60d829a0353a 372 }
tushki7 0:60d829a0353a 373
tushki7 0:60d829a0353a 374
tushki7 0:60d829a0353a 375 /** \brief Data Synchronization Barrier
tushki7 0:60d829a0353a 376
tushki7 0:60d829a0353a 377 This function acts as a special kind of Data Memory Barrier.
tushki7 0:60d829a0353a 378 It completes when all explicit memory accesses before this instruction complete.
tushki7 0:60d829a0353a 379 */
tushki7 0:60d829a0353a 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
tushki7 0:60d829a0353a 381 {
tushki7 0:60d829a0353a 382 __ASM volatile ("dsb");
tushki7 0:60d829a0353a 383 }
tushki7 0:60d829a0353a 384
tushki7 0:60d829a0353a 385
tushki7 0:60d829a0353a 386 /** \brief Data Memory Barrier
tushki7 0:60d829a0353a 387
tushki7 0:60d829a0353a 388 This function ensures the apparent order of the explicit memory operations before
tushki7 0:60d829a0353a 389 and after the instruction, without ensuring their completion.
tushki7 0:60d829a0353a 390 */
tushki7 0:60d829a0353a 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
tushki7 0:60d829a0353a 392 {
tushki7 0:60d829a0353a 393 __ASM volatile ("dmb");
tushki7 0:60d829a0353a 394 }
tushki7 0:60d829a0353a 395
tushki7 0:60d829a0353a 396
tushki7 0:60d829a0353a 397 /** \brief Reverse byte order (32 bit)
tushki7 0:60d829a0353a 398
tushki7 0:60d829a0353a 399 This function reverses the byte order in integer value.
tushki7 0:60d829a0353a 400
tushki7 0:60d829a0353a 401 \param [in] value Value to reverse
tushki7 0:60d829a0353a 402 \return Reversed value
tushki7 0:60d829a0353a 403 */
tushki7 0:60d829a0353a 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
tushki7 0:60d829a0353a 405 {
tushki7 0:60d829a0353a 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
tushki7 0:60d829a0353a 407 return __builtin_bswap32(value);
tushki7 0:60d829a0353a 408 #else
tushki7 0:60d829a0353a 409 uint32_t result;
tushki7 0:60d829a0353a 410
tushki7 0:60d829a0353a 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
tushki7 0:60d829a0353a 412 return(result);
tushki7 0:60d829a0353a 413 #endif
tushki7 0:60d829a0353a 414 }
tushki7 0:60d829a0353a 415
tushki7 0:60d829a0353a 416
tushki7 0:60d829a0353a 417 /** \brief Reverse byte order (16 bit)
tushki7 0:60d829a0353a 418
tushki7 0:60d829a0353a 419 This function reverses the byte order in two unsigned short values.
tushki7 0:60d829a0353a 420
tushki7 0:60d829a0353a 421 \param [in] value Value to reverse
tushki7 0:60d829a0353a 422 \return Reversed value
tushki7 0:60d829a0353a 423 */
tushki7 0:60d829a0353a 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
tushki7 0:60d829a0353a 425 {
tushki7 0:60d829a0353a 426 uint32_t result;
tushki7 0:60d829a0353a 427
tushki7 0:60d829a0353a 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
tushki7 0:60d829a0353a 429 return(result);
tushki7 0:60d829a0353a 430 }
tushki7 0:60d829a0353a 431
tushki7 0:60d829a0353a 432
tushki7 0:60d829a0353a 433 /** \brief Reverse byte order in signed short value
tushki7 0:60d829a0353a 434
tushki7 0:60d829a0353a 435 This function reverses the byte order in a signed short value with sign extension to integer.
tushki7 0:60d829a0353a 436
tushki7 0:60d829a0353a 437 \param [in] value Value to reverse
tushki7 0:60d829a0353a 438 \return Reversed value
tushki7 0:60d829a0353a 439 */
tushki7 0:60d829a0353a 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
tushki7 0:60d829a0353a 441 {
tushki7 0:60d829a0353a 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
tushki7 0:60d829a0353a 443 return (short)__builtin_bswap16(value);
tushki7 0:60d829a0353a 444 #else
tushki7 0:60d829a0353a 445 uint32_t result;
tushki7 0:60d829a0353a 446
tushki7 0:60d829a0353a 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
tushki7 0:60d829a0353a 448 return(result);
tushki7 0:60d829a0353a 449 #endif
tushki7 0:60d829a0353a 450 }
tushki7 0:60d829a0353a 451
tushki7 0:60d829a0353a 452
tushki7 0:60d829a0353a 453 /** \brief Rotate Right in unsigned value (32 bit)
tushki7 0:60d829a0353a 454
tushki7 0:60d829a0353a 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
tushki7 0:60d829a0353a 456
tushki7 0:60d829a0353a 457 \param [in] value Value to rotate
tushki7 0:60d829a0353a 458 \param [in] value Number of Bits to rotate
tushki7 0:60d829a0353a 459 \return Rotated value
tushki7 0:60d829a0353a 460 */
tushki7 0:60d829a0353a 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
tushki7 0:60d829a0353a 462 {
tushki7 0:60d829a0353a 463 return (op1 >> op2) | (op1 << (32 - op2));
tushki7 0:60d829a0353a 464 }
tushki7 0:60d829a0353a 465
tushki7 0:60d829a0353a 466
tushki7 0:60d829a0353a 467 /** \brief Breakpoint
tushki7 0:60d829a0353a 468
tushki7 0:60d829a0353a 469 This function causes the processor to enter Debug state.
tushki7 0:60d829a0353a 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
tushki7 0:60d829a0353a 471
tushki7 0:60d829a0353a 472 \param [in] value is ignored by the processor.
tushki7 0:60d829a0353a 473 If required, a debugger can use it to store additional information about the breakpoint.
tushki7 0:60d829a0353a 474 */
tushki7 0:60d829a0353a 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
tushki7 0:60d829a0353a 476
tushki7 0:60d829a0353a 477
tushki7 0:60d829a0353a 478 #if (__CORTEX_M >= 0x03)
tushki7 0:60d829a0353a 479
tushki7 0:60d829a0353a 480 /** \brief Reverse bit order of value
tushki7 0:60d829a0353a 481
tushki7 0:60d829a0353a 482 This function reverses the bit order of the given value.
tushki7 0:60d829a0353a 483
tushki7 0:60d829a0353a 484 \param [in] value Value to reverse
tushki7 0:60d829a0353a 485 \return Reversed value
tushki7 0:60d829a0353a 486 */
tushki7 0:60d829a0353a 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
tushki7 0:60d829a0353a 488 {
tushki7 0:60d829a0353a 489 uint32_t result;
tushki7 0:60d829a0353a 490
tushki7 0:60d829a0353a 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
tushki7 0:60d829a0353a 492 return(result);
tushki7 0:60d829a0353a 493 }
tushki7 0:60d829a0353a 494
tushki7 0:60d829a0353a 495
tushki7 0:60d829a0353a 496 /** \brief LDR Exclusive (8 bit)
tushki7 0:60d829a0353a 497
tushki7 0:60d829a0353a 498 This function performs a exclusive LDR command for 8 bit value.
tushki7 0:60d829a0353a 499
tushki7 0:60d829a0353a 500 \param [in] ptr Pointer to data
tushki7 0:60d829a0353a 501 \return value of type uint8_t at (*ptr)
tushki7 0:60d829a0353a 502 */
tushki7 0:60d829a0353a 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
tushki7 0:60d829a0353a 504 {
tushki7 0:60d829a0353a 505 uint32_t result;
tushki7 0:60d829a0353a 506
tushki7 0:60d829a0353a 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
tushki7 0:60d829a0353a 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
tushki7 0:60d829a0353a 509 #else
tushki7 0:60d829a0353a 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
tushki7 0:60d829a0353a 511 accepted by assembler. So has to use following less efficient pattern.
tushki7 0:60d829a0353a 512 */
tushki7 0:60d829a0353a 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
tushki7 0:60d829a0353a 514 #endif
tushki7 0:60d829a0353a 515 return(result);
tushki7 0:60d829a0353a 516 }
tushki7 0:60d829a0353a 517
tushki7 0:60d829a0353a 518
tushki7 0:60d829a0353a 519 /** \brief LDR Exclusive (16 bit)
tushki7 0:60d829a0353a 520
tushki7 0:60d829a0353a 521 This function performs a exclusive LDR command for 16 bit values.
tushki7 0:60d829a0353a 522
tushki7 0:60d829a0353a 523 \param [in] ptr Pointer to data
tushki7 0:60d829a0353a 524 \return value of type uint16_t at (*ptr)
tushki7 0:60d829a0353a 525 */
tushki7 0:60d829a0353a 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
tushki7 0:60d829a0353a 527 {
tushki7 0:60d829a0353a 528 uint32_t result;
tushki7 0:60d829a0353a 529
tushki7 0:60d829a0353a 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
tushki7 0:60d829a0353a 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
tushki7 0:60d829a0353a 532 #else
tushki7 0:60d829a0353a 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
tushki7 0:60d829a0353a 534 accepted by assembler. So has to use following less efficient pattern.
tushki7 0:60d829a0353a 535 */
tushki7 0:60d829a0353a 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
tushki7 0:60d829a0353a 537 #endif
tushki7 0:60d829a0353a 538 return(result);
tushki7 0:60d829a0353a 539 }
tushki7 0:60d829a0353a 540
tushki7 0:60d829a0353a 541
tushki7 0:60d829a0353a 542 /** \brief LDR Exclusive (32 bit)
tushki7 0:60d829a0353a 543
tushki7 0:60d829a0353a 544 This function performs a exclusive LDR command for 32 bit values.
tushki7 0:60d829a0353a 545
tushki7 0:60d829a0353a 546 \param [in] ptr Pointer to data
tushki7 0:60d829a0353a 547 \return value of type uint32_t at (*ptr)
tushki7 0:60d829a0353a 548 */
tushki7 0:60d829a0353a 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
tushki7 0:60d829a0353a 550 {
tushki7 0:60d829a0353a 551 uint32_t result;
tushki7 0:60d829a0353a 552
tushki7 0:60d829a0353a 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
tushki7 0:60d829a0353a 554 return(result);
tushki7 0:60d829a0353a 555 }
tushki7 0:60d829a0353a 556
tushki7 0:60d829a0353a 557
tushki7 0:60d829a0353a 558 /** \brief STR Exclusive (8 bit)
tushki7 0:60d829a0353a 559
tushki7 0:60d829a0353a 560 This function performs a exclusive STR command for 8 bit values.
tushki7 0:60d829a0353a 561
tushki7 0:60d829a0353a 562 \param [in] value Value to store
tushki7 0:60d829a0353a 563 \param [in] ptr Pointer to location
tushki7 0:60d829a0353a 564 \return 0 Function succeeded
tushki7 0:60d829a0353a 565 \return 1 Function failed
tushki7 0:60d829a0353a 566 */
tushki7 0:60d829a0353a 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
tushki7 0:60d829a0353a 568 {
tushki7 0:60d829a0353a 569 uint32_t result;
tushki7 0:60d829a0353a 570
tushki7 0:60d829a0353a 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
tushki7 0:60d829a0353a 572 return(result);
tushki7 0:60d829a0353a 573 }
tushki7 0:60d829a0353a 574
tushki7 0:60d829a0353a 575
tushki7 0:60d829a0353a 576 /** \brief STR Exclusive (16 bit)
tushki7 0:60d829a0353a 577
tushki7 0:60d829a0353a 578 This function performs a exclusive STR command for 16 bit values.
tushki7 0:60d829a0353a 579
tushki7 0:60d829a0353a 580 \param [in] value Value to store
tushki7 0:60d829a0353a 581 \param [in] ptr Pointer to location
tushki7 0:60d829a0353a 582 \return 0 Function succeeded
tushki7 0:60d829a0353a 583 \return 1 Function failed
tushki7 0:60d829a0353a 584 */
tushki7 0:60d829a0353a 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
tushki7 0:60d829a0353a 586 {
tushki7 0:60d829a0353a 587 uint32_t result;
tushki7 0:60d829a0353a 588
tushki7 0:60d829a0353a 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
tushki7 0:60d829a0353a 590 return(result);
tushki7 0:60d829a0353a 591 }
tushki7 0:60d829a0353a 592
tushki7 0:60d829a0353a 593
tushki7 0:60d829a0353a 594 /** \brief STR Exclusive (32 bit)
tushki7 0:60d829a0353a 595
tushki7 0:60d829a0353a 596 This function performs a exclusive STR command for 32 bit values.
tushki7 0:60d829a0353a 597
tushki7 0:60d829a0353a 598 \param [in] value Value to store
tushki7 0:60d829a0353a 599 \param [in] ptr Pointer to location
tushki7 0:60d829a0353a 600 \return 0 Function succeeded
tushki7 0:60d829a0353a 601 \return 1 Function failed
tushki7 0:60d829a0353a 602 */
tushki7 0:60d829a0353a 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
tushki7 0:60d829a0353a 604 {
tushki7 0:60d829a0353a 605 uint32_t result;
tushki7 0:60d829a0353a 606
tushki7 0:60d829a0353a 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
tushki7 0:60d829a0353a 608 return(result);
tushki7 0:60d829a0353a 609 }
tushki7 0:60d829a0353a 610
tushki7 0:60d829a0353a 611
tushki7 0:60d829a0353a 612 /** \brief Remove the exclusive lock
tushki7 0:60d829a0353a 613
tushki7 0:60d829a0353a 614 This function removes the exclusive lock which is created by LDREX.
tushki7 0:60d829a0353a 615
tushki7 0:60d829a0353a 616 */
tushki7 0:60d829a0353a 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
tushki7 0:60d829a0353a 618 {
tushki7 0:60d829a0353a 619 __ASM volatile ("clrex" ::: "memory");
tushki7 0:60d829a0353a 620 }
tushki7 0:60d829a0353a 621
tushki7 0:60d829a0353a 622
tushki7 0:60d829a0353a 623 /** \brief Signed Saturate
tushki7 0:60d829a0353a 624
tushki7 0:60d829a0353a 625 This function saturates a signed value.
tushki7 0:60d829a0353a 626
tushki7 0:60d829a0353a 627 \param [in] value Value to be saturated
tushki7 0:60d829a0353a 628 \param [in] sat Bit position to saturate to (1..32)
tushki7 0:60d829a0353a 629 \return Saturated value
tushki7 0:60d829a0353a 630 */
tushki7 0:60d829a0353a 631 #define __SSAT(ARG1,ARG2) \
tushki7 0:60d829a0353a 632 ({ \
tushki7 0:60d829a0353a 633 uint32_t __RES, __ARG1 = (ARG1); \
tushki7 0:60d829a0353a 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
tushki7 0:60d829a0353a 635 __RES; \
tushki7 0:60d829a0353a 636 })
tushki7 0:60d829a0353a 637
tushki7 0:60d829a0353a 638
tushki7 0:60d829a0353a 639 /** \brief Unsigned Saturate
tushki7 0:60d829a0353a 640
tushki7 0:60d829a0353a 641 This function saturates an unsigned value.
tushki7 0:60d829a0353a 642
tushki7 0:60d829a0353a 643 \param [in] value Value to be saturated
tushki7 0:60d829a0353a 644 \param [in] sat Bit position to saturate to (0..31)
tushki7 0:60d829a0353a 645 \return Saturated value
tushki7 0:60d829a0353a 646 */
tushki7 0:60d829a0353a 647 #define __USAT(ARG1,ARG2) \
tushki7 0:60d829a0353a 648 ({ \
tushki7 0:60d829a0353a 649 uint32_t __RES, __ARG1 = (ARG1); \
tushki7 0:60d829a0353a 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
tushki7 0:60d829a0353a 651 __RES; \
tushki7 0:60d829a0353a 652 })
tushki7 0:60d829a0353a 653
tushki7 0:60d829a0353a 654
tushki7 0:60d829a0353a 655 /** \brief Count leading zeros
tushki7 0:60d829a0353a 656
tushki7 0:60d829a0353a 657 This function counts the number of leading zeros of a data value.
tushki7 0:60d829a0353a 658
tushki7 0:60d829a0353a 659 \param [in] value Value to count the leading zeros
tushki7 0:60d829a0353a 660 \return number of leading zeros in value
tushki7 0:60d829a0353a 661 */
tushki7 0:60d829a0353a 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
tushki7 0:60d829a0353a 663 {
tushki7 0:60d829a0353a 664 uint32_t result;
tushki7 0:60d829a0353a 665
tushki7 0:60d829a0353a 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
tushki7 0:60d829a0353a 667 return(result);
tushki7 0:60d829a0353a 668 }
tushki7 0:60d829a0353a 669
tushki7 0:60d829a0353a 670 #endif /* (__CORTEX_M >= 0x03) */
tushki7 0:60d829a0353a 671
tushki7 0:60d829a0353a 672
tushki7 0:60d829a0353a 673
tushki7 0:60d829a0353a 674
tushki7 0:60d829a0353a 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
tushki7 0:60d829a0353a 676 /* TASKING carm specific functions */
tushki7 0:60d829a0353a 677
tushki7 0:60d829a0353a 678 /*
tushki7 0:60d829a0353a 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
tushki7 0:60d829a0353a 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
tushki7 0:60d829a0353a 681 * Including the CMSIS ones.
tushki7 0:60d829a0353a 682 */
tushki7 0:60d829a0353a 683
tushki7 0:60d829a0353a 684 #endif
tushki7 0:60d829a0353a 685
tushki7 0:60d829a0353a 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
tushki7 0:60d829a0353a 687
tushki7 0:60d829a0353a 688 #endif /* __CORE_CMINSTR_H */