Tushar Sachdeva / FRDM_K64F_LCD

A simple 128x32 graphical LCD program to quickstart with LCD on ARM mbed IoT Starter Kit. This requires mbed Applciation Shield with FRDM-K64F platform.

Dependencies:   C12832

mbed/TARGET_LPC4337/core_cmFunc.h@1:eb68c94a8ee5, 2015-04-12 (annotated)

Committer:
tushki7
Date:
Sun Apr 12 15:45:52 2015 +0000
Revision:
1:eb68c94a8ee5
Parent:
0:60d829a0353a 
A simple 128x32 LCD program with ARM mbed IoT Starter Kit;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tushki7 0:60d829a0353a 1 /**************************************************************************//**
tushki7 0:60d829a0353a 2 * @file core_cmFunc.h
tushki7 0:60d829a0353a 3 * @brief CMSIS Cortex-M Core Function Access Header File
tushki7 0:60d829a0353a 4 * @version V3.20
tushki7 0:60d829a0353a 5 * @date 25. February 2013
tushki7 0:60d829a0353a 6 *
tushki7 0:60d829a0353a 7 * @note
tushki7 0:60d829a0353a 8 *
tushki7 0:60d829a0353a 9 ******************************************************************************/
tushki7 0:60d829a0353a 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
tushki7 0:60d829a0353a 11
tushki7 0:60d829a0353a 12 All rights reserved.
tushki7 0:60d829a0353a 13 Redistribution and use in source and binary forms, with or without
tushki7 0:60d829a0353a 14 modification, are permitted provided that the following conditions are met:
tushki7 0:60d829a0353a 15 - Redistributions of source code must retain the above copyright
tushki7 0:60d829a0353a 16 notice, this list of conditions and the following disclaimer.
tushki7 0:60d829a0353a 17 - Redistributions in binary form must reproduce the above copyright
tushki7 0:60d829a0353a 18 notice, this list of conditions and the following disclaimer in the
tushki7 0:60d829a0353a 19 documentation and/or other materials provided with the distribution.
tushki7 0:60d829a0353a 20 - Neither the name of ARM nor the names of its contributors may be used
tushki7 0:60d829a0353a 21 to endorse or promote products derived from this software without
tushki7 0:60d829a0353a 22 specific prior written permission.
tushki7 0:60d829a0353a 23 *
tushki7 0:60d829a0353a 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
tushki7 0:60d829a0353a 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
tushki7 0:60d829a0353a 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
tushki7 0:60d829a0353a 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
tushki7 0:60d829a0353a 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
tushki7 0:60d829a0353a 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
tushki7 0:60d829a0353a 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
tushki7 0:60d829a0353a 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
tushki7 0:60d829a0353a 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
tushki7 0:60d829a0353a 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
tushki7 0:60d829a0353a 34 POSSIBILITY OF SUCH DAMAGE.
tushki7 0:60d829a0353a 35 ---------------------------------------------------------------------------*/
tushki7 0:60d829a0353a 36
tushki7 0:60d829a0353a 37
tushki7 0:60d829a0353a 38 #ifndef __CORE_CMFUNC_H
tushki7 0:60d829a0353a 39 #define __CORE_CMFUNC_H
tushki7 0:60d829a0353a 40
tushki7 0:60d829a0353a 41
tushki7 0:60d829a0353a 42 /* ########################### Core Function Access ########################### */
tushki7 0:60d829a0353a 43 /** \ingroup CMSIS_Core_FunctionInterface
tushki7 0:60d829a0353a 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
tushki7 0:60d829a0353a 45 @{
tushki7 0:60d829a0353a 46 */
tushki7 0:60d829a0353a 47
tushki7 0:60d829a0353a 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
tushki7 0:60d829a0353a 49 /* ARM armcc specific functions */
tushki7 0:60d829a0353a 50
tushki7 0:60d829a0353a 51 #if (__ARMCC_VERSION < 400677)
tushki7 0:60d829a0353a 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
tushki7 0:60d829a0353a 53 #endif
tushki7 0:60d829a0353a 54
tushki7 0:60d829a0353a 55 /* intrinsic void __enable_irq(); */
tushki7 0:60d829a0353a 56 /* intrinsic void __disable_irq(); */
tushki7 0:60d829a0353a 57
tushki7 0:60d829a0353a 58 /** \brief Get Control Register
tushki7 0:60d829a0353a 59
tushki7 0:60d829a0353a 60 This function returns the content of the Control Register.
tushki7 0:60d829a0353a 61
tushki7 0:60d829a0353a 62 \return Control Register value
tushki7 0:60d829a0353a 63 */
tushki7 0:60d829a0353a 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
tushki7 0:60d829a0353a 65 {
tushki7 0:60d829a0353a 66 register uint32_t __regControl __ASM("control");
tushki7 0:60d829a0353a 67 return(__regControl);
tushki7 0:60d829a0353a 68 }
tushki7 0:60d829a0353a 69
tushki7 0:60d829a0353a 70
tushki7 0:60d829a0353a 71 /** \brief Set Control Register
tushki7 0:60d829a0353a 72
tushki7 0:60d829a0353a 73 This function writes the given value to the Control Register.
tushki7 0:60d829a0353a 74
tushki7 0:60d829a0353a 75 \param [in] control Control Register value to set
tushki7 0:60d829a0353a 76 */
tushki7 0:60d829a0353a 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
tushki7 0:60d829a0353a 78 {
tushki7 0:60d829a0353a 79 register uint32_t __regControl __ASM("control");
tushki7 0:60d829a0353a 80 __regControl = control;
tushki7 0:60d829a0353a 81 }
tushki7 0:60d829a0353a 82
tushki7 0:60d829a0353a 83
tushki7 0:60d829a0353a 84 /** \brief Get IPSR Register
tushki7 0:60d829a0353a 85
tushki7 0:60d829a0353a 86 This function returns the content of the IPSR Register.
tushki7 0:60d829a0353a 87
tushki7 0:60d829a0353a 88 \return IPSR Register value
tushki7 0:60d829a0353a 89 */
tushki7 0:60d829a0353a 90 __STATIC_INLINE uint32_t __get_IPSR(void)
tushki7 0:60d829a0353a 91 {
tushki7 0:60d829a0353a 92 register uint32_t __regIPSR __ASM("ipsr");
tushki7 0:60d829a0353a 93 return(__regIPSR);
tushki7 0:60d829a0353a 94 }
tushki7 0:60d829a0353a 95
tushki7 0:60d829a0353a 96
tushki7 0:60d829a0353a 97 /** \brief Get APSR Register
tushki7 0:60d829a0353a 98
tushki7 0:60d829a0353a 99 This function returns the content of the APSR Register.
tushki7 0:60d829a0353a 100
tushki7 0:60d829a0353a 101 \return APSR Register value
tushki7 0:60d829a0353a 102 */
tushki7 0:60d829a0353a 103 __STATIC_INLINE uint32_t __get_APSR(void)
tushki7 0:60d829a0353a 104 {
tushki7 0:60d829a0353a 105 register uint32_t __regAPSR __ASM("apsr");
tushki7 0:60d829a0353a 106 return(__regAPSR);
tushki7 0:60d829a0353a 107 }
tushki7 0:60d829a0353a 108
tushki7 0:60d829a0353a 109
tushki7 0:60d829a0353a 110 /** \brief Get xPSR Register
tushki7 0:60d829a0353a 111
tushki7 0:60d829a0353a 112 This function returns the content of the xPSR Register.
tushki7 0:60d829a0353a 113
tushki7 0:60d829a0353a 114 \return xPSR Register value
tushki7 0:60d829a0353a 115 */
tushki7 0:60d829a0353a 116 __STATIC_INLINE uint32_t __get_xPSR(void)
tushki7 0:60d829a0353a 117 {
tushki7 0:60d829a0353a 118 register uint32_t __regXPSR __ASM("xpsr");
tushki7 0:60d829a0353a 119 return(__regXPSR);
tushki7 0:60d829a0353a 120 }
tushki7 0:60d829a0353a 121
tushki7 0:60d829a0353a 122
tushki7 0:60d829a0353a 123 /** \brief Get Process Stack Pointer
tushki7 0:60d829a0353a 124
tushki7 0:60d829a0353a 125 This function returns the current value of the Process Stack Pointer (PSP).
tushki7 0:60d829a0353a 126
tushki7 0:60d829a0353a 127 \return PSP Register value
tushki7 0:60d829a0353a 128 */
tushki7 0:60d829a0353a 129 __STATIC_INLINE uint32_t __get_PSP(void)
tushki7 0:60d829a0353a 130 {
tushki7 0:60d829a0353a 131 register uint32_t __regProcessStackPointer __ASM("psp");
tushki7 0:60d829a0353a 132 return(__regProcessStackPointer);
tushki7 0:60d829a0353a 133 }
tushki7 0:60d829a0353a 134
tushki7 0:60d829a0353a 135
tushki7 0:60d829a0353a 136 /** \brief Set Process Stack Pointer
tushki7 0:60d829a0353a 137
tushki7 0:60d829a0353a 138 This function assigns the given value to the Process Stack Pointer (PSP).
tushki7 0:60d829a0353a 139
tushki7 0:60d829a0353a 140 \param [in] topOfProcStack Process Stack Pointer value to set
tushki7 0:60d829a0353a 141 */
tushki7 0:60d829a0353a 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
tushki7 0:60d829a0353a 143 {
tushki7 0:60d829a0353a 144 register uint32_t __regProcessStackPointer __ASM("psp");
tushki7 0:60d829a0353a 145 __regProcessStackPointer = topOfProcStack;
tushki7 0:60d829a0353a 146 }
tushki7 0:60d829a0353a 147
tushki7 0:60d829a0353a 148
tushki7 0:60d829a0353a 149 /** \brief Get Main Stack Pointer
tushki7 0:60d829a0353a 150
tushki7 0:60d829a0353a 151 This function returns the current value of the Main Stack Pointer (MSP).
tushki7 0:60d829a0353a 152
tushki7 0:60d829a0353a 153 \return MSP Register value
tushki7 0:60d829a0353a 154 */
tushki7 0:60d829a0353a 155 __STATIC_INLINE uint32_t __get_MSP(void)
tushki7 0:60d829a0353a 156 {
tushki7 0:60d829a0353a 157 register uint32_t __regMainStackPointer __ASM("msp");
tushki7 0:60d829a0353a 158 return(__regMainStackPointer);
tushki7 0:60d829a0353a 159 }
tushki7 0:60d829a0353a 160
tushki7 0:60d829a0353a 161
tushki7 0:60d829a0353a 162 /** \brief Set Main Stack Pointer
tushki7 0:60d829a0353a 163
tushki7 0:60d829a0353a 164 This function assigns the given value to the Main Stack Pointer (MSP).
tushki7 0:60d829a0353a 165
tushki7 0:60d829a0353a 166 \param [in] topOfMainStack Main Stack Pointer value to set
tushki7 0:60d829a0353a 167 */
tushki7 0:60d829a0353a 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
tushki7 0:60d829a0353a 169 {
tushki7 0:60d829a0353a 170 register uint32_t __regMainStackPointer __ASM("msp");
tushki7 0:60d829a0353a 171 __regMainStackPointer = topOfMainStack;
tushki7 0:60d829a0353a 172 }
tushki7 0:60d829a0353a 173
tushki7 0:60d829a0353a 174
tushki7 0:60d829a0353a 175 /** \brief Get Priority Mask
tushki7 0:60d829a0353a 176
tushki7 0:60d829a0353a 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
tushki7 0:60d829a0353a 178
tushki7 0:60d829a0353a 179 \return Priority Mask value
tushki7 0:60d829a0353a 180 */
tushki7 0:60d829a0353a 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
tushki7 0:60d829a0353a 182 {
tushki7 0:60d829a0353a 183 register uint32_t __regPriMask __ASM("primask");
tushki7 0:60d829a0353a 184 return(__regPriMask);
tushki7 0:60d829a0353a 185 }
tushki7 0:60d829a0353a 186
tushki7 0:60d829a0353a 187
tushki7 0:60d829a0353a 188 /** \brief Set Priority Mask
tushki7 0:60d829a0353a 189
tushki7 0:60d829a0353a 190 This function assigns the given value to the Priority Mask Register.
tushki7 0:60d829a0353a 191
tushki7 0:60d829a0353a 192 \param [in] priMask Priority Mask
tushki7 0:60d829a0353a 193 */
tushki7 0:60d829a0353a 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
tushki7 0:60d829a0353a 195 {
tushki7 0:60d829a0353a 196 register uint32_t __regPriMask __ASM("primask");
tushki7 0:60d829a0353a 197 __regPriMask = (priMask);
tushki7 0:60d829a0353a 198 }
tushki7 0:60d829a0353a 199
tushki7 0:60d829a0353a 200
tushki7 0:60d829a0353a 201 #if (__CORTEX_M >= 0x03)
tushki7 0:60d829a0353a 202
tushki7 0:60d829a0353a 203 /** \brief Enable FIQ
tushki7 0:60d829a0353a 204
tushki7 0:60d829a0353a 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
tushki7 0:60d829a0353a 206 Can only be executed in Privileged modes.
tushki7 0:60d829a0353a 207 */
tushki7 0:60d829a0353a 208 #define __enable_fault_irq __enable_fiq
tushki7 0:60d829a0353a 209
tushki7 0:60d829a0353a 210
tushki7 0:60d829a0353a 211 /** \brief Disable FIQ
tushki7 0:60d829a0353a 212
tushki7 0:60d829a0353a 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
tushki7 0:60d829a0353a 214 Can only be executed in Privileged modes.
tushki7 0:60d829a0353a 215 */
tushki7 0:60d829a0353a 216 #define __disable_fault_irq __disable_fiq
tushki7 0:60d829a0353a 217
tushki7 0:60d829a0353a 218
tushki7 0:60d829a0353a 219 /** \brief Get Base Priority
tushki7 0:60d829a0353a 220
tushki7 0:60d829a0353a 221 This function returns the current value of the Base Priority register.
tushki7 0:60d829a0353a 222
tushki7 0:60d829a0353a 223 \return Base Priority register value
tushki7 0:60d829a0353a 224 */
tushki7 0:60d829a0353a 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
tushki7 0:60d829a0353a 226 {
tushki7 0:60d829a0353a 227 register uint32_t __regBasePri __ASM("basepri");
tushki7 0:60d829a0353a 228 return(__regBasePri);
tushki7 0:60d829a0353a 229 }
tushki7 0:60d829a0353a 230
tushki7 0:60d829a0353a 231
tushki7 0:60d829a0353a 232 /** \brief Set Base Priority
tushki7 0:60d829a0353a 233
tushki7 0:60d829a0353a 234 This function assigns the given value to the Base Priority register.
tushki7 0:60d829a0353a 235
tushki7 0:60d829a0353a 236 \param [in] basePri Base Priority value to set
tushki7 0:60d829a0353a 237 */
tushki7 0:60d829a0353a 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
tushki7 0:60d829a0353a 239 {
tushki7 0:60d829a0353a 240 register uint32_t __regBasePri __ASM("basepri");
tushki7 0:60d829a0353a 241 __regBasePri = (basePri & 0xff);
tushki7 0:60d829a0353a 242 }
tushki7 0:60d829a0353a 243
tushki7 0:60d829a0353a 244
tushki7 0:60d829a0353a 245 /** \brief Get Fault Mask
tushki7 0:60d829a0353a 246
tushki7 0:60d829a0353a 247 This function returns the current value of the Fault Mask register.
tushki7 0:60d829a0353a 248
tushki7 0:60d829a0353a 249 \return Fault Mask register value
tushki7 0:60d829a0353a 250 */
tushki7 0:60d829a0353a 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
tushki7 0:60d829a0353a 252 {
tushki7 0:60d829a0353a 253 register uint32_t __regFaultMask __ASM("faultmask");
tushki7 0:60d829a0353a 254 return(__regFaultMask);
tushki7 0:60d829a0353a 255 }
tushki7 0:60d829a0353a 256
tushki7 0:60d829a0353a 257
tushki7 0:60d829a0353a 258 /** \brief Set Fault Mask
tushki7 0:60d829a0353a 259
tushki7 0:60d829a0353a 260 This function assigns the given value to the Fault Mask register.
tushki7 0:60d829a0353a 261
tushki7 0:60d829a0353a 262 \param [in] faultMask Fault Mask value to set
tushki7 0:60d829a0353a 263 */
tushki7 0:60d829a0353a 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
tushki7 0:60d829a0353a 265 {
tushki7 0:60d829a0353a 266 register uint32_t __regFaultMask __ASM("faultmask");
tushki7 0:60d829a0353a 267 __regFaultMask = (faultMask & (uint32_t)1);
tushki7 0:60d829a0353a 268 }
tushki7 0:60d829a0353a 269
tushki7 0:60d829a0353a 270 #endif /* (__CORTEX_M >= 0x03) */
tushki7 0:60d829a0353a 271
tushki7 0:60d829a0353a 272
tushki7 0:60d829a0353a 273 #if (__CORTEX_M == 0x04)
tushki7 0:60d829a0353a 274
tushki7 0:60d829a0353a 275 /** \brief Get FPSCR
tushki7 0:60d829a0353a 276
tushki7 0:60d829a0353a 277 This function returns the current value of the Floating Point Status/Control register.
tushki7 0:60d829a0353a 278
tushki7 0:60d829a0353a 279 \return Floating Point Status/Control register value
tushki7 0:60d829a0353a 280 */
tushki7 0:60d829a0353a 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
tushki7 0:60d829a0353a 282 {
tushki7 0:60d829a0353a 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
tushki7 0:60d829a0353a 284 register uint32_t __regfpscr __ASM("fpscr");
tushki7 0:60d829a0353a 285 return(__regfpscr);
tushki7 0:60d829a0353a 286 #else
tushki7 0:60d829a0353a 287 return(0);
tushki7 0:60d829a0353a 288 #endif
tushki7 0:60d829a0353a 289 }
tushki7 0:60d829a0353a 290
tushki7 0:60d829a0353a 291
tushki7 0:60d829a0353a 292 /** \brief Set FPSCR
tushki7 0:60d829a0353a 293
tushki7 0:60d829a0353a 294 This function assigns the given value to the Floating Point Status/Control register.
tushki7 0:60d829a0353a 295
tushki7 0:60d829a0353a 296 \param [in] fpscr Floating Point Status/Control value to set
tushki7 0:60d829a0353a 297 */
tushki7 0:60d829a0353a 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
tushki7 0:60d829a0353a 299 {
tushki7 0:60d829a0353a 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
tushki7 0:60d829a0353a 301 register uint32_t __regfpscr __ASM("fpscr");
tushki7 0:60d829a0353a 302 __regfpscr = (fpscr);
tushki7 0:60d829a0353a 303 #endif
tushki7 0:60d829a0353a 304 }
tushki7 0:60d829a0353a 305
tushki7 0:60d829a0353a 306 #endif /* (__CORTEX_M == 0x04) */
tushki7 0:60d829a0353a 307
tushki7 0:60d829a0353a 308
tushki7 0:60d829a0353a 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
tushki7 0:60d829a0353a 310 /* IAR iccarm specific functions */
tushki7 0:60d829a0353a 311
tushki7 0:60d829a0353a 312 #include <cmsis_iar.h>
tushki7 0:60d829a0353a 313
tushki7 0:60d829a0353a 314
tushki7 0:60d829a0353a 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
tushki7 0:60d829a0353a 316 /* TI CCS specific functions */
tushki7 0:60d829a0353a 317
tushki7 0:60d829a0353a 318 #include <cmsis_ccs.h>
tushki7 0:60d829a0353a 319
tushki7 0:60d829a0353a 320
tushki7 0:60d829a0353a 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
tushki7 0:60d829a0353a 322 /* GNU gcc specific functions */
tushki7 0:60d829a0353a 323
tushki7 0:60d829a0353a 324 /** \brief Enable IRQ Interrupts
tushki7 0:60d829a0353a 325
tushki7 0:60d829a0353a 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
tushki7 0:60d829a0353a 327 Can only be executed in Privileged modes.
tushki7 0:60d829a0353a 328 */
tushki7 0:60d829a0353a 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
tushki7 0:60d829a0353a 330 {
tushki7 0:60d829a0353a 331 __ASM volatile ("cpsie i" : : : "memory");
tushki7 0:60d829a0353a 332 }
tushki7 0:60d829a0353a 333
tushki7 0:60d829a0353a 334
tushki7 0:60d829a0353a 335 /** \brief Disable IRQ Interrupts
tushki7 0:60d829a0353a 336
tushki7 0:60d829a0353a 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
tushki7 0:60d829a0353a 338 Can only be executed in Privileged modes.
tushki7 0:60d829a0353a 339 */
tushki7 0:60d829a0353a 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
tushki7 0:60d829a0353a 341 {
tushki7 0:60d829a0353a 342 __ASM volatile ("cpsid i" : : : "memory");
tushki7 0:60d829a0353a 343 }
tushki7 0:60d829a0353a 344
tushki7 0:60d829a0353a 345
tushki7 0:60d829a0353a 346 /** \brief Get Control Register
tushki7 0:60d829a0353a 347
tushki7 0:60d829a0353a 348 This function returns the content of the Control Register.
tushki7 0:60d829a0353a 349
tushki7 0:60d829a0353a 350 \return Control Register value
tushki7 0:60d829a0353a 351 */
tushki7 0:60d829a0353a 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
tushki7 0:60d829a0353a 353 {
tushki7 0:60d829a0353a 354 uint32_t result;
tushki7 0:60d829a0353a 355
tushki7 0:60d829a0353a 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
tushki7 0:60d829a0353a 357 return(result);
tushki7 0:60d829a0353a 358 }
tushki7 0:60d829a0353a 359
tushki7 0:60d829a0353a 360
tushki7 0:60d829a0353a 361 /** \brief Set Control Register
tushki7 0:60d829a0353a 362
tushki7 0:60d829a0353a 363 This function writes the given value to the Control Register.
tushki7 0:60d829a0353a 364
tushki7 0:60d829a0353a 365 \param [in] control Control Register value to set
tushki7 0:60d829a0353a 366 */
tushki7 0:60d829a0353a 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
tushki7 0:60d829a0353a 368 {
tushki7 0:60d829a0353a 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
tushki7 0:60d829a0353a 370 }
tushki7 0:60d829a0353a 371
tushki7 0:60d829a0353a 372
tushki7 0:60d829a0353a 373 /** \brief Get IPSR Register
tushki7 0:60d829a0353a 374
tushki7 0:60d829a0353a 375 This function returns the content of the IPSR Register.
tushki7 0:60d829a0353a 376
tushki7 0:60d829a0353a 377 \return IPSR Register value
tushki7 0:60d829a0353a 378 */
tushki7 0:60d829a0353a 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
tushki7 0:60d829a0353a 380 {
tushki7 0:60d829a0353a 381 uint32_t result;
tushki7 0:60d829a0353a 382
tushki7 0:60d829a0353a 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
tushki7 0:60d829a0353a 384 return(result);
tushki7 0:60d829a0353a 385 }
tushki7 0:60d829a0353a 386
tushki7 0:60d829a0353a 387
tushki7 0:60d829a0353a 388 /** \brief Get APSR Register
tushki7 0:60d829a0353a 389
tushki7 0:60d829a0353a 390 This function returns the content of the APSR Register.
tushki7 0:60d829a0353a 391
tushki7 0:60d829a0353a 392 \return APSR Register value
tushki7 0:60d829a0353a 393 */
tushki7 0:60d829a0353a 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
tushki7 0:60d829a0353a 395 {
tushki7 0:60d829a0353a 396 uint32_t result;
tushki7 0:60d829a0353a 397
tushki7 0:60d829a0353a 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
tushki7 0:60d829a0353a 399 return(result);
tushki7 0:60d829a0353a 400 }
tushki7 0:60d829a0353a 401
tushki7 0:60d829a0353a 402
tushki7 0:60d829a0353a 403 /** \brief Get xPSR Register
tushki7 0:60d829a0353a 404
tushki7 0:60d829a0353a 405 This function returns the content of the xPSR Register.
tushki7 0:60d829a0353a 406
tushki7 0:60d829a0353a 407 \return xPSR Register value
tushki7 0:60d829a0353a 408 */
tushki7 0:60d829a0353a 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
tushki7 0:60d829a0353a 410 {
tushki7 0:60d829a0353a 411 uint32_t result;
tushki7 0:60d829a0353a 412
tushki7 0:60d829a0353a 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
tushki7 0:60d829a0353a 414 return(result);
tushki7 0:60d829a0353a 415 }
tushki7 0:60d829a0353a 416
tushki7 0:60d829a0353a 417
tushki7 0:60d829a0353a 418 /** \brief Get Process Stack Pointer
tushki7 0:60d829a0353a 419
tushki7 0:60d829a0353a 420 This function returns the current value of the Process Stack Pointer (PSP).
tushki7 0:60d829a0353a 421
tushki7 0:60d829a0353a 422 \return PSP Register value
tushki7 0:60d829a0353a 423 */
tushki7 0:60d829a0353a 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
tushki7 0:60d829a0353a 425 {
tushki7 0:60d829a0353a 426 register uint32_t result;
tushki7 0:60d829a0353a 427
tushki7 0:60d829a0353a 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
tushki7 0:60d829a0353a 429 return(result);
tushki7 0:60d829a0353a 430 }
tushki7 0:60d829a0353a 431
tushki7 0:60d829a0353a 432
tushki7 0:60d829a0353a 433 /** \brief Set Process Stack Pointer
tushki7 0:60d829a0353a 434
tushki7 0:60d829a0353a 435 This function assigns the given value to the Process Stack Pointer (PSP).
tushki7 0:60d829a0353a 436
tushki7 0:60d829a0353a 437 \param [in] topOfProcStack Process Stack Pointer value to set
tushki7 0:60d829a0353a 438 */
tushki7 0:60d829a0353a 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
tushki7 0:60d829a0353a 440 {
tushki7 0:60d829a0353a 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
tushki7 0:60d829a0353a 442 }
tushki7 0:60d829a0353a 443
tushki7 0:60d829a0353a 444
tushki7 0:60d829a0353a 445 /** \brief Get Main Stack Pointer
tushki7 0:60d829a0353a 446
tushki7 0:60d829a0353a 447 This function returns the current value of the Main Stack Pointer (MSP).
tushki7 0:60d829a0353a 448
tushki7 0:60d829a0353a 449 \return MSP Register value
tushki7 0:60d829a0353a 450 */
tushki7 0:60d829a0353a 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
tushki7 0:60d829a0353a 452 {
tushki7 0:60d829a0353a 453 register uint32_t result;
tushki7 0:60d829a0353a 454
tushki7 0:60d829a0353a 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
tushki7 0:60d829a0353a 456 return(result);
tushki7 0:60d829a0353a 457 }
tushki7 0:60d829a0353a 458
tushki7 0:60d829a0353a 459
tushki7 0:60d829a0353a 460 /** \brief Set Main Stack Pointer
tushki7 0:60d829a0353a 461
tushki7 0:60d829a0353a 462 This function assigns the given value to the Main Stack Pointer (MSP).
tushki7 0:60d829a0353a 463
tushki7 0:60d829a0353a 464 \param [in] topOfMainStack Main Stack Pointer value to set
tushki7 0:60d829a0353a 465 */
tushki7 0:60d829a0353a 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
tushki7 0:60d829a0353a 467 {
tushki7 0:60d829a0353a 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
tushki7 0:60d829a0353a 469 }
tushki7 0:60d829a0353a 470
tushki7 0:60d829a0353a 471
tushki7 0:60d829a0353a 472 /** \brief Get Priority Mask
tushki7 0:60d829a0353a 473
tushki7 0:60d829a0353a 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
tushki7 0:60d829a0353a 475
tushki7 0:60d829a0353a 476 \return Priority Mask value
tushki7 0:60d829a0353a 477 */
tushki7 0:60d829a0353a 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
tushki7 0:60d829a0353a 479 {
tushki7 0:60d829a0353a 480 uint32_t result;
tushki7 0:60d829a0353a 481
tushki7 0:60d829a0353a 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
tushki7 0:60d829a0353a 483 return(result);
tushki7 0:60d829a0353a 484 }
tushki7 0:60d829a0353a 485
tushki7 0:60d829a0353a 486
tushki7 0:60d829a0353a 487 /** \brief Set Priority Mask
tushki7 0:60d829a0353a 488
tushki7 0:60d829a0353a 489 This function assigns the given value to the Priority Mask Register.
tushki7 0:60d829a0353a 490
tushki7 0:60d829a0353a 491 \param [in] priMask Priority Mask
tushki7 0:60d829a0353a 492 */
tushki7 0:60d829a0353a 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
tushki7 0:60d829a0353a 494 {
tushki7 0:60d829a0353a 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
tushki7 0:60d829a0353a 496 }
tushki7 0:60d829a0353a 497
tushki7 0:60d829a0353a 498
tushki7 0:60d829a0353a 499 #if (__CORTEX_M >= 0x03)
tushki7 0:60d829a0353a 500
tushki7 0:60d829a0353a 501 /** \brief Enable FIQ
tushki7 0:60d829a0353a 502
tushki7 0:60d829a0353a 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
tushki7 0:60d829a0353a 504 Can only be executed in Privileged modes.
tushki7 0:60d829a0353a 505 */
tushki7 0:60d829a0353a 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
tushki7 0:60d829a0353a 507 {
tushki7 0:60d829a0353a 508 __ASM volatile ("cpsie f" : : : "memory");
tushki7 0:60d829a0353a 509 }
tushki7 0:60d829a0353a 510
tushki7 0:60d829a0353a 511
tushki7 0:60d829a0353a 512 /** \brief Disable FIQ
tushki7 0:60d829a0353a 513
tushki7 0:60d829a0353a 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
tushki7 0:60d829a0353a 515 Can only be executed in Privileged modes.
tushki7 0:60d829a0353a 516 */
tushki7 0:60d829a0353a 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
tushki7 0:60d829a0353a 518 {
tushki7 0:60d829a0353a 519 __ASM volatile ("cpsid f" : : : "memory");
tushki7 0:60d829a0353a 520 }
tushki7 0:60d829a0353a 521
tushki7 0:60d829a0353a 522
tushki7 0:60d829a0353a 523 /** \brief Get Base Priority
tushki7 0:60d829a0353a 524
tushki7 0:60d829a0353a 525 This function returns the current value of the Base Priority register.
tushki7 0:60d829a0353a 526
tushki7 0:60d829a0353a 527 \return Base Priority register value
tushki7 0:60d829a0353a 528 */
tushki7 0:60d829a0353a 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
tushki7 0:60d829a0353a 530 {
tushki7 0:60d829a0353a 531 uint32_t result;
tushki7 0:60d829a0353a 532
tushki7 0:60d829a0353a 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
tushki7 0:60d829a0353a 534 return(result);
tushki7 0:60d829a0353a 535 }
tushki7 0:60d829a0353a 536
tushki7 0:60d829a0353a 537
tushki7 0:60d829a0353a 538 /** \brief Set Base Priority
tushki7 0:60d829a0353a 539
tushki7 0:60d829a0353a 540 This function assigns the given value to the Base Priority register.
tushki7 0:60d829a0353a 541
tushki7 0:60d829a0353a 542 \param [in] basePri Base Priority value to set
tushki7 0:60d829a0353a 543 */
tushki7 0:60d829a0353a 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
tushki7 0:60d829a0353a 545 {
tushki7 0:60d829a0353a 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
tushki7 0:60d829a0353a 547 }
tushki7 0:60d829a0353a 548
tushki7 0:60d829a0353a 549
tushki7 0:60d829a0353a 550 /** \brief Get Fault Mask
tushki7 0:60d829a0353a 551
tushki7 0:60d829a0353a 552 This function returns the current value of the Fault Mask register.
tushki7 0:60d829a0353a 553
tushki7 0:60d829a0353a 554 \return Fault Mask register value
tushki7 0:60d829a0353a 555 */
tushki7 0:60d829a0353a 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
tushki7 0:60d829a0353a 557 {
tushki7 0:60d829a0353a 558 uint32_t result;
tushki7 0:60d829a0353a 559
tushki7 0:60d829a0353a 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
tushki7 0:60d829a0353a 561 return(result);
tushki7 0:60d829a0353a 562 }
tushki7 0:60d829a0353a 563
tushki7 0:60d829a0353a 564
tushki7 0:60d829a0353a 565 /** \brief Set Fault Mask
tushki7 0:60d829a0353a 566
tushki7 0:60d829a0353a 567 This function assigns the given value to the Fault Mask register.
tushki7 0:60d829a0353a 568
tushki7 0:60d829a0353a 569 \param [in] faultMask Fault Mask value to set
tushki7 0:60d829a0353a 570 */
tushki7 0:60d829a0353a 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
tushki7 0:60d829a0353a 572 {
tushki7 0:60d829a0353a 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
tushki7 0:60d829a0353a 574 }
tushki7 0:60d829a0353a 575
tushki7 0:60d829a0353a 576 #endif /* (__CORTEX_M >= 0x03) */
tushki7 0:60d829a0353a 577
tushki7 0:60d829a0353a 578
tushki7 0:60d829a0353a 579 #if (__CORTEX_M == 0x04)
tushki7 0:60d829a0353a 580
tushki7 0:60d829a0353a 581 /** \brief Get FPSCR
tushki7 0:60d829a0353a 582
tushki7 0:60d829a0353a 583 This function returns the current value of the Floating Point Status/Control register.
tushki7 0:60d829a0353a 584
tushki7 0:60d829a0353a 585 \return Floating Point Status/Control register value
tushki7 0:60d829a0353a 586 */
tushki7 0:60d829a0353a 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
tushki7 0:60d829a0353a 588 {
tushki7 0:60d829a0353a 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
tushki7 0:60d829a0353a 590 uint32_t result;
tushki7 0:60d829a0353a 591
tushki7 0:60d829a0353a 592 /* Empty asm statement works as a scheduling barrier */
tushki7 0:60d829a0353a 593 __ASM volatile ("");
tushki7 0:60d829a0353a 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
tushki7 0:60d829a0353a 595 __ASM volatile ("");
tushki7 0:60d829a0353a 596 return(result);
tushki7 0:60d829a0353a 597 #else
tushki7 0:60d829a0353a 598 return(0);
tushki7 0:60d829a0353a 599 #endif
tushki7 0:60d829a0353a 600 }
tushki7 0:60d829a0353a 601
tushki7 0:60d829a0353a 602
tushki7 0:60d829a0353a 603 /** \brief Set FPSCR
tushki7 0:60d829a0353a 604
tushki7 0:60d829a0353a 605 This function assigns the given value to the Floating Point Status/Control register.
tushki7 0:60d829a0353a 606
tushki7 0:60d829a0353a 607 \param [in] fpscr Floating Point Status/Control value to set
tushki7 0:60d829a0353a 608 */
tushki7 0:60d829a0353a 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
tushki7 0:60d829a0353a 610 {
tushki7 0:60d829a0353a 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
tushki7 0:60d829a0353a 612 /* Empty asm statement works as a scheduling barrier */
tushki7 0:60d829a0353a 613 __ASM volatile ("");
tushki7 0:60d829a0353a 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
tushki7 0:60d829a0353a 615 __ASM volatile ("");
tushki7 0:60d829a0353a 616 #endif
tushki7 0:60d829a0353a 617 }
tushki7 0:60d829a0353a 618
tushki7 0:60d829a0353a 619 #endif /* (__CORTEX_M == 0x04) */
tushki7 0:60d829a0353a 620
tushki7 0:60d829a0353a 621
tushki7 0:60d829a0353a 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
tushki7 0:60d829a0353a 623 /* TASKING carm specific functions */
tushki7 0:60d829a0353a 624
tushki7 0:60d829a0353a 625 /*
tushki7 0:60d829a0353a 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
tushki7 0:60d829a0353a 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
tushki7 0:60d829a0353a 628 * Including the CMSIS ones.
tushki7 0:60d829a0353a 629 */
tushki7 0:60d829a0353a 630
tushki7 0:60d829a0353a 631 #endif
tushki7 0:60d829a0353a 632
tushki7 0:60d829a0353a 633 /*@} end of CMSIS_Core_RegAccFunctions */
tushki7 0:60d829a0353a 634
tushki7 0:60d829a0353a 635
tushki7 0:60d829a0353a 636 #endif /* __CORE_CMFUNC_H */