EA_WavPlayer - Demo of Embedded Artists LPCXpresso baseboard SD …

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Tom Coxon / Mbed 2 deprecated EA_WavPlayer

Demo of Embedded Artists LPCXpresso baseboard SD card reader and audio facilities. Updated to put wav file player in a separate library and use the high capacity SD card library provided by Klaus Bu.

Dependencies: mbed

SDHCFileSystem.cpp@2:affcc36a50b4, 2010-07-25 (annotated)

Committer:: tom_coxon
Date:: Sun Jul 25 17:51:19 2010 +0000
Revision:: 2:affcc36a50b4

Who changed what in which revision?

User	Revision	Line number	New contents of line
tom_coxon	2:affcc36a50b4	1	/* mbed SDFileSystem Library, for providing file access to SD cards
tom_coxon	2:affcc36a50b4	2	* Copyright (c) 2008-2010, sford
tom_coxon	2:affcc36a50b4	3	*
tom_coxon	2:affcc36a50b4	4	* Permission is hereby granted, free of charge, to any person obtaining a copy
tom_coxon	2:affcc36a50b4	5	* of this software and associated documentation files (the "Software"), to deal
tom_coxon	2:affcc36a50b4	6	* in the Software without restriction, including without limitation the rights
tom_coxon	2:affcc36a50b4	7	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
tom_coxon	2:affcc36a50b4	8	* copies of the Software, and to permit persons to whom the Software is
tom_coxon	2:affcc36a50b4	9	* furnished to do so, subject to the following conditions:
tom_coxon	2:affcc36a50b4	10	*
tom_coxon	2:affcc36a50b4	11	* The above copyright notice and this permission notice shall be included in
tom_coxon	2:affcc36a50b4	12	* all copies or substantial portions of the Software.
tom_coxon	2:affcc36a50b4	13	*
tom_coxon	2:affcc36a50b4	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
tom_coxon	2:affcc36a50b4	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
tom_coxon	2:affcc36a50b4	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
tom_coxon	2:affcc36a50b4	17	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
tom_coxon	2:affcc36a50b4	18	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
tom_coxon	2:affcc36a50b4	19	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
tom_coxon	2:affcc36a50b4	20	* THE SOFTWARE.
tom_coxon	2:affcc36a50b4	21	*/
tom_coxon	2:affcc36a50b4	22
tom_coxon	2:affcc36a50b4	23	/* Introduction
tom_coxon	2:affcc36a50b4	24	* ------------
tom_coxon	2:affcc36a50b4	25	* SD and MMC cards support a number of interfaces, but common to them all
tom_coxon	2:affcc36a50b4	26	* is one based on SPI. This is the one I'm implmenting because it means
tom_coxon	2:affcc36a50b4	27	* it is much more portable even though not so performant, and we already
tom_coxon	2:affcc36a50b4	28	* have the mbed SPI Interface!
tom_coxon	2:affcc36a50b4	29	*
tom_coxon	2:affcc36a50b4	30	* The main reference I'm using is Chapter 7, "SPI Mode" of:
tom_coxon	2:affcc36a50b4	31	* http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
tom_coxon	2:affcc36a50b4	32	*
tom_coxon	2:affcc36a50b4	33	* SPI Startup
tom_coxon	2:affcc36a50b4	34	* -----------
tom_coxon	2:affcc36a50b4	35	* The SD card powers up in SD mode. The SPI interface mode is selected by
tom_coxon	2:affcc36a50b4	36	* asserting CS low and sending the reset command (CMD0). The card will
tom_coxon	2:affcc36a50b4	37	* respond with a (R1) response.
tom_coxon	2:affcc36a50b4	38	*
tom_coxon	2:affcc36a50b4	39	* CMD8 is optionally sent to determine the voltage range supported, and
tom_coxon	2:affcc36a50b4	40	* indirectly determine whether it is a version 1.x SD/non-SD card or
tom_coxon	2:affcc36a50b4	41	* version 2.x. I'll just ignore this for now.
tom_coxon	2:affcc36a50b4	42	*
tom_coxon	2:affcc36a50b4	43	* ACMD41 is repeatedly issued to initialise the card, until "in idle"
tom_coxon	2:affcc36a50b4	44	* (bit 0) of the R1 response goes to '0', indicating it is initialised.
tom_coxon	2:affcc36a50b4	45	*
tom_coxon	2:affcc36a50b4	46	* You should also indicate whether the host supports High Capicity cards,
tom_coxon	2:affcc36a50b4	47	* and check whether the card is high capacity - i'll also ignore this
tom_coxon	2:affcc36a50b4	48	*
tom_coxon	2:affcc36a50b4	49	* SPI Protocol
tom_coxon	2:affcc36a50b4	50	* ------------
tom_coxon	2:affcc36a50b4	51	* The SD SPI protocol is based on transactions made up of 8-bit words, with
tom_coxon	2:affcc36a50b4	52	* the host starting every bus transaction by asserting the CS signal low. The
tom_coxon	2:affcc36a50b4	53	* card always responds to commands, data blocks and errors.
tom_coxon	2:affcc36a50b4	54	*
tom_coxon	2:affcc36a50b4	55	* The protocol supports a CRC, but by default it is off (except for the
tom_coxon	2:affcc36a50b4	56	* first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
tom_coxon	2:affcc36a50b4	57	* I'll leave the CRC off I think!
tom_coxon	2:affcc36a50b4	58	*
tom_coxon	2:affcc36a50b4	59	* Standard capacity cards have variable data block sizes, whereas High
tom_coxon	2:affcc36a50b4	60	* Capacity cards fix the size of data block to 512 bytes. I'll therefore
tom_coxon	2:affcc36a50b4	61	* just always use the Standard Capacity cards with a block size of 512 bytes.
tom_coxon	2:affcc36a50b4	62	* This is set with CMD16.
tom_coxon	2:affcc36a50b4	63	*
tom_coxon	2:affcc36a50b4	64	* You can read and write single blocks (CMD17, CMD25) or multiple blocks
tom_coxon	2:affcc36a50b4	65	* (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
tom_coxon	2:affcc36a50b4	66	* the card gets a read command, it responds with a response token, and then
tom_coxon	2:affcc36a50b4	67	* a data token or an error.
tom_coxon	2:affcc36a50b4	68	*
tom_coxon	2:affcc36a50b4	69	* SPI Command Format
tom_coxon	2:affcc36a50b4	70	* ------------------
tom_coxon	2:affcc36a50b4	71	* Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
tom_coxon	2:affcc36a50b4	72	*
tom_coxon	2:affcc36a50b4	73	* +---------------+------------+------------+-----------+----------+--------------+
tom_coxon	2:affcc36a50b4	74	* \| 01 \| cmd[5:0] \| arg[31:24] \| arg[23:16] \| arg[15:8] \| arg[7:0] \| crc[6:0] \| 1 \|
tom_coxon	2:affcc36a50b4	75	* +---------------+------------+------------+-----------+----------+--------------+
tom_coxon	2:affcc36a50b4	76	*
tom_coxon	2:affcc36a50b4	77	* As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
tom_coxon	2:affcc36a50b4	78	*
tom_coxon	2:affcc36a50b4	79	* All Application Specific commands shall be preceded with APP_CMD (CMD55).
tom_coxon	2:affcc36a50b4	80	*
tom_coxon	2:affcc36a50b4	81	* SPI Response Format
tom_coxon	2:affcc36a50b4	82	* -------------------
tom_coxon	2:affcc36a50b4	83	* The main response format (R1) is a status byte (normally zero). Key flags:
tom_coxon	2:affcc36a50b4	84	* idle - 1 if the card is in an idle state/initialising
tom_coxon	2:affcc36a50b4	85	* cmd - 1 if an illegal command code was detected
tom_coxon	2:affcc36a50b4	86	*
tom_coxon	2:affcc36a50b4	87	* +-------------------------------------------------+
tom_coxon	2:affcc36a50b4	88	* R1 \| 0 \| arg \| addr \| seq \| crc \| cmd \| erase \| idle \|
tom_coxon	2:affcc36a50b4	89	* +-------------------------------------------------+
tom_coxon	2:affcc36a50b4	90	*
tom_coxon	2:affcc36a50b4	91	* R1b is the same, except it is followed by a busy signal (zeros) until
tom_coxon	2:affcc36a50b4	92	* the first non-zero byte when it is ready again.
tom_coxon	2:affcc36a50b4	93	*
tom_coxon	2:affcc36a50b4	94	* Data Response Token
tom_coxon	2:affcc36a50b4	95	* -------------------
tom_coxon	2:affcc36a50b4	96	* Every data block written to the card is acknowledged by a byte
tom_coxon	2:affcc36a50b4	97	* response token
tom_coxon	2:affcc36a50b4	98	*
tom_coxon	2:affcc36a50b4	99	* +----------------------+
tom_coxon	2:affcc36a50b4	100	* \| xxx \| 0 \| status \| 1 \|
tom_coxon	2:affcc36a50b4	101	* +----------------------+
tom_coxon	2:affcc36a50b4	102	* 010 - OK!
tom_coxon	2:affcc36a50b4	103	* 101 - CRC Error
tom_coxon	2:affcc36a50b4	104	* 110 - Write Error
tom_coxon	2:affcc36a50b4	105	*
tom_coxon	2:affcc36a50b4	106	* Single Block Read and Write
tom_coxon	2:affcc36a50b4	107	* ---------------------------
tom_coxon	2:affcc36a50b4	108	*
tom_coxon	2:affcc36a50b4	109	* Block transfers have a byte header, followed by the data, followed
tom_coxon	2:affcc36a50b4	110	* by a 16-bit CRC. In our case, the data will always be 512 bytes.
tom_coxon	2:affcc36a50b4	111	*
tom_coxon	2:affcc36a50b4	112	* +------+---------+---------+- - - -+---------+-----------+----------+
tom_coxon	2:affcc36a50b4	113	* \| 0xFE \| data[0] \| data[1] \| \| data[n] \| crc[15:8] \| crc[7:0] \|
tom_coxon	2:affcc36a50b4	114	* +------+---------+---------+- - - -+---------+-----------+----------+
tom_coxon	2:affcc36a50b4	115	*/
tom_coxon	2:affcc36a50b4	116
tom_coxon	2:affcc36a50b4	117	/*
tom_coxon	2:affcc36a50b4	118	* Comment: Changes for SDHC support till 32GB
tom_coxon	2:affcc36a50b4	119	* Name: KB
tom_coxon	2:affcc36a50b4	120	* Date: 07/24/2010
tom_coxon	2:affcc36a50b4	121	* Release: 0.1
tom_coxon	2:affcc36a50b4	122	*/
tom_coxon	2:affcc36a50b4	123
tom_coxon	2:affcc36a50b4	124	#include "SDHCFileSystem.h"
tom_coxon	2:affcc36a50b4	125
tom_coxon	2:affcc36a50b4	126	#define DEBUG
tom_coxon	2:affcc36a50b4	127	#define SD_COMMAND_TIMEOUT 5000
tom_coxon	2:affcc36a50b4	128
tom_coxon	2:affcc36a50b4	129
tom_coxon	2:affcc36a50b4	130	SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
tom_coxon	2:affcc36a50b4	131	FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
tom_coxon	2:affcc36a50b4	132	_cs = 1;
tom_coxon	2:affcc36a50b4	133	}
tom_coxon	2:affcc36a50b4	134
tom_coxon	2:affcc36a50b4	135	#define R1_IDLE_STATE (1 << 0)
tom_coxon	2:affcc36a50b4	136	#define R1_ERASE_RESET (1 << 1)
tom_coxon	2:affcc36a50b4	137	#define R1_ILLEGAL_COMMAND (1 << 2)
tom_coxon	2:affcc36a50b4	138	#define R1_COM_CRC_ERROR (1 << 3)
tom_coxon	2:affcc36a50b4	139	#define R1_ERASE_SEQUENCE_ERROR (1 << 4)
tom_coxon	2:affcc36a50b4	140	#define R1_ADDRESS_ERROR (1 << 5)
tom_coxon	2:affcc36a50b4	141	#define R1_PARAMETER_ERROR (1 << 6)
tom_coxon	2:affcc36a50b4	142
tom_coxon	2:affcc36a50b4	143	// Types
tom_coxon	2:affcc36a50b4	144	// - v1.x Standard Capacity
tom_coxon	2:affcc36a50b4	145	// - v2.x Standard Capacity
tom_coxon	2:affcc36a50b4	146	// - v2.x High Capacity
tom_coxon	2:affcc36a50b4	147	// - Not recognised as an SD Card
tom_coxon	2:affcc36a50b4	148
tom_coxon	2:affcc36a50b4	149	#define SDCARD_FAIL 0
tom_coxon	2:affcc36a50b4	150	#define SDCARD_V1 1
tom_coxon	2:affcc36a50b4	151	#define SDCARD_V2 2
tom_coxon	2:affcc36a50b4	152	#define SDCARD_V2HC 3
tom_coxon	2:affcc36a50b4	153
tom_coxon	2:affcc36a50b4	154	int SDFileSystem::initialise_card() {
tom_coxon	2:affcc36a50b4	155	// Set to 100kHz for initialisation, and clock card with cs = 1
tom_coxon	2:affcc36a50b4	156	_spi.frequency(100000);
tom_coxon	2:affcc36a50b4	157	_cs = 1;
tom_coxon	2:affcc36a50b4	158	for(int i=0; i<16; i++) {
tom_coxon	2:affcc36a50b4	159	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	160	}
tom_coxon	2:affcc36a50b4	161
tom_coxon	2:affcc36a50b4	162	// send CMD0, should return with all zeros except IDLE STATE set (bit 0)
tom_coxon	2:affcc36a50b4	163	if(_cmd(0, 0) != R1_IDLE_STATE) {
tom_coxon	2:affcc36a50b4	164	fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
tom_coxon	2:affcc36a50b4	165	return SDCARD_FAIL;
tom_coxon	2:affcc36a50b4	166	}
tom_coxon	2:affcc36a50b4	167
tom_coxon	2:affcc36a50b4	168	// send CMD8 to determine whther it is ver 2.x
tom_coxon	2:affcc36a50b4	169	int r = _cmd8();
tom_coxon	2:affcc36a50b4	170	if(r == R1_IDLE_STATE) {
tom_coxon	2:affcc36a50b4	171	return initialise_card_v2();
tom_coxon	2:affcc36a50b4	172	} else if(r == (R1_IDLE_STATE \| R1_ILLEGAL_COMMAND)) {
tom_coxon	2:affcc36a50b4	173	return initialise_card_v1();
tom_coxon	2:affcc36a50b4	174	} else {
tom_coxon	2:affcc36a50b4	175	fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
tom_coxon	2:affcc36a50b4	176	return SDCARD_FAIL;
tom_coxon	2:affcc36a50b4	177	}
tom_coxon	2:affcc36a50b4	178	}
tom_coxon	2:affcc36a50b4	179
tom_coxon	2:affcc36a50b4	180	int SDFileSystem::initialise_card_v1() {
tom_coxon	2:affcc36a50b4	181	for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
tom_coxon	2:affcc36a50b4	182	_cmd(55, 0);
tom_coxon	2:affcc36a50b4	183	if(_cmd(41, 0) == 0) {
tom_coxon	2:affcc36a50b4	184	cdv = 512;
tom_coxon	2:affcc36a50b4	185	#ifdef DEBUG
tom_coxon	2:affcc36a50b4	186	printf("\n\rInit: SEDCARD_V1\n\r");
tom_coxon	2:affcc36a50b4	187	#endif
tom_coxon	2:affcc36a50b4	188	return SDCARD_V1;
tom_coxon	2:affcc36a50b4	189	}
tom_coxon	2:affcc36a50b4	190	}
tom_coxon	2:affcc36a50b4	191
tom_coxon	2:affcc36a50b4	192	fprintf(stderr, "Timeout waiting for v1.x card\n");
tom_coxon	2:affcc36a50b4	193	return SDCARD_FAIL;
tom_coxon	2:affcc36a50b4	194	}
tom_coxon	2:affcc36a50b4	195
tom_coxon	2:affcc36a50b4	196	int SDFileSystem::initialise_card_v2() {
tom_coxon	2:affcc36a50b4	197
tom_coxon	2:affcc36a50b4	198	for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
tom_coxon	2:affcc36a50b4	199	wait_ms(50);
tom_coxon	2:affcc36a50b4	200	_cmd58();
tom_coxon	2:affcc36a50b4	201	_cmd(55, 0);
tom_coxon	2:affcc36a50b4	202	if(_cmd(41, 0x40000000) == 0) {
tom_coxon	2:affcc36a50b4	203	_cmd58();
tom_coxon	2:affcc36a50b4	204	#ifdef DEBUG
tom_coxon	2:affcc36a50b4	205	printf("\n\rInit: SDCARD_V2\n\r");
tom_coxon	2:affcc36a50b4	206	#endif
tom_coxon	2:affcc36a50b4	207	cdv = 1;
tom_coxon	2:affcc36a50b4	208	return SDCARD_V2;
tom_coxon	2:affcc36a50b4	209	}
tom_coxon	2:affcc36a50b4	210	}
tom_coxon	2:affcc36a50b4	211
tom_coxon	2:affcc36a50b4	212	fprintf(stderr, "Timeout waiting for v2.x card\n");
tom_coxon	2:affcc36a50b4	213	return SDCARD_FAIL;
tom_coxon	2:affcc36a50b4	214	}
tom_coxon	2:affcc36a50b4	215
tom_coxon	2:affcc36a50b4	216	int SDFileSystem::disk_initialize() {
tom_coxon	2:affcc36a50b4	217
tom_coxon	2:affcc36a50b4	218	int i = initialise_card();
tom_coxon	2:affcc36a50b4	219	#ifdef DEBUG
tom_coxon	2:affcc36a50b4	220	printf("init card = %d\n", i);
tom_coxon	2:affcc36a50b4	221	#endif
tom_coxon	2:affcc36a50b4	222	_sectors = _sd_sectors();
tom_coxon	2:affcc36a50b4	223
tom_coxon	2:affcc36a50b4	224	// Set block length to 512 (CMD16)
tom_coxon	2:affcc36a50b4	225	if(_cmd(16, 512) != 0) {
tom_coxon	2:affcc36a50b4	226	fprintf(stderr, "Set 512-byte block timed out\n");
tom_coxon	2:affcc36a50b4	227	return 1;
tom_coxon	2:affcc36a50b4	228	}
tom_coxon	2:affcc36a50b4	229
tom_coxon	2:affcc36a50b4	230	_spi.frequency(1000000); // Set to 1MHz for data transfer
tom_coxon	2:affcc36a50b4	231	return 0;
tom_coxon	2:affcc36a50b4	232	}
tom_coxon	2:affcc36a50b4	233
tom_coxon	2:affcc36a50b4	234	int SDFileSystem::disk_write(const char *buffer, int block_number) {
tom_coxon	2:affcc36a50b4	235	// set write address for single block (CMD24)
tom_coxon	2:affcc36a50b4	236	if(_cmd(24, block_number * cdv) != 0) {
tom_coxon	2:affcc36a50b4	237	return 1;
tom_coxon	2:affcc36a50b4	238	}
tom_coxon	2:affcc36a50b4	239
tom_coxon	2:affcc36a50b4	240	// send the data block
tom_coxon	2:affcc36a50b4	241	_write(buffer, 512);
tom_coxon	2:affcc36a50b4	242	return 0;
tom_coxon	2:affcc36a50b4	243	}
tom_coxon	2:affcc36a50b4	244
tom_coxon	2:affcc36a50b4	245	int SDFileSystem::disk_read(char *buffer, int block_number) {
tom_coxon	2:affcc36a50b4	246	// set read address for single block (CMD17)
tom_coxon	2:affcc36a50b4	247	if(_cmd(17, block_number * cdv) != 0) {
tom_coxon	2:affcc36a50b4	248	return 1;
tom_coxon	2:affcc36a50b4	249	}
tom_coxon	2:affcc36a50b4	250
tom_coxon	2:affcc36a50b4	251	// receive the data
tom_coxon	2:affcc36a50b4	252	_read(buffer, 512);
tom_coxon	2:affcc36a50b4	253	return 0;
tom_coxon	2:affcc36a50b4	254	}
tom_coxon	2:affcc36a50b4	255
tom_coxon	2:affcc36a50b4	256	int SDFileSystem::disk_status() { return 0; }
tom_coxon	2:affcc36a50b4	257	int SDFileSystem::disk_sync() { return 0; }
tom_coxon	2:affcc36a50b4	258	int SDFileSystem::disk_sectors() { return _sectors; }
tom_coxon	2:affcc36a50b4	259
tom_coxon	2:affcc36a50b4	260	// PRIVATE FUNCTIONS
tom_coxon	2:affcc36a50b4	261
tom_coxon	2:affcc36a50b4	262	int SDFileSystem::_cmd(int cmd, int arg) {
tom_coxon	2:affcc36a50b4	263	_cs = 0;
tom_coxon	2:affcc36a50b4	264
tom_coxon	2:affcc36a50b4	265	// send a command
tom_coxon	2:affcc36a50b4	266	_spi.write(0x40 \| cmd);
tom_coxon	2:affcc36a50b4	267	_spi.write(arg >> 24);
tom_coxon	2:affcc36a50b4	268	_spi.write(arg >> 16);
tom_coxon	2:affcc36a50b4	269	_spi.write(arg >> 8);
tom_coxon	2:affcc36a50b4	270	_spi.write(arg >> 0);
tom_coxon	2:affcc36a50b4	271	_spi.write(0x95);
tom_coxon	2:affcc36a50b4	272
tom_coxon	2:affcc36a50b4	273	// wait for the repsonse (response[7] == 0)
tom_coxon	2:affcc36a50b4	274	for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
tom_coxon	2:affcc36a50b4	275	int response = _spi.write(0xFF);
tom_coxon	2:affcc36a50b4	276	if(!(response & 0x80)) {
tom_coxon	2:affcc36a50b4	277	_cs = 1;
tom_coxon	2:affcc36a50b4	278	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	279	return response;
tom_coxon	2:affcc36a50b4	280	}
tom_coxon	2:affcc36a50b4	281	}
tom_coxon	2:affcc36a50b4	282	_cs = 1;
tom_coxon	2:affcc36a50b4	283	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	284	return -1; // timeout
tom_coxon	2:affcc36a50b4	285	}
tom_coxon	2:affcc36a50b4	286	int SDFileSystem::_cmdx(int cmd, int arg) {
tom_coxon	2:affcc36a50b4	287	_cs = 0;
tom_coxon	2:affcc36a50b4	288
tom_coxon	2:affcc36a50b4	289	// send a command
tom_coxon	2:affcc36a50b4	290	_spi.write(0x40 \| cmd);
tom_coxon	2:affcc36a50b4	291	_spi.write(arg >> 24);
tom_coxon	2:affcc36a50b4	292	_spi.write(arg >> 16);
tom_coxon	2:affcc36a50b4	293	_spi.write(arg >> 8);
tom_coxon	2:affcc36a50b4	294	_spi.write(arg >> 0);
tom_coxon	2:affcc36a50b4	295	_spi.write(0x95);
tom_coxon	2:affcc36a50b4	296
tom_coxon	2:affcc36a50b4	297	// wait for the repsonse (response[7] == 0)
tom_coxon	2:affcc36a50b4	298	for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
tom_coxon	2:affcc36a50b4	299	int response = _spi.write(0xFF);
tom_coxon	2:affcc36a50b4	300	if(!(response & 0x80)) {
tom_coxon	2:affcc36a50b4	301	return response;
tom_coxon	2:affcc36a50b4	302	}
tom_coxon	2:affcc36a50b4	303	}
tom_coxon	2:affcc36a50b4	304	_cs = 1;
tom_coxon	2:affcc36a50b4	305	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	306	return -1; // timeout
tom_coxon	2:affcc36a50b4	307	}
tom_coxon	2:affcc36a50b4	308
tom_coxon	2:affcc36a50b4	309
tom_coxon	2:affcc36a50b4	310	int SDFileSystem::_cmd58() {
tom_coxon	2:affcc36a50b4	311	_cs = 0;
tom_coxon	2:affcc36a50b4	312	int arg = 0;
tom_coxon	2:affcc36a50b4	313
tom_coxon	2:affcc36a50b4	314	// send a command
tom_coxon	2:affcc36a50b4	315	_spi.write(0x40 \| 58);
tom_coxon	2:affcc36a50b4	316	_spi.write(arg >> 24);
tom_coxon	2:affcc36a50b4	317	_spi.write(arg >> 16);
tom_coxon	2:affcc36a50b4	318	_spi.write(arg >> 8);
tom_coxon	2:affcc36a50b4	319	_spi.write(arg >> 0);
tom_coxon	2:affcc36a50b4	320	_spi.write(0x95);
tom_coxon	2:affcc36a50b4	321
tom_coxon	2:affcc36a50b4	322	// wait for the repsonse (response[7] == 0)
tom_coxon	2:affcc36a50b4	323	for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
tom_coxon	2:affcc36a50b4	324	int response = _spi.write(0xFF);
tom_coxon	2:affcc36a50b4	325	if(!(response & 0x80)) {
tom_coxon	2:affcc36a50b4	326	int ocr = _spi.write(0xFF) << 24;
tom_coxon	2:affcc36a50b4	327	ocr \|= _spi.write(0xFF) << 16;
tom_coxon	2:affcc36a50b4	328	ocr \|= _spi.write(0xFF) << 8;
tom_coxon	2:affcc36a50b4	329	ocr \|= _spi.write(0xFF) << 0;
tom_coxon	2:affcc36a50b4	330	// printf("OCR = 0x%08X\n", ocr);
tom_coxon	2:affcc36a50b4	331	_cs = 1;
tom_coxon	2:affcc36a50b4	332	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	333	return response;
tom_coxon	2:affcc36a50b4	334	}
tom_coxon	2:affcc36a50b4	335	}
tom_coxon	2:affcc36a50b4	336	_cs = 1;
tom_coxon	2:affcc36a50b4	337	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	338	return -1; // timeout
tom_coxon	2:affcc36a50b4	339	}
tom_coxon	2:affcc36a50b4	340
tom_coxon	2:affcc36a50b4	341	int SDFileSystem::_cmd8() {
tom_coxon	2:affcc36a50b4	342	_cs = 0;
tom_coxon	2:affcc36a50b4	343
tom_coxon	2:affcc36a50b4	344	// send a command
tom_coxon	2:affcc36a50b4	345	_spi.write(0x40 \| 8); // CMD8
tom_coxon	2:affcc36a50b4	346	_spi.write(0x00); // reserved
tom_coxon	2:affcc36a50b4	347	_spi.write(0x00); // reserved
tom_coxon	2:affcc36a50b4	348	_spi.write(0x01); // 3.3v
tom_coxon	2:affcc36a50b4	349	_spi.write(0xAA); // check pattern
tom_coxon	2:affcc36a50b4	350	_spi.write(0x87); // crc
tom_coxon	2:affcc36a50b4	351
tom_coxon	2:affcc36a50b4	352	// wait for the repsonse (response[7] == 0)
tom_coxon	2:affcc36a50b4	353	for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
tom_coxon	2:affcc36a50b4	354	char response[5];
tom_coxon	2:affcc36a50b4	355	response[0] = _spi.write(0xFF);
tom_coxon	2:affcc36a50b4	356	if(!(response[0] & 0x80)) {
tom_coxon	2:affcc36a50b4	357	for(int j=1; j<5; j++) {
tom_coxon	2:affcc36a50b4	358	response[i] = _spi.write(0xFF);
tom_coxon	2:affcc36a50b4	359	}
tom_coxon	2:affcc36a50b4	360	_cs = 1;
tom_coxon	2:affcc36a50b4	361	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	362	return response[0];
tom_coxon	2:affcc36a50b4	363	}
tom_coxon	2:affcc36a50b4	364	}
tom_coxon	2:affcc36a50b4	365	_cs = 1;
tom_coxon	2:affcc36a50b4	366	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	367	return -1; // timeout
tom_coxon	2:affcc36a50b4	368	}
tom_coxon	2:affcc36a50b4	369
tom_coxon	2:affcc36a50b4	370	int SDFileSystem::_read(char *buffer, int length) {
tom_coxon	2:affcc36a50b4	371	_cs = 0;
tom_coxon	2:affcc36a50b4	372
tom_coxon	2:affcc36a50b4	373	// read until start byte (0xFF)
tom_coxon	2:affcc36a50b4	374	while(_spi.write(0xFF) != 0xFE);
tom_coxon	2:affcc36a50b4	375
tom_coxon	2:affcc36a50b4	376	// read data
tom_coxon	2:affcc36a50b4	377	for(int i=0; i<length; i++) {
tom_coxon	2:affcc36a50b4	378	buffer[i] = _spi.write(0xFF);
tom_coxon	2:affcc36a50b4	379	}
tom_coxon	2:affcc36a50b4	380	_spi.write(0xFF); // checksum
tom_coxon	2:affcc36a50b4	381	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	382
tom_coxon	2:affcc36a50b4	383	_cs = 1;
tom_coxon	2:affcc36a50b4	384	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	385	return 0;
tom_coxon	2:affcc36a50b4	386	}
tom_coxon	2:affcc36a50b4	387
tom_coxon	2:affcc36a50b4	388	int SDFileSystem::_write(const char *buffer, int length) {
tom_coxon	2:affcc36a50b4	389	_cs = 0;
tom_coxon	2:affcc36a50b4	390
tom_coxon	2:affcc36a50b4	391	// indicate start of block
tom_coxon	2:affcc36a50b4	392	_spi.write(0xFE);
tom_coxon	2:affcc36a50b4	393
tom_coxon	2:affcc36a50b4	394	// write the data
tom_coxon	2:affcc36a50b4	395	for(int i=0; i<length; i++) {
tom_coxon	2:affcc36a50b4	396	_spi.write(buffer[i]);
tom_coxon	2:affcc36a50b4	397	}
tom_coxon	2:affcc36a50b4	398
tom_coxon	2:affcc36a50b4	399	// write the checksum
tom_coxon	2:affcc36a50b4	400	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	401	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	402
tom_coxon	2:affcc36a50b4	403	// check the repsonse token
tom_coxon	2:affcc36a50b4	404	if((_spi.write(0xFF) & 0x1F) != 0x05) {
tom_coxon	2:affcc36a50b4	405	_cs = 1;
tom_coxon	2:affcc36a50b4	406	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	407	return 1;
tom_coxon	2:affcc36a50b4	408	}
tom_coxon	2:affcc36a50b4	409
tom_coxon	2:affcc36a50b4	410	// wait for write to finish
tom_coxon	2:affcc36a50b4	411	while(_spi.write(0xFF) == 0);
tom_coxon	2:affcc36a50b4	412
tom_coxon	2:affcc36a50b4	413	_cs = 1;
tom_coxon	2:affcc36a50b4	414	_spi.write(0xFF);
tom_coxon	2:affcc36a50b4	415	return 0;
tom_coxon	2:affcc36a50b4	416	}
tom_coxon	2:affcc36a50b4	417
tom_coxon	2:affcc36a50b4	418	static int ext_bits(char *data, int msb, int lsb) {
tom_coxon	2:affcc36a50b4	419	int bits = 0;
tom_coxon	2:affcc36a50b4	420	int size = 1 + msb - lsb;
tom_coxon	2:affcc36a50b4	421	for(int i=0; i<size; i++) {
tom_coxon	2:affcc36a50b4	422	int position = lsb + i;
tom_coxon	2:affcc36a50b4	423	int byte = 15 - (position >> 3);
tom_coxon	2:affcc36a50b4	424	int bit = position & 0x7;
tom_coxon	2:affcc36a50b4	425	int value = (data[byte] >> bit) & 1;
tom_coxon	2:affcc36a50b4	426	bits \|= value << i;
tom_coxon	2:affcc36a50b4	427	}
tom_coxon	2:affcc36a50b4	428	return bits;
tom_coxon	2:affcc36a50b4	429	}
tom_coxon	2:affcc36a50b4	430
tom_coxon	2:affcc36a50b4	431	int SDFileSystem::_sd_sectors() {
tom_coxon	2:affcc36a50b4	432
tom_coxon	2:affcc36a50b4	433	int c_size, c_size_mult, read_bl_len;
tom_coxon	2:affcc36a50b4	434	int block_len, mult, blocknr, capacity;
tom_coxon	2:affcc36a50b4	435	int blocks, hc_c_size;
tom_coxon	2:affcc36a50b4	436	uint64_t hc_capacity;
tom_coxon	2:affcc36a50b4	437
tom_coxon	2:affcc36a50b4	438	// CMD9, Response R2 (R1 byte + 16-byte block read)
tom_coxon	2:affcc36a50b4	439	if(_cmdx(9, 0) != 0) {
tom_coxon	2:affcc36a50b4	440	fprintf(stderr, "Didn't get a response from the disk\n");
tom_coxon	2:affcc36a50b4	441	return 0;
tom_coxon	2:affcc36a50b4	442	}
tom_coxon	2:affcc36a50b4	443
tom_coxon	2:affcc36a50b4	444	char csd[16];
tom_coxon	2:affcc36a50b4	445	if(_read(csd, 16) != 0) {
tom_coxon	2:affcc36a50b4	446	fprintf(stderr, "Couldn't read csd response from disk\n");
tom_coxon	2:affcc36a50b4	447	return 0;
tom_coxon	2:affcc36a50b4	448	}
tom_coxon	2:affcc36a50b4	449
tom_coxon	2:affcc36a50b4	450	// csd_structure : csd[127:126]
tom_coxon	2:affcc36a50b4	451	// c_size : csd[73:62]
tom_coxon	2:affcc36a50b4	452	// c_size_mult : csd[49:47]
tom_coxon	2:affcc36a50b4	453	// read_bl_len : csd[83:80] - the maximum read block length
tom_coxon	2:affcc36a50b4	454
tom_coxon	2:affcc36a50b4	455	int csd_structure = ext_bits(csd, 127, 126);
tom_coxon	2:affcc36a50b4	456
tom_coxon	2:affcc36a50b4	457	#ifdef DEBUG
tom_coxon	2:affcc36a50b4	458	printf("\n\rCSD_STRUCT = %d\n", csd_structure);
tom_coxon	2:affcc36a50b4	459	#endif
tom_coxon	2:affcc36a50b4	460
tom_coxon	2:affcc36a50b4	461	switch (csd_structure){
tom_coxon	2:affcc36a50b4	462	case 0:
tom_coxon	2:affcc36a50b4	463	cdv = 512;
tom_coxon	2:affcc36a50b4	464	c_size = ext_bits(csd, 73, 62);
tom_coxon	2:affcc36a50b4	465	c_size_mult = ext_bits(csd, 49, 47);
tom_coxon	2:affcc36a50b4	466	read_bl_len = ext_bits(csd, 83, 80);
tom_coxon	2:affcc36a50b4	467
tom_coxon	2:affcc36a50b4	468	block_len = 1 << read_bl_len;
tom_coxon	2:affcc36a50b4	469	mult = 1 << (c_size_mult + 2);
tom_coxon	2:affcc36a50b4	470	blocknr = (c_size + 1) * mult;
tom_coxon	2:affcc36a50b4	471	capacity = blocknr * block_len;
tom_coxon	2:affcc36a50b4	472	blocks = capacity / 512;
tom_coxon	2:affcc36a50b4	473	#ifdef DEBUG
tom_coxon	2:affcc36a50b4	474	printf("\n\rSDCard\n\rc_size: %.4X \n\rcapacity: %.ld \n\rsectors: %d\n\r", c_size, capacity, blocks);
tom_coxon	2:affcc36a50b4	475	#endif
tom_coxon	2:affcc36a50b4	476	break;
tom_coxon	2:affcc36a50b4	477
tom_coxon	2:affcc36a50b4	478	case 1:
tom_coxon	2:affcc36a50b4	479	cdv = 1;
tom_coxon	2:affcc36a50b4	480	hc_c_size = ext_bits(csd, 63, 48);
tom_coxon	2:affcc36a50b4	481	int hc_read_bl_len = ext_bits(csd, 83, 80);
tom_coxon	2:affcc36a50b4	482	hc_capacity = hc_c_size+1;
tom_coxon	2:affcc36a50b4	483	blocks = (hc_c_size+1)*1024;
tom_coxon	2:affcc36a50b4	484	#ifdef DEBUG
tom_coxon	2:affcc36a50b4	485	printf("\n\rSDHC Card \n\rhc_c_size: %.4X \n\rcapacity: %.lld \n\rsectors: %d\n\r", hc_c_size, hc_capacity5121024, blocks);
tom_coxon	2:affcc36a50b4	486	#endif
tom_coxon	2:affcc36a50b4	487	break;
tom_coxon	2:affcc36a50b4	488
tom_coxon	2:affcc36a50b4	489	default:
tom_coxon	2:affcc36a50b4	490	fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
tom_coxon	2:affcc36a50b4	491	return 0;
tom_coxon	2:affcc36a50b4	492	// break;
tom_coxon	2:affcc36a50b4	493	};
tom_coxon	2:affcc36a50b4	494	return blocks;
tom_coxon	2:affcc36a50b4	495	}

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	03 Jul 2010
Imports:	48
Forks:	0
Commits:	3
Dependents:	0
Dependencies:	1
Followers:	1

SDHCFileSystem.cpp@2:affcc36a50b4, 2010-07-25 (annotated)

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