Ken Todotani / mbed-src

Fork of mbed-src by mbed official

Committer:
mbed_official
Date:
Fri Jan 31 10:00:06 2014 +0000
Revision:
82:0b31dbcd4769
Child:
227:7bd0639b8911
Synchronized with git revision 74409cbd593d1daab530a57baaa563f30b04b018

Full URL: https://github.com/mbedmicro/mbed/commit/74409cbd593d1daab530a57baaa563f30b04b018/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 82:0b31dbcd4769 1 /* mbed Microcontroller Library
mbed_official 82:0b31dbcd4769 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 82:0b31dbcd4769 3 *
mbed_official 82:0b31dbcd4769 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 82:0b31dbcd4769 5 * you may not use this file except in compliance with the License.
mbed_official 82:0b31dbcd4769 6 * You may obtain a copy of the License at
mbed_official 82:0b31dbcd4769 7 *
mbed_official 82:0b31dbcd4769 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 82:0b31dbcd4769 9 *
mbed_official 82:0b31dbcd4769 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 82:0b31dbcd4769 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 82:0b31dbcd4769 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 82:0b31dbcd4769 13 * See the License for the specific language governing permissions and
mbed_official 82:0b31dbcd4769 14 * limitations under the License.
mbed_official 82:0b31dbcd4769 15 */
mbed_official 82:0b31dbcd4769 16 #include "spi_api.h"
mbed_official 82:0b31dbcd4769 17
mbed_official 82:0b31dbcd4769 18 #include <math.h>
mbed_official 82:0b31dbcd4769 19
mbed_official 82:0b31dbcd4769 20 #include "cmsis.h"
mbed_official 82:0b31dbcd4769 21 #include "pinmap.h"
mbed_official 82:0b31dbcd4769 22 #include "error.h"
mbed_official 82:0b31dbcd4769 23
mbed_official 82:0b31dbcd4769 24 static const PinMap PinMap_SPI_SCLK[] = {
mbed_official 82:0b31dbcd4769 25 {PTB0, SPI_0, 3},
mbed_official 82:0b31dbcd4769 26 {NC , NC , 0}
mbed_official 82:0b31dbcd4769 27 };
mbed_official 82:0b31dbcd4769 28
mbed_official 82:0b31dbcd4769 29 static const PinMap PinMap_SPI_MOSI[] = {
mbed_official 82:0b31dbcd4769 30 {PTA7, SPI_0, 3},
mbed_official 82:0b31dbcd4769 31 {NC , NC , 0}
mbed_official 82:0b31dbcd4769 32 };
mbed_official 82:0b31dbcd4769 33
mbed_official 82:0b31dbcd4769 34 static const PinMap PinMap_SPI_MISO[] = {
mbed_official 82:0b31dbcd4769 35 {PTA6, SPI_0, 3},
mbed_official 82:0b31dbcd4769 36 {NC , NC , 0}
mbed_official 82:0b31dbcd4769 37 };
mbed_official 82:0b31dbcd4769 38
mbed_official 82:0b31dbcd4769 39 static const PinMap PinMap_SPI_SSEL[] = {
mbed_official 82:0b31dbcd4769 40 {PTA5, SPI_0, 3},
mbed_official 82:0b31dbcd4769 41 {NC , NC , 0}
mbed_official 82:0b31dbcd4769 42 };
mbed_official 82:0b31dbcd4769 43
mbed_official 82:0b31dbcd4769 44 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
mbed_official 82:0b31dbcd4769 45 // determine the SPI to use
mbed_official 82:0b31dbcd4769 46 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
mbed_official 82:0b31dbcd4769 47 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
mbed_official 82:0b31dbcd4769 48 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
mbed_official 82:0b31dbcd4769 49 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
mbed_official 82:0b31dbcd4769 50 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
mbed_official 82:0b31dbcd4769 51 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
mbed_official 82:0b31dbcd4769 52
mbed_official 82:0b31dbcd4769 53 obj->spi = (SPI_Type*)pinmap_merge(spi_data, spi_cntl);
mbed_official 82:0b31dbcd4769 54 if ((int)obj->spi == NC) {
mbed_official 82:0b31dbcd4769 55 error("SPI pinout mapping failed");
mbed_official 82:0b31dbcd4769 56 }
mbed_official 82:0b31dbcd4769 57
mbed_official 82:0b31dbcd4769 58 // enable power and clocking
mbed_official 82:0b31dbcd4769 59 switch ((int)obj->spi) {
mbed_official 82:0b31dbcd4769 60 case SPI_0:
mbed_official 82:0b31dbcd4769 61 SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK);
mbed_official 82:0b31dbcd4769 62 SIM->SCGC4 |= SIM_SCGC4_SPI0_MASK;
mbed_official 82:0b31dbcd4769 63 break;
mbed_official 82:0b31dbcd4769 64 }
mbed_official 82:0b31dbcd4769 65
mbed_official 82:0b31dbcd4769 66 // set default format and frequency
mbed_official 82:0b31dbcd4769 67 if (ssel == NC) {
mbed_official 82:0b31dbcd4769 68 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
mbed_official 82:0b31dbcd4769 69 } else {
mbed_official 82:0b31dbcd4769 70 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
mbed_official 82:0b31dbcd4769 71 }
mbed_official 82:0b31dbcd4769 72 spi_frequency(obj, 1000000);
mbed_official 82:0b31dbcd4769 73
mbed_official 82:0b31dbcd4769 74 // enable SPI
mbed_official 82:0b31dbcd4769 75 obj->spi->C1 |= SPI_C1_SPE_MASK;
mbed_official 82:0b31dbcd4769 76
mbed_official 82:0b31dbcd4769 77 // pin out the spi pins
mbed_official 82:0b31dbcd4769 78 pinmap_pinout(mosi, PinMap_SPI_MOSI);
mbed_official 82:0b31dbcd4769 79 pinmap_pinout(miso, PinMap_SPI_MISO);
mbed_official 82:0b31dbcd4769 80 pinmap_pinout(sclk, PinMap_SPI_SCLK);
mbed_official 82:0b31dbcd4769 81 if (ssel != NC) {
mbed_official 82:0b31dbcd4769 82 pinmap_pinout(ssel, PinMap_SPI_SSEL);
mbed_official 82:0b31dbcd4769 83 }
mbed_official 82:0b31dbcd4769 84 }
mbed_official 82:0b31dbcd4769 85
mbed_official 82:0b31dbcd4769 86 void spi_free(spi_t *obj) {
mbed_official 82:0b31dbcd4769 87 // [TODO]
mbed_official 82:0b31dbcd4769 88 }
mbed_official 82:0b31dbcd4769 89 void spi_format(spi_t *obj, int bits, int mode, int slave) {
mbed_official 82:0b31dbcd4769 90 if (bits != 8) {
mbed_official 82:0b31dbcd4769 91 error("Only 8bits SPI supported");
mbed_official 82:0b31dbcd4769 92 }
mbed_official 82:0b31dbcd4769 93
mbed_official 82:0b31dbcd4769 94 if ((mode < 0) || (mode > 3)) {
mbed_official 82:0b31dbcd4769 95 error("SPI mode unsupported");
mbed_official 82:0b31dbcd4769 96 }
mbed_official 82:0b31dbcd4769 97
mbed_official 82:0b31dbcd4769 98 uint8_t polarity = (mode & 0x2) ? 1 : 0;
mbed_official 82:0b31dbcd4769 99 uint8_t phase = (mode & 0x1) ? 1 : 0;
mbed_official 82:0b31dbcd4769 100 uint8_t c1_data = ((!slave) << 4) | (polarity << 3) | (phase << 2);
mbed_official 82:0b31dbcd4769 101
mbed_official 82:0b31dbcd4769 102 // clear MSTR, CPOL and CPHA bits
mbed_official 82:0b31dbcd4769 103 obj->spi->C1 &= ~(0x7 << 2);
mbed_official 82:0b31dbcd4769 104
mbed_official 82:0b31dbcd4769 105 // write new value
mbed_official 82:0b31dbcd4769 106 obj->spi->C1 |= c1_data;
mbed_official 82:0b31dbcd4769 107 }
mbed_official 82:0b31dbcd4769 108
mbed_official 82:0b31dbcd4769 109 void spi_frequency(spi_t *obj, int hz) {
mbed_official 82:0b31dbcd4769 110 uint32_t error = 0;
mbed_official 82:0b31dbcd4769 111 uint32_t p_error = 0xffffffff;
mbed_official 82:0b31dbcd4769 112 uint32_t ref = 0;
mbed_official 82:0b31dbcd4769 113 uint8_t spr = 0;
mbed_official 82:0b31dbcd4769 114 uint8_t ref_spr = 0;
mbed_official 82:0b31dbcd4769 115 uint8_t ref_prescaler = 0;
mbed_official 82:0b31dbcd4769 116
mbed_official 82:0b31dbcd4769 117 // bus clk
mbed_official 82:0b31dbcd4769 118 uint32_t PCLK = SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1);
mbed_official 82:0b31dbcd4769 119 uint8_t prescaler = 1;
mbed_official 82:0b31dbcd4769 120 uint8_t divisor = 2;
mbed_official 82:0b31dbcd4769 121
mbed_official 82:0b31dbcd4769 122 for (prescaler = 1; prescaler <= 8; prescaler++) {
mbed_official 82:0b31dbcd4769 123 divisor = 2;
mbed_official 82:0b31dbcd4769 124 for (spr = 0; spr <= 8; spr++) {
mbed_official 82:0b31dbcd4769 125 ref = PCLK / (prescaler*divisor);
mbed_official 82:0b31dbcd4769 126 if (ref > (uint32_t)hz)
mbed_official 82:0b31dbcd4769 127 continue;
mbed_official 82:0b31dbcd4769 128 error = hz - ref;
mbed_official 82:0b31dbcd4769 129 if (error < p_error) {
mbed_official 82:0b31dbcd4769 130 ref_spr = spr;
mbed_official 82:0b31dbcd4769 131 ref_prescaler = prescaler - 1;
mbed_official 82:0b31dbcd4769 132 p_error = error;
mbed_official 82:0b31dbcd4769 133 }
mbed_official 82:0b31dbcd4769 134 divisor *= 2;
mbed_official 82:0b31dbcd4769 135 }
mbed_official 82:0b31dbcd4769 136 }
mbed_official 82:0b31dbcd4769 137
mbed_official 82:0b31dbcd4769 138 // set SPPR and SPR
mbed_official 82:0b31dbcd4769 139 obj->spi->BR = ((ref_prescaler & 0x7) << 4) | (ref_spr & 0xf);
mbed_official 82:0b31dbcd4769 140 }
mbed_official 82:0b31dbcd4769 141
mbed_official 82:0b31dbcd4769 142 static inline int spi_writeable(spi_t * obj) {
mbed_official 82:0b31dbcd4769 143 return (obj->spi->S & SPI_S_SPTEF_MASK) ? 1 : 0;
mbed_official 82:0b31dbcd4769 144 }
mbed_official 82:0b31dbcd4769 145
mbed_official 82:0b31dbcd4769 146 static inline int spi_readable(spi_t * obj) {
mbed_official 82:0b31dbcd4769 147 return (obj->spi->S & SPI_S_SPRF_MASK) ? 1 : 0;
mbed_official 82:0b31dbcd4769 148 }
mbed_official 82:0b31dbcd4769 149
mbed_official 82:0b31dbcd4769 150 int spi_master_write(spi_t *obj, int value) {
mbed_official 82:0b31dbcd4769 151 // wait tx buffer empty
mbed_official 82:0b31dbcd4769 152 while(!spi_writeable(obj));
mbed_official 82:0b31dbcd4769 153 obj->spi->D = (value & 0xff);
mbed_official 82:0b31dbcd4769 154
mbed_official 82:0b31dbcd4769 155 // wait rx buffer full
mbed_official 82:0b31dbcd4769 156 while (!spi_readable(obj));
mbed_official 82:0b31dbcd4769 157 return obj->spi->D & 0xff;
mbed_official 82:0b31dbcd4769 158 }
mbed_official 82:0b31dbcd4769 159
mbed_official 82:0b31dbcd4769 160 int spi_slave_receive(spi_t *obj) {
mbed_official 82:0b31dbcd4769 161 return spi_readable(obj);
mbed_official 82:0b31dbcd4769 162 }
mbed_official 82:0b31dbcd4769 163
mbed_official 82:0b31dbcd4769 164 int spi_slave_read(spi_t *obj) {
mbed_official 82:0b31dbcd4769 165 return obj->spi->D;
mbed_official 82:0b31dbcd4769 166 }
mbed_official 82:0b31dbcd4769 167
mbed_official 82:0b31dbcd4769 168 void spi_slave_write(spi_t *obj, int value) {
mbed_official 82:0b31dbcd4769 169 while (!spi_writeable(obj));
mbed_official 82:0b31dbcd4769 170 obj->spi->D = value;
mbed_official 82:0b31dbcd4769 171 }