Ken Todotani
/
mbed-src
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mbed official
Revision 84:f54042cbc282, committed 2014-02-03
- Comitter:
- mbed_official
- Date:
- Mon Feb 03 09:30:05 2014 +0000
- Parent:
- 83:5a6f638110fe
- Child:
- 85:e1a8e879a6a9
- Commit message:
- Synchronized with git revision bbbd8699601c42149ccf0c37bc42bb6856ccc4c6
Full URL: https://github.com/mbedmicro/mbed/commit/bbbd8699601c42149ccf0c37bc42bb6856ccc4c6/
[NUCLEO_L152RE/F030_R8] SPI, I2C, Ticker, PWM updates
Changed in this revision
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/misc.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/misc.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file misc.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the miscellaneous firmware functions (add-on * to CMSIS functions). ******************************************************************************* @@ -237,4 +237,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/misc.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/misc.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file misc.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the miscellaneous * firmware library functions (add-on to CMSIS functions). ******************************************************************************* @@ -232,4 +232,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_adc.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_adc.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_adc.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the ADC firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -1319,4 +1319,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_adc.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_adc.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_adc.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the ADC firmware * library. ******************************************************************************* @@ -495,4 +495,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_bkp.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_bkp.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_bkp.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the BKP firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -320,4 +320,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_bkp.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_bkp.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_bkp.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the BKP firmware * library. ******************************************************************************* @@ -207,4 +207,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_can.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_can.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_can.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the CAN firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -1427,4 +1427,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_can.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_can.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_can.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the CAN firmware * library. ******************************************************************************* @@ -709,4 +709,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_cec.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_cec.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_cec.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the CEC firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -445,4 +445,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_cec.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_cec.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_cec.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the CEC firmware * library. ******************************************************************************* @@ -222,4 +222,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_conf.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_conf.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h * @author MCD Application Team - * @version V3.5.0 - * @date 08-April-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief Library configuration file. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -89,4 +89,4 @@ #endif /* __STM32F10x_CONF_H */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_crc.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_crc.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_crc.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the CRC firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -172,4 +172,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_crc.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_crc.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_crc.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the CRC firmware * library. ******************************************************************************* @@ -106,4 +106,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dac.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dac.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_dac.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the DAC firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -583,4 +583,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dac.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dac.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_dac.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the DAC firmware * library. ******************************************************************************* @@ -329,4 +329,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dbgmcu.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dbgmcu.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_dbgmcu.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the DBGMCU firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -174,4 +174,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dbgmcu.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dbgmcu.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_dbgmcu.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the DBGMCU * firmware library. ******************************************************************************* @@ -131,4 +131,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dma.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dma.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_dma.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the DMA firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -726,4 +726,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dma.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_dma.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_dma.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the DMA firmware * library. ******************************************************************************* @@ -451,4 +451,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_exti.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_exti.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_exti.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the EXTI firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -281,4 +281,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_exti.h Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_exti.h Mon Feb 03 09:30:05 2014 +0000
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f10x_exti.h
* @author MCD Application Team
- * @version V3.5.0
- * @date 11-March-2011
+ * @version V3.6.1
+ * @date 05-March-2012
* @brief This file contains all the functions prototypes for the EXTI firmware
* library.
*******************************************************************************
@@ -97,7 +97,7 @@
This parameter can be a value of @ref EXTIMode_TypeDef */
EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
- This parameter can be a value of @ref EXTIMode_TypeDef */
+ This parameter can be a value of @ref EXTITrigger_TypeDef */
FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
This parameter can be set either to ENABLE or DISABLE */
@@ -196,4 +196,4 @@
* @}
*/
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_flash.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_flash.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_flash.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the FLASH firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -88,11 +88,6 @@ #define WRP3_Mask ((uint32_t)0xFF000000) #define OB_USER_BFB2 ((uint16_t)0x0008) -/* FLASH Keys */ -#define RDP_Key ((uint16_t)0x00A5) -#define FLASH_KEY1 ((uint32_t)0x45670123) -#define FLASH_KEY2 ((uint32_t)0xCDEF89AB) - /* FLASH BANK address */ #define FLASH_BANK1_END_ADDRESS ((uint32_t)0x807FFFF) @@ -1696,4 +1691,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_flash.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_flash.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_flash.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the FLASH * firmware library. ******************************************************************************* @@ -438,4 +438,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_fsmc.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_fsmc.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_fsmc.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the FSMC firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -878,4 +878,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_fsmc.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_fsmc.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_fsmc.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the FSMC firmware * library. ******************************************************************************* @@ -745,4 +745,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_gpio.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_gpio.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_gpio.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the GPIO firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -662,4 +662,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_gpio.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_gpio.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_gpio.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the GPIO * firmware library. ******************************************************************************* @@ -397,4 +397,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_i2c.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_i2c.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_i2c.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the I2C firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -1343,4 +1343,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_i2c.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_i2c.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_i2c.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the I2C firmware * library. ******************************************************************************* @@ -696,4 +696,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_iwdg.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_iwdg.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_iwdg.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the IWDG firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -202,4 +202,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_iwdg.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_iwdg.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_iwdg.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the IWDG * firmware library. ******************************************************************************* @@ -152,4 +152,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_pwr.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_pwr.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_pwr.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the PWR firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -319,4 +319,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_pwr.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_pwr.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_pwr.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the PWR firmware * library. ******************************************************************************* @@ -168,4 +168,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rcc.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rcc.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_rcc.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the RCC firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -1482,4 +1482,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rcc.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rcc.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_rcc.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the RCC firmware * library. ******************************************************************************* @@ -739,4 +739,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rtc.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rtc.c Mon Feb 03 09:30:05 2014 +0000
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f10x_rtc.c
* @author MCD Application Team
- * @version V3.5.0
- * @date 11-March-2011
+ * @version V3.6.1
+ * @date 05-March-2012
* @brief This file provides all the RTC firmware functions.
*******************************************************************************
* Copyright (c) 2014, STMicroelectronics
@@ -147,9 +147,22 @@
*/
uint32_t RTC_GetCounter(void)
{
- uint16_t tmp = 0;
- tmp = RTC->CNTL;
- return (((uint32_t)RTC->CNTH << 16 ) | tmp) ;
+ uint16_t high1 = 0, high2 = 0, low = 0;
+
+ high1 = RTC->CNTH;
+ low = RTC->CNTL;
+ high2 = RTC->CNTH;
+
+ if (high1 != high2)
+ { /* In this case the counter roll over during reading of CNTL and CNTH registers,
+ read again CNTL register then return the counter value */
+ return (((uint32_t) high2 << 16 ) | RTC->CNTL);
+ }
+ else
+ { /* No counter roll over during reading of CNTL and CNTH registers, counter
+ value is equal to first value of CNTL and CNTH */
+ return (((uint32_t) high1 << 16 ) | low);
+ }
}
/**
@@ -351,4 +364,4 @@
* @}
*/
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rtc.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rtc.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_rtc.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the RTC firmware * library. ******************************************************************************* @@ -147,4 +147,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_sdio.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_sdio.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_sdio.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the SDIO firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -268,8 +268,7 @@ /* Check the parameters */ assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState)); - SDIO->POWER &= PWR_PWRCTRL_MASK; - SDIO->POWER |= SDIO_PowerState; + SDIO->POWER = SDIO_PowerState; } /** @@ -811,4 +810,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_sdio.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_sdio.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_sdio.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the SDIO firmware * library. ******************************************************************************* @@ -543,4 +543,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_spi.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_spi.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_spi.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the SPI firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -920,4 +920,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_spi.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_spi.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_spi.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the SPI firmware * library. ******************************************************************************* @@ -499,4 +499,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_tim.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_tim.c Mon Feb 03 09:30:05 2014 +0000
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f10x_tim.c
* @author MCD Application Team
- * @version V3.5.0
- * @date 11-March-2011
+ * @version V3.6.1
+ * @date 05-March-2012
* @brief This file provides all the TIM firmware functions.
*******************************************************************************
* Copyright (c) 2014, STMicroelectronics
@@ -2126,10 +2126,10 @@
* @param TIMx: where x can be 1 to 17 to select the TIM peripheral.
* @param TIM_UpdateSource: specifies the Update source.
* This parameter can be one of the following values:
- * @arg TIM_UpdateSource_Regular: Source of update is the counter overflow/underflow
+ * @arg TIM_UpdateSource_Global: Source of update is the counter overflow/underflow
or the setting of UG bit, or an update generation
through the slave mode controller.
- * @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow.
+ * @arg TIM_UpdateSource_Regular: Source of update is counter overflow/underflow.
* @retval None
*/
void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource)
@@ -2902,4 +2902,4 @@
* @}
*/
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_tim.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_tim.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_tim.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the TIM firmware * library. ******************************************************************************* @@ -1176,4 +1176,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_usart.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_usart.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_usart.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the USART firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -962,7 +962,8 @@ * @arg USART_IT_TC: Transmission complete interrupt * @arg USART_IT_RXNE: Receive Data register not empty interrupt * @arg USART_IT_IDLE: Idle line detection interrupt - * @arg USART_IT_ORE: OverRun Error interrupt + * @arg USART_IT_ORE_RX : OverRun Error interrupt if the RXNEIE bit is set + * @arg USART_IT_ORE_ER : OverRun Error interrupt if the EIE bit is set * @arg USART_IT_NE: Noise Error interrupt * @arg USART_IT_FE: Framing Error interrupt * @arg USART_IT_PE: Parity Error interrupt @@ -1070,4 +1071,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_usart.h Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_usart.h Mon Feb 03 09:30:05 2014 +0000
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f10x_usart.h
* @author MCD Application Team
- * @version V3.5.0
- * @date 11-March-2011
+ * @version V3.6.1
+ * @date 05-March-2012
* @brief This file contains all the functions prototypes for the USART
* firmware library.
*******************************************************************************
@@ -258,22 +258,35 @@
#define USART_IT_TXE ((uint16_t)0x0727)
#define USART_IT_TC ((uint16_t)0x0626)
#define USART_IT_RXNE ((uint16_t)0x0525)
+#define USART_IT_ORE_RX ((uint16_t)0x0325) /* In case interrupt is generated if the RXNEIE bit is set */
#define USART_IT_IDLE ((uint16_t)0x0424)
#define USART_IT_LBD ((uint16_t)0x0846)
#define USART_IT_CTS ((uint16_t)0x096A)
#define USART_IT_ERR ((uint16_t)0x0060)
-#define USART_IT_ORE ((uint16_t)0x0360)
+#define USART_IT_ORE_ER ((uint16_t)0x0360) /* In case interrupt is generated if the EIE bit is set */
#define USART_IT_NE ((uint16_t)0x0260)
#define USART_IT_FE ((uint16_t)0x0160)
+
+/** @defgroup USART_Legacy
+ * @{
+ */
+#define USART_IT_ORE USART_IT_ORE_ER
+/**
+ * @}
+ */
+
#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
+
#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
+ ((IT) == USART_IT_ORE_RX) || ((IT) == USART_IT_ORE_ER) || \
((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
+
#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
/**
@@ -350,9 +363,7 @@
((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
-#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\
- ((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \
- || ((USART_FLAG) != USART_FLAG_CTS))
+
#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
@@ -424,4 +435,4 @@
* @}
*/
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_wwdg.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_wwdg.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_wwdg.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file provides all the WWDG firmware functions. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -236,4 +236,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_wwdg.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_wwdg.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file stm32f10x_wwdg.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief This file contains all the functions prototypes for the WWDG firmware * library. ******************************************************************************* @@ -127,4 +127,4 @@ * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.c Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.c Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file system_stm32f10x.c * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.1 + * @date 05-March-2012 * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. * * 1. This file provides two functions and one global variable to be called from @@ -1106,4 +1106,4 @@ /** * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.h Mon Feb 03 09:30:05 2014 +0000 @@ -2,8 +2,8 @@ ****************************************************************************** * @file system_stm32f10x.h * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 + * @version V3.6.2 + * @date 28-February-2013 * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. ******************************************************************************* * Copyright (c) 2014, STMicroelectronics @@ -110,4 +110,4 @@ /** * @} */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/PeripheralNames.h Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/PeripheralNames.h Mon Feb 03 09:30:05 2014 +0000
@@ -65,7 +65,7 @@
} I2CName;
typedef enum {
- TIM_1 = (int)TIM1_BASE,
+ TIM_3 = (int)TIM3_BASE,
TIM_14 = (int)TIM14_BASE,
TIM_16 = (int)TIM16_BASE
} PWMName;
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/device.h Fri Jan 31 10:15:06 2014 +0000 +++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/device.h Mon Feb 03 09:30:05 2014 +0000 @@ -44,7 +44,7 @@ #define DEVICE_I2C 1 #define DEVICE_I2CSLAVE 0 -#define DEVICE_SPI 0 +#define DEVICE_SPI 1 #define DEVICE_SPISLAVE 0 #define DEVICE_RTC 1
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/gpio_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/gpio_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -42,15 +42,13 @@
}
void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) {
- GPIO_TypeDef *gpio;
-
if (pin == NC) return;
uint32_t port_index = STM_PORT(pin);
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Fill GPIO object structure for future use
obj->pin = pin;
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/gpio_irq_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/gpio_irq_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -48,7 +48,6 @@
static gpio_irq_handler irq_handler;
static void handle_interrupt_in(uint32_t irq_index) {
-
// Retrieve the gpio and pin that generate the irq
GPIO_TypeDef *gpio = (GPIO_TypeDef *)(channel_gpio[irq_index]);
uint32_t pin = (uint32_t)(1 << channel_pin[irq_index]);
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/i2c_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/i2c_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -42,12 +42,12 @@
#define LONG_TIMEOUT ((int)0x8000)
static const PinMap PinMap_I2C_SDA[] = {
- {PB_9, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_NOPULL, GPIO_AF_1)},
+ {PB_9, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_1)},
{NC, NC, 0}
};
static const PinMap PinMap_I2C_SCL[] = {
- {PB_8, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_NOPULL, GPIO_AF_1)},
+ {PB_8, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_1)},
{NC, NC, 0}
};
@@ -71,10 +71,10 @@
//}
// Configure I2C pins
+ pinmap_pinout(scl, PinMap_I2C_SCL);
+ pin_mode(scl, OpenDrain);
pinmap_pinout(sda, PinMap_I2C_SDA);
- pinmap_pinout(scl, PinMap_I2C_SCL);
pin_mode(sda, OpenDrain);
- pin_mode(scl, OpenDrain);
// Reset to clear pending flags if any
i2c_reset(obj);
@@ -120,12 +120,15 @@
inline int i2c_start(i2c_t *obj) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
- int timeout = LONG_TIMEOUT;
+ int timeout;
// Test BUSY Flag
- while (I2C_GetFlagStatus(i2c, I2C_ISR_BUSY) != RESET)
- {
- if ((timeout--) == 0) return 0;
+ timeout = LONG_TIMEOUT;
+ while (I2C_GetFlagStatus(i2c, I2C_ISR_BUSY) != RESET) {
+ timeout--;
+ if (timeout == 0) {
+ return 0;
+ }
}
I2C_GenerateSTART(i2c, ENABLE);
@@ -135,27 +138,21 @@
inline int i2c_stop(i2c_t *obj) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
-
+
I2C_GenerateSTOP(i2c, ENABLE);
-
+
return 0;
}
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
- int timeout;
int count;
int value;
-
+
if (length == 0) return 0;
// Configure slave address, nbytes, reload, end mode and start or stop generation
- if (stop) {
- I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Read);
- }
- else {
- I2C_TransferHandling(i2c, address, length, I2C_Reload_Mode, I2C_Generate_Start_Read);
- }
+ I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Read);
// Read all bytes
for (count = 0; count < length; count++) {
@@ -163,40 +160,25 @@
data[count] = (char)value;
}
- if (stop) {
- // Wait until STOPF flag is set
- timeout = LONG_TIMEOUT;
- while (I2C_GetFlagStatus(i2c, I2C_ISR_STOPF) == RESET)
- {
- if ((timeout--) == 0) return 0;
- }
-
- // Clear STOPF flag
- I2C_ClearFlag(i2c, I2C_ICR_STOPCF);
- }
-
return length;
}
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
- int timeout;
+ //int timeout;
int count;
+
+ if (length == 0) return 0;
- // Test BUSY Flag
- //timeout = LONG_TIMEOUT;
- //while (I2C_GetFlagStatus(i2c, I2C_ISR_BUSY) != RESET)
- //{
- // if((timeout--) == 0) return 0;
+ // TODO: the stop is always sent even with I2C_SoftEnd_Mode. To be corrected.
+
+ // Configure slave address, nbytes, reload, end mode and start or stop generation
+ //if (stop) {
+ I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Write);
//}
-
- // Configure slave address, nbytes, reload, end mode and start or stop generation
- if (stop) {
- I2C_TransferHandling(i2c, address, length, I2C_AutoEnd_Mode, I2C_Generate_Start_Write);
- }
- else {
- I2C_TransferHandling(i2c, address, length, I2C_Reload_Mode, I2C_Generate_Start_Write);
- }
+ //else {
+ // I2C_TransferHandling(i2c, address, length, I2C_SoftEnd_Mode, I2C_Generate_Start_Write);
+ //}
// Write all bytes
for (count = 0; count < length; count++) {
@@ -206,17 +188,20 @@
}
}
+ /*
if (stop) {
// Wait until STOPF flag is set
timeout = LONG_TIMEOUT;
- while (I2C_GetFlagStatus(i2c, I2C_ISR_STOPF) == RESET)
- {
- if ((timeout--) == 0) return 0;
- }
-
+ while (I2C_GetFlagStatus(i2c, I2C_ISR_STOPF) == RESET) {
+ timeout--;
+ if (timeout == 0) {
+ return 0;
+ }
+ }
// Clear STOPF flag
I2C_ClearFlag(i2c, I2C_ICR_STOPCF);
}
+ */
return count;
}
@@ -224,11 +209,15 @@
int i2c_byte_read(i2c_t *obj, int last) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
uint8_t data;
- int timeout = FLAG_TIMEOUT;
+ int timeout;
// Wait until the byte is received
+ timeout = FLAG_TIMEOUT;
while (I2C_GetFlagStatus(i2c, I2C_ISR_RXNE) == RESET) {
- if ((timeout--) == 0) return 0;
+ timeout--;
+ if (timeout == 0) {
+ return 0;
+ }
}
data = I2C_ReceiveData(i2c);
@@ -238,21 +227,18 @@
int i2c_byte_write(i2c_t *obj, int data) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
- int timeout = FLAG_TIMEOUT;
+ int timeout;
- // Wait until TXIS flag is set
- timeout = LONG_TIMEOUT;
- while (I2C_GetFlagStatus(i2c, I2C_ISR_TXIS) == RESET)
- {
- if ((timeout--) == 0) return 0;
+ // Wait until the previous byte is transmitted
+ timeout = FLAG_TIMEOUT;
+ while (I2C_GetFlagStatus(i2c, I2C_ISR_TXIS) == RESET) {
+ timeout--;
+ if (timeout == 0) {
+ return 0;
+ }
}
-
+
I2C_SendData(i2c, (uint8_t)data);
-
- // Wait until the byte is transmitted
- //while (I2C_GetFlagStatus(i2c, I2C_ISR_TCR) == RESET) {
- // if ((timeout--) == 0) return 0;
- //}
return 1;
}
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/pinmap.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/pinmap.c Mon Feb 03 09:30:05 2014 +0000
@@ -30,7 +30,6 @@
#include "pinmap.h"
#include "error.h"
-// Not an API function
// Enable GPIO clock and return GPIO base address
uint32_t Set_GPIO_Clock(uint32_t port_idx) {
uint32_t gpio_add = 0;
@@ -66,9 +65,6 @@
* Configure pin (mode, speed, output type and pull-up/pull-down)
*/
void pin_function(PinName pin, int data) {
- GPIO_TypeDef *gpio;
- GPIO_InitTypeDef GPIO_InitStructure;
-
if (pin == NC) return;
// Get the pin informations
@@ -82,7 +78,7 @@
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Configure Alternate Function
// Warning: Must be done before the GPIO is initialized
@@ -91,6 +87,7 @@
}
// Configure GPIO
+ GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = (uint16_t)(1 << pin_index);
GPIO_InitStructure.GPIO_Mode = (GPIOMode_TypeDef)mode;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_Level_3;
@@ -113,8 +110,6 @@
* Configure pin pull-up/pull-down
*/
void pin_mode(PinName pin, PinMode mode) {
- GPIO_TypeDef *gpio;
-
if (pin == NC) return;
uint32_t port_index = STM_PORT(pin);
@@ -122,7 +117,7 @@
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Configure pull-up/pull-down resistors
uint32_t pupd = (uint32_t)mode;
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/port_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/port_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -43,13 +43,11 @@
}
void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
- GPIO_TypeDef *gpio;
-
- uint32_t port_index = (uint32_t)port; // (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, ...)
+ uint32_t port_index = (uint32_t)port;
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Fill PORT object structure for future use
obj->port = port;
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/pwmout_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -0,0 +1,162 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#include "pwmout_api.h"
+
+#include "cmsis.h"
+#include "pinmap.h"
+#include "error.h"
+
+static const PinMap PinMap_PWM[] = {
+ {PA_7, TIM_14, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_NOPULL, GPIO_AF_4)}, // TIM14_CH1
+ {PC_7, TIM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_NOPULL, GPIO_AF_0)}, // TIM3_CH2
+ {PB_6, TIM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_NOPULL, GPIO_AF_2)}, // TIM16_CH1N --> FAIL
+ {NC, NC, 0}
+};
+
+void pwmout_init(pwmout_t* obj, PinName pin) {
+ // Get the peripheral name from the pin and assign it to the object
+ obj->pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
+
+ if (obj->pwm == (PWMName)NC) {
+ error("PWM pinout mapping failed");
+ }
+
+ // Enable TIM clock
+ if (obj->pwm == TIM_3) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
+ if (obj->pwm == TIM_14) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM14, ENABLE);
+ if (obj->pwm == TIM_16) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM16, ENABLE);
+
+ // Configure GPIO
+ pinmap_pinout(pin, PinMap_PWM);
+ //pin_mode(pin, PullUp);
+
+ obj->pin = pin;
+ obj->period = 0;
+ obj->pulse = 0;
+
+ pwmout_period_us(obj, 20000); // 20 ms per default
+}
+
+void pwmout_free(pwmout_t* obj) {
+ TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
+ TIM_DeInit(tim);
+}
+
+void pwmout_write(pwmout_t* obj, float value) {
+ TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
+ TIM_OCInitTypeDef TIM_OCInitStructure;
+
+ if (value < 0.0) {
+ value = 0.0;
+ } else if (value > 1.0) {
+ value = 1.0;
+ }
+
+ obj->pulse = (uint32_t)((float)obj->period * value);
+
+ TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
+ TIM_OCInitStructure.TIM_Pulse = obj->pulse;
+
+ // Configure channel 1
+ if (obj->pin == PA_7) {
+ TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
+ TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
+ TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
+ TIM_OC1Init(tim, &TIM_OCInitStructure);
+ }
+
+ // Configure channel 1N
+ if (obj->pin == PB_6) {
+ TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
+ TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
+ TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
+ TIM_OC1Init(tim, &TIM_OCInitStructure);
+ }
+
+ // Configure channel 2
+ if (obj->pin == PC_7) {
+ TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
+ TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
+ TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
+ TIM_OC2Init(tim, &TIM_OCInitStructure);
+ }
+}
+
+float pwmout_read(pwmout_t* obj) {
+ float value = 0;
+ if (obj->period > 0) {
+ value = (float)(obj->pulse) / (float)(obj->period);
+ }
+ return ((value > 1.0) ? (1.0) : (value));
+}
+
+void pwmout_period(pwmout_t* obj, float seconds) {
+ pwmout_period_us(obj, seconds * 1000000.0f);
+}
+
+void pwmout_period_ms(pwmout_t* obj, int ms) {
+ pwmout_period_us(obj, ms * 1000);
+}
+
+void pwmout_period_us(pwmout_t* obj, int us) {
+ TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
+ TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
+ float dc = pwmout_read(obj);
+
+ TIM_Cmd(tim, DISABLE);
+
+ obj->period = us;
+
+ TIM_TimeBaseStructure.TIM_Period = obj->period - 1;
+ TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
+ TIM_TimeBaseStructure.TIM_ClockDivision = 0;
+ TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
+ TIM_TimeBaseInit(tim, &TIM_TimeBaseStructure);
+
+ // Set duty cycle again
+ pwmout_write(obj, dc);
+
+ TIM_ARRPreloadConfig(tim, ENABLE);
+
+ TIM_Cmd(tim, ENABLE);
+}
+
+void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
+ pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
+}
+
+void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
+ pwmout_pulsewidth_us(obj, ms * 1000);
+}
+
+void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
+ float value = (float)us / (float)obj->period;
+ pwmout_write(obj, value);
+}
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/sleep.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/sleep.c Mon Feb 03 09:30:05 2014 +0000
@@ -32,15 +32,23 @@
void sleep(void)
{
+ // Disable us_ticker update interrupt
+ TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE);
+
SCB->SCR = 0; // Normal sleep mode for ARM core
__WFI();
+
+ // Re-enable us_ticker update interrupt
+ TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);
}
+// MCU STOP mode
+// Wake-up with external interrupt
void deepsleep(void)
-{
+{
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
// Request to enter STOP mode with regulator in low power mode
- PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
+ PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/spi_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -0,0 +1,258 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2014, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#include "spi_api.h"
+
+#if DEVICE_SPI
+
+#include <math.h>
+#include "cmsis.h"
+#include "pinmap.h"
+#include "error.h"
+
+static const PinMap PinMap_SPI_MOSI[] = {
+ {PA_7, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_NOPULL, GPIO_AF_0)},
+ {NC, NC, 0}
+};
+
+static const PinMap PinMap_SPI_MISO[] = {
+ {PA_6, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_NOPULL, GPIO_AF_0)},
+ {NC, NC, 0}
+};
+
+static const PinMap PinMap_SPI_SCLK[] = {
+ {PA_5, SPI_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_NOPULL, GPIO_AF_0)},
+ {NC, NC, 0}
+};
+
+// Only used in Slave mode
+static const PinMap PinMap_SPI_SSEL[] = {
+ {PB_6, SPI_1, STM_PIN_DATA(GPIO_Mode_IN, GPIO_OType_PP, GPIO_PuPd_NOPULL, 0)}, // Generic IO, not real H/W NSS pin
+ {NC, NC, 0}
+};
+
+static void init_spi(spi_t *obj) {
+ SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
+ SPI_InitTypeDef SPI_InitStructure;
+
+ SPI_Cmd(spi, DISABLE);
+
+ SPI_InitStructure.SPI_Mode = obj->mode;
+ SPI_InitStructure.SPI_NSS = obj->nss;
+ SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
+ SPI_InitStructure.SPI_DataSize = obj->bits;
+ SPI_InitStructure.SPI_CPOL = obj->cpol;
+ SPI_InitStructure.SPI_CPHA = obj->cpha;
+ SPI_InitStructure.SPI_BaudRatePrescaler = obj->br_presc;
+ SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
+ SPI_InitStructure.SPI_CRCPolynomial = 7;
+ SPI_Init(spi, &SPI_InitStructure);
+
+ SPI_RxFIFOThresholdConfig(spi, SPI_RxFIFOThreshold_QF);
+
+ SPI_Cmd(spi, ENABLE);
+}
+
+void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
+ // Determine the SPI to use
+ SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
+ SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
+ SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
+ SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
+
+ SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
+ SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
+
+ obj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
+
+ if (obj->spi == (SPIName)NC) {
+ error("SPI pinout mapping failed");
+ }
+
+ // Enable SPI clock
+ if (obj->spi == SPI_1) {
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
+ }
+ if (obj->spi == SPI_2) {
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
+ }
+
+ // Configure the SPI pins
+ pinmap_pinout(mosi, PinMap_SPI_MOSI);
+ pinmap_pinout(miso, PinMap_SPI_MISO);
+ pinmap_pinout(sclk, PinMap_SPI_SCLK);
+
+ // Save new values
+ obj->bits = SPI_DataSize_8b;
+ obj->cpol = SPI_CPOL_Low;
+ obj->cpha = SPI_CPHA_1Edge;
+ obj->br_presc = SPI_BaudRatePrescaler_8; // 1 MHz
+
+ if (ssel == NC) { // Master
+ obj->mode = SPI_Mode_Master;
+ obj->nss = SPI_NSS_Soft;
+ }
+ else { // Slave
+ pinmap_pinout(ssel, PinMap_SPI_SSEL);
+ obj->mode = SPI_Mode_Slave;
+ obj->nss = SPI_NSS_Soft;
+ }
+
+ init_spi(obj);
+}
+
+void spi_free(spi_t *obj) {
+ SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
+ SPI_I2S_DeInit(spi);
+}
+
+void spi_format(spi_t *obj, int bits, int mode, int slave) {
+ // Save new values
+ if (bits == 8) {
+ obj->bits = SPI_DataSize_8b;
+ }
+ else {
+ obj->bits = SPI_DataSize_16b;
+ }
+
+ switch (mode) {
+ case 0:
+ obj->cpol = SPI_CPOL_Low;
+ obj->cpha = SPI_CPHA_1Edge;
+ break;
+ case 1:
+ obj->cpol = SPI_CPOL_Low;
+ obj->cpha = SPI_CPHA_2Edge;
+ break;
+ case 2:
+ obj->cpol = SPI_CPOL_High;
+ obj->cpha = SPI_CPHA_1Edge;
+ break;
+ default:
+ obj->cpol = SPI_CPOL_High;
+ obj->cpha = SPI_CPHA_2Edge;
+ break;
+ }
+
+ if (slave == 0) {
+ obj->mode = SPI_Mode_Master;
+ obj->nss = SPI_NSS_Soft;
+ }
+ else {
+ obj->mode = SPI_Mode_Slave;
+ obj->nss = SPI_NSS_Hard;
+ }
+
+ init_spi(obj);
+}
+
+void spi_frequency(spi_t *obj, int hz) {
+ // Get SPI clock frequency
+ uint32_t PCLK = SystemCoreClock;
+
+ // Choose the baud rate divisor (between 2 and 256)
+ uint32_t divisor = PCLK / hz;
+
+ // Find the nearest power-of-2
+ divisor = (divisor > 0 ? divisor-1 : 0);
+ divisor |= divisor >> 1;
+ divisor |= divisor >> 2;
+ divisor |= divisor >> 4;
+ divisor |= divisor >> 8;
+ divisor |= divisor >> 16;
+ divisor++;
+
+ uint32_t baud_rate = __builtin_ffs(divisor) - 2;
+
+ // Save new value
+ obj->br_presc = ((baud_rate > 7) ? (7 << 3) : (baud_rate << 3));
+
+ init_spi(obj);
+}
+
+static inline int ssp_readable(spi_t *obj) {
+ int status;
+ SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
+ // Check if data is received
+ status = ((SPI_I2S_GetFlagStatus(spi, SPI_I2S_FLAG_RXNE) != RESET) ? 1 : 0);
+ return status;
+}
+
+static inline int ssp_writeable(spi_t *obj) {
+ int status;
+ SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
+ // Check if data is transmitted
+ status = ((SPI_I2S_GetFlagStatus(spi, SPI_I2S_FLAG_TXE) != RESET) ? 1 : 0);
+ return status;
+}
+
+static inline void ssp_write(spi_t *obj, int value) {
+ SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
+ while (!ssp_writeable(obj));
+ SPI_SendData8(spi, (uint8_t)value);
+}
+
+static inline int ssp_read(spi_t *obj) {
+ SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
+ while (!ssp_readable(obj));
+ return (int)SPI_ReceiveData8(spi);
+}
+
+static inline int ssp_busy(spi_t *obj) {
+ int status;
+ SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
+ status = ((SPI_I2S_GetFlagStatus(spi, SPI_I2S_FLAG_BSY) != RESET) ? 1 : 0);
+ return status;
+}
+
+int spi_master_write(spi_t *obj, int value) {
+ ssp_write(obj, value);
+ return ssp_read(obj);
+}
+
+int spi_slave_receive(spi_t *obj) {
+ return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
+};
+
+int spi_slave_read(spi_t *obj) {
+ SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
+ return (int)SPI_ReceiveData8(spi);
+}
+
+void spi_slave_write(spi_t *obj, int value) {
+ SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
+ while (!ssp_writeable(obj));
+ SPI_SendData8(spi, (uint8_t)value);
+}
+
+int spi_busy(spi_t *obj) {
+ return ssp_busy(obj);
+}
+
+#endif
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/us_ticker.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/us_ticker.c Mon Feb 03 09:30:05 2014 +0000
@@ -29,60 +29,77 @@
#include "us_ticker_api.h"
#include "PeripheralNames.h"
-// Timers selection:
-// The Master timer clocks the Slave timer
+// Timer selection:
+#define TIM_MST TIM1
+#define TIM_MST_UP_IRQ TIM1_BRK_UP_TRG_COM_IRQn
+#define TIM_MST_OC_IRQ TIM1_CC_IRQn
+#define TIM_MST_RCC RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE)
-#define TIM_MST TIM3
-#define TIM_MST_IRQ TIM3_IRQn
-#define TIM_MST_RCC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE)
+static int us_ticker_inited = 0;
+static uint32_t SlaveCounter = 0;
+static uint32_t us_ticker_int_counter = 0;
+static uint16_t us_ticker_int_remainder = 0;
+
+// Used to increment the slave counter
+static void tim_update_irq_handler(void) {
+ SlaveCounter++;
+ if (TIM_GetITStatus(TIM_MST, TIM_IT_Update) == SET) {
+ TIM_ClearITPendingBit(TIM_MST, TIM_IT_Update);
+ }
+}
-#define TIM_SLV TIM15
-#define TIM_SLV_IRQ TIM15_IRQn
-#define TIM_SLV_RCC RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM15, ENABLE)
-
-#define MST_SLV_ITR TIM_TS_ITR1
+// Used by interrupt system
+static void tim_oc_irq_handler(void) {
+ // Clear interrupt flag
+ if (TIM_GetITStatus(TIM_MST, TIM_IT_CC1) == SET) {
+ TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
+ }
+
+ if (us_ticker_int_counter > 0) {
+ TIM_SetCompare1(TIM_MST, 0xFFFF);
+ us_ticker_int_counter--;
+ } else {
+ if (us_ticker_int_remainder > 0) {
+ TIM_SetCompare1(TIM_MST, us_ticker_int_remainder);
+ us_ticker_int_remainder = 0;
+ } else {
+ // This function is going to disable the interrupts if there are
+ // no other events in the queue
+ us_ticker_irq_handler();
+ }
+ }
+}
-int us_ticker_inited = 0;
-
-void us_ticker_init(void) {
-
+void us_ticker_init(void) {
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
- TIM_OCInitTypeDef TIM_OCInitStructure;
-
+
if (us_ticker_inited) return;
us_ticker_inited = 1;
- // Enable Timers clock
+ // Enable Timer clock
TIM_MST_RCC;
- TIM_SLV_RCC;
- // Master and Slave timers time base configuration
+ // Configure time base
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 0xFFFF;
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM_MST, &TIM_TimeBaseStructure);
- TIM_TimeBaseStructure.TIM_Prescaler = 0;
- TIM_TimeBaseInit(TIM_SLV, &TIM_TimeBaseStructure);
-
- // Master timer configuration
- TIM_OCStructInit(&TIM_OCInitStructure);
- TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle;
- TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
- TIM_OCInitStructure.TIM_Pulse = 0;
- TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
- TIM_OC1Init(TIM_MST, &TIM_OCInitStructure);
- TIM_SelectMasterSlaveMode(TIM_MST, TIM_MasterSlaveMode_Enable);
- TIM_SelectOutputTrigger(TIM_MST, TIM_TRGOSource_Update);
+
+ // Configure interrupts
+ TIM_ITConfig(TIM_MST, TIM_IT_Update, ENABLE);
+ TIM_ITConfig(TIM_MST, TIM_IT_CC1, ENABLE);
- // Slave timer configuration
- TIM_SelectSlaveMode(TIM_SLV, TIM_SlaveMode_External1);
- // The connection between Master and Slave is done here
- TIM_SelectInputTrigger(TIM_SLV, MST_SLV_ITR);
+ // For 32-bit counter
+ NVIC_SetVector(TIM_MST_UP_IRQ, (uint32_t)tim_update_irq_handler);
+ NVIC_EnableIRQ(TIM_MST_UP_IRQ);
+
+ // For ouput compare
+ NVIC_SetVector(TIM_MST_OC_IRQ, (uint32_t)tim_oc_irq_handler);
+ NVIC_EnableIRQ(TIM_MST_OC_IRQ);
- // Enable timers
- TIM_Cmd(TIM_SLV, ENABLE);
+ // Enable timer
TIM_Cmd(TIM_MST, ENABLE);
}
@@ -94,10 +111,10 @@
// previous (incorrect) value of Slave and the new value of Master, which would return a
// value in the past. Avoid this by computing consecutive values of the timer until they
// are properly ordered.
- counter = (uint32_t)((uint32_t)TIM_GetCounter(TIM_SLV) << 16);
+ counter = (uint32_t)(SlaveCounter << 16);
counter += (uint32_t)TIM_GetCounter(TIM_MST);
while (1) {
- counter2 = (uint32_t)((uint32_t)TIM_GetCounter(TIM_SLV) << 16);
+ counter2 = (uint32_t)(SlaveCounter << 16);
counter2 += (uint32_t)TIM_GetCounter(TIM_MST);
if (counter2 > counter) {
break;
@@ -108,26 +125,31 @@
}
void us_ticker_set_interrupt(unsigned int timestamp) {
- if (timestamp > 0xFFFF) {
- TIM_SetCompare1(TIM_SLV, (uint16_t)((timestamp >> 16) & 0xFFFF));
- TIM_ITConfig(TIM_SLV, TIM_IT_CC1, ENABLE);
- NVIC_SetVector(TIM_SLV_IRQ, (uint32_t)us_ticker_irq_handler);
- NVIC_EnableIRQ(TIM_SLV_IRQ);
+ int delta = (int)(timestamp - us_ticker_read());
+
+ if (delta <= 0) { // This event was in the past
+ us_ticker_irq_handler();
+ return;
}
else {
- TIM_SetCompare1(TIM_MST, (uint16_t)timestamp);
- TIM_ITConfig(TIM_MST, TIM_IT_CC1, ENABLE);
- NVIC_SetVector(TIM_MST_IRQ, (uint32_t)us_ticker_irq_handler);
- NVIC_EnableIRQ(TIM_MST_IRQ);
+ us_ticker_int_counter = (uint32_t)(delta >> 16);
+ us_ticker_int_remainder = (uint16_t)(delta & 0xFFFF);
+ if (us_ticker_int_counter > 0) { // means delta > 0xFFFF
+ TIM_SetCompare1(TIM_MST, 0xFFFF);
+ us_ticker_int_counter--;
+ } else {
+ TIM_SetCompare1(TIM_MST, us_ticker_int_remainder);
+ us_ticker_int_remainder = 0;
+ }
}
}
void us_ticker_disable_interrupt(void) {
TIM_ITConfig(TIM_MST, TIM_IT_CC1, DISABLE);
- TIM_ITConfig(TIM_SLV, TIM_IT_CC1, DISABLE);
}
void us_ticker_clear_interrupt(void) {
- TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
- TIM_ClearITPendingBit(TIM_SLV, TIM_IT_CC1);
+ if (TIM_GetITStatus(TIM_MST, TIM_IT_CC1) == SET) {
+ TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
+ }
}
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/PeripheralNames.h Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/PeripheralNames.h Mon Feb 03 09:30:05 2014 +0000
@@ -62,13 +62,10 @@
typedef enum {
PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE
+ PWM_3 = (int)TIM3_BASE,
+ PWM_4 = (int)TIM4_BASE
} PWMName;
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
#ifdef __cplusplus
}
#endif
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/gpio_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/gpio_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -42,22 +42,20 @@
}
void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) {
- GPIO_TypeDef *gpio;
-
if (pin == NC) return;
uint32_t port_index = STM_PORT(pin);
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Fill GPIO object structure for future use
obj->pin = pin;
obj->mask = gpio_set(pin);
obj->reg_in = &gpio->IDR;
obj->reg_set = &gpio->BSRR;
- obj->reg_clr = &gpio->BRR;
+ obj->reg_clr = &gpio->BRR;
// Configure GPIO
if (direction == PIN_OUTPUT) {
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/gpio_irq_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/gpio_irq_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -48,7 +48,6 @@
static gpio_irq_handler irq_handler;
static void handle_interrupt_in(uint32_t irq_index) {
-
// Retrieve the gpio and pin that generate the irq
GPIO_TypeDef *gpio = (GPIO_TypeDef *)(channel_gpio[irq_index]);
uint32_t pin = (uint32_t)(1 << channel_pin[irq_index]);
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/pinmap.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/pinmap.c Mon Feb 03 09:30:05 2014 +0000
@@ -43,7 +43,6 @@
GPIO_Remap_I2C1 // 8
};
-// Not an API function
// Enable GPIO clock and return GPIO base address
uint32_t Set_GPIO_Clock(uint32_t port_idx) {
uint32_t gpio_add = 0;
@@ -75,9 +74,6 @@
* Configure pin (input, output, alternate function or analog) + output speed + AF
*/
void pin_function(PinName pin, int data) {
- GPIO_TypeDef *gpio;
- GPIO_InitTypeDef GPIO_InitStructure;
-
if (pin == NC) return;
// Get the pin informations
@@ -89,7 +85,7 @@
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Enable AFIO clock
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
@@ -101,6 +97,7 @@
}
// Configure GPIO
+ GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = (uint16_t)(1 << pin_index);
GPIO_InitStructure.GPIO_Mode = (GPIOMode_TypeDef)mode;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
@@ -120,9 +117,8 @@
* Configure pin pull-up/pull-down
*/
void pin_mode(PinName pin, PinMode mode) {
- GPIO_TypeDef *gpio;
GPIO_InitTypeDef GPIO_InitStructure;
-
+
if (pin == NC) return;
uint32_t port_index = STM_PORT(pin);
@@ -130,7 +126,7 @@
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Configure open-drain and pull-up/down
switch (mode) {
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/port_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/port_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -43,13 +43,11 @@
}
void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
- GPIO_TypeDef *gpio;
-
- uint32_t port_index = (uint32_t)port; // (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, ...)
+ uint32_t port_index = (uint32_t)port;
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Fill PORT object structure for future use
obj->port = port;
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/pwmout_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/pwmout_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -33,21 +33,13 @@
#include "pinmap.h"
#include "error.h"
-// Only TIM2 and TIM3 can be used (TIM1 and TIM4 are used by the us_ticker)
static const PinMap PinMap_PWM[] = {
- // TIM2 default
- //{PA_2, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM2_CH3 - ARDUINO D1
- //{PA_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM2_CH4 - ARDUINO D0
// TIM2 full remap
{PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 5)}, // TIM2fr_CH2 - ARDUINO D3
- //{PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 5)}, // TIM2fr_CH3 - ARDUINO D6
- // TIM3 default
- //{PA_6, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH1 - ARDUINO D12
- //{PA_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH2 - ARDUINO D11
- // TIM3 full remap
- //{PC_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM3fr_CH2 - ARDUINO D9
// TIM3 partial remap
{PB_4, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 7)}, // TIM3pr_CH1 - ARDUINO D5
+ // TIM4 default
+ {PB_6, PWM_4, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM4_CH1 - ARDUINO D10
{NC, NC, 0}
};
@@ -62,7 +54,8 @@
// Enable TIM clock
if (obj->pwm == PWM_2) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
if (obj->pwm == PWM_3) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
-
+ if (obj->pwm == PWM_4) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
+
// Configure GPIO
pinmap_pinout(pin, PinMap_PWM);
@@ -87,10 +80,7 @@
} else if (value > 1.0) {
value = 1.0;
}
-
- //while(TIM_GetFlagStatus(tim, TIM_FLAG_Update) == RESET);
- //TIM_ClearFlag(tim, TIM_FLAG_Update);
-
+
obj->pulse = (uint32_t)((float)obj->period * value);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
@@ -99,7 +89,7 @@
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
// Configure channel 1
- if (obj->pin == PB_4) {
+ if ((obj->pin == PB_4) || (obj->pin == PB_6)) {
TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC1Init(tim, &TIM_OCInitStructure);
}
@@ -109,18 +99,6 @@
TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC2Init(tim, &TIM_OCInitStructure);
}
-
- // Configure channel 3
- //if (obj->pin == PB_10) {
- // TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
- // TIM_OC3Init(tim, &TIM_OCInitStructure);
- //}
-
- // Configure channel 4
- //if (obj->pin == PA_3) {
- // TIM_OC4PreloadConfig(tim, TIM_OCPreload_Enable);
- // TIM_OC4Init(tim, &TIM_OCInitStructure);
- //}
}
float pwmout_read(pwmout_t* obj) {
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/sleep.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/sleep.c Mon Feb 03 09:30:05 2014 +0000
@@ -30,41 +30,29 @@
#include "sleep_api.h"
#include "cmsis.h"
-// This function is only necessary if the HSE is used.
-/*
-static void SYSCLKConfig_STOP(void)
-{
- ErrorStatus HSEStartUpStatus;
-
- RCC_HSEConfig(RCC_HSE_ON); // Enable HSE
-
- HSEStartUpStatus = RCC_WaitForHSEStartUp(); // Wait till HSE is ready
-
- if (HSEStartUpStatus == SUCCESS) {
- RCC_PLLCmd(ENABLE); // Enable PLL
- while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} // Wait till PLL is ready
- RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); // Select PLL as system clock source
- while(RCC_GetSYSCLKSource() != 0x08) {} // Wait till PLL is used as system clock source
- }
-}
-*/
-
void sleep(void)
{
+ // Disable us_ticker update interrupt
+ TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE);
+
SCB->SCR = 0; // Normal sleep mode for ARM core
__WFI();
+
+ // Re-enable us_ticker update interrupt
+ TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);
}
void deepsleep(void)
-{
+{
+ // Disable us_ticker update interrupt
+ TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE);
+
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
// Request to enter STOP mode with regulator in low power mode
- PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
-
- // At this stage the system has resumed from STOP mode.
- // Re-configure the system clock: enable HSE, PLL and select
- // PLL as system clock source (because HSE and PLL are disabled in STOP mode).
- //SYSCLKConfig_STOP();
+ PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
+
+ // Re-enable us_ticker update interrupt
+ TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);
}
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/us_ticker.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/us_ticker.c Mon Feb 03 09:30:05 2014 +0000
@@ -29,60 +29,77 @@
#include "us_ticker_api.h"
#include "PeripheralNames.h"
-// Timers selection:
-// The Master timer clocks the Slave timer
+// Timer selection:
+#define TIM_MST TIM1
+#define TIM_MST_UP_IRQ TIM1_UP_IRQn
+#define TIM_MST_OC_IRQ TIM1_CC_IRQn
+#define TIM_MST_RCC RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE)
-#define TIM_MST TIM1
-#define TIM_MST_IRQ TIM1_CC_IRQn
-#define TIM_MST_RCC RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE)
+static int us_ticker_inited = 0;
+static uint32_t SlaveCounter = 0;
+static uint32_t us_ticker_int_counter = 0;
+static uint16_t us_ticker_int_remainder = 0;
+
+// Used to increment the slave counter
+static void tim_update_irq_handler(void) {
+ SlaveCounter++;
+ if (TIM_GetITStatus(TIM_MST, TIM_IT_Update) == SET) {
+ TIM_ClearITPendingBit(TIM_MST, TIM_IT_Update);
+ }
+}
-#define TIM_SLV TIM4
-#define TIM_SLV_IRQ TIM4_IRQn
-#define TIM_SLV_RCC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
-
-#define MST_SLV_ITR TIM_TS_ITR0
+// Used by interrupt system
+static void tim_oc_irq_handler(void) {
+ // Clear interrupt flag
+ if (TIM_GetITStatus(TIM_MST, TIM_IT_CC1) == SET) {
+ TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
+ }
+
+ if (us_ticker_int_counter > 0) {
+ TIM_SetCompare1(TIM_MST, 0xFFFF);
+ us_ticker_int_counter--;
+ } else {
+ if (us_ticker_int_remainder > 0) {
+ TIM_SetCompare1(TIM_MST, us_ticker_int_remainder);
+ us_ticker_int_remainder = 0;
+ } else {
+ // This function is going to disable the interrupts if there are
+ // no other events in the queue
+ us_ticker_irq_handler();
+ }
+ }
+}
-int us_ticker_inited = 0;
-
-void us_ticker_init(void) {
-
+void us_ticker_init(void) {
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
- TIM_OCInitTypeDef TIM_OCInitStructure;
-
+
if (us_ticker_inited) return;
us_ticker_inited = 1;
- // Enable Timers clock
+ // Enable Timer clock
TIM_MST_RCC;
- TIM_SLV_RCC;
- // Master and Slave timers time base configuration
+ // Configure time base
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 0xFFFF;
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM_MST, &TIM_TimeBaseStructure);
- TIM_TimeBaseStructure.TIM_Prescaler = 0;
- TIM_TimeBaseInit(TIM_SLV, &TIM_TimeBaseStructure);
-
- // Master timer configuration
- TIM_OCStructInit(&TIM_OCInitStructure);
- TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle;
- TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
- TIM_OCInitStructure.TIM_Pulse = 0;
- TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
- TIM_OC1Init(TIM_MST, &TIM_OCInitStructure);
- TIM_SelectMasterSlaveMode(TIM_MST, TIM_MasterSlaveMode_Enable);
- TIM_SelectOutputTrigger(TIM_MST, TIM_TRGOSource_Update);
+
+ // Configure interrupts
+ TIM_ITConfig(TIM_MST, TIM_IT_Update, ENABLE);
+ TIM_ITConfig(TIM_MST, TIM_IT_CC1, ENABLE);
- // Slave timer configuration
- TIM_SelectSlaveMode(TIM_SLV, TIM_SlaveMode_External1);
- // The connection between Master and Slave is done here
- TIM_SelectInputTrigger(TIM_SLV, MST_SLV_ITR);
+ // For 32-bit counter
+ NVIC_SetVector(TIM_MST_UP_IRQ, (uint32_t)tim_update_irq_handler);
+ NVIC_EnableIRQ(TIM_MST_UP_IRQ);
+
+ // For ouput compare
+ NVIC_SetVector(TIM_MST_OC_IRQ, (uint32_t)tim_oc_irq_handler);
+ NVIC_EnableIRQ(TIM_MST_OC_IRQ);
- // Enable timers
- TIM_Cmd(TIM_SLV, ENABLE);
+ // Enable timer
TIM_Cmd(TIM_MST, ENABLE);
}
@@ -94,10 +111,10 @@
// previous (incorrect) value of Slave and the new value of Master, which would return a
// value in the past. Avoid this by computing consecutive values of the timer until they
// are properly ordered.
- counter = (uint32_t)((uint32_t)TIM_GetCounter(TIM_SLV) << 16);
+ counter = (uint32_t)(SlaveCounter << 16);
counter += (uint32_t)TIM_GetCounter(TIM_MST);
while (1) {
- counter2 = (uint32_t)((uint32_t)TIM_GetCounter(TIM_SLV) << 16);
+ counter2 = (uint32_t)(SlaveCounter << 16);
counter2 += (uint32_t)TIM_GetCounter(TIM_MST);
if (counter2 > counter) {
break;
@@ -108,26 +125,31 @@
}
void us_ticker_set_interrupt(unsigned int timestamp) {
- if (timestamp > 0xFFFF) {
- TIM_SetCompare1(TIM_SLV, (uint16_t)((timestamp >> 16) & 0xFFFF));
- TIM_ITConfig(TIM_SLV, TIM_IT_CC1, ENABLE);
- NVIC_SetVector(TIM_SLV_IRQ, (uint32_t)us_ticker_irq_handler);
- NVIC_EnableIRQ(TIM_SLV_IRQ);
+ int delta = (int)(timestamp - us_ticker_read());
+
+ if (delta <= 0) { // This event was in the past
+ us_ticker_irq_handler();
+ return;
}
else {
- TIM_SetCompare1(TIM_MST, (uint16_t)timestamp);
- TIM_ITConfig(TIM_MST, TIM_IT_CC1, ENABLE);
- NVIC_SetVector(TIM_MST_IRQ, (uint32_t)us_ticker_irq_handler);
- NVIC_EnableIRQ(TIM_MST_IRQ);
+ us_ticker_int_counter = (uint32_t)(delta >> 16);
+ us_ticker_int_remainder = (uint16_t)(delta & 0xFFFF);
+ if (us_ticker_int_counter > 0) { // means delta > 0xFFFF
+ TIM_SetCompare1(TIM_MST, 0xFFFF);
+ us_ticker_int_counter--;
+ } else {
+ TIM_SetCompare1(TIM_MST, us_ticker_int_remainder);
+ us_ticker_int_remainder = 0;
+ }
}
}
void us_ticker_disable_interrupt(void) {
TIM_ITConfig(TIM_MST, TIM_IT_CC1, DISABLE);
- TIM_ITConfig(TIM_SLV, TIM_IT_CC1, DISABLE);
}
void us_ticker_clear_interrupt(void) {
- TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
- TIM_ClearITPendingBit(TIM_SLV, TIM_IT_CC1);
+ if (TIM_GetITStatus(TIM_MST, TIM_IT_CC1) == SET) {
+ TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
+ }
}
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/PeripheralNames.h Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/PeripheralNames.h Mon Feb 03 09:30:05 2014 +0000
@@ -65,8 +65,9 @@
} I2CName;
typedef enum {
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE
+ PWM_2 = (int)TIM2_BASE,
+ PWM_3 = (int)TIM3_BASE,
+ PWM_4 = (int)TIM4_BASE
} PWMName;
#ifdef __cplusplus
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/gpio_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/gpio_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -42,15 +42,13 @@
}
void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) {
- GPIO_TypeDef *gpio;
-
if (pin == NC) return;
uint32_t port_index = STM_PORT(pin);
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Fill GPIO object structure for future use
obj->pin = pin;
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/gpio_irq_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/gpio_irq_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -48,7 +48,6 @@
static gpio_irq_handler irq_handler;
static void handle_interrupt_in(uint32_t irq_index) {
-
// Retrieve the gpio and pin that generate the irq
GPIO_TypeDef *gpio = (GPIO_TypeDef *)(channel_gpio[irq_index]);
uint32_t pin = (uint32_t)(1 << channel_pin[irq_index]);
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/pinmap.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/pinmap.c Mon Feb 03 09:30:05 2014 +0000
@@ -30,7 +30,6 @@
#include "pinmap.h"
#include "error.h"
-// Not an API function
// Enable GPIO clock and return GPIO base address
uint32_t Set_GPIO_Clock(uint32_t port_idx) {
uint32_t gpio_add = 0;
@@ -66,9 +65,6 @@
* Configure pin (mode, speed, output type and pull-up/pull-down)
*/
void pin_function(PinName pin, int data) {
- GPIO_TypeDef *gpio;
- GPIO_InitTypeDef GPIO_InitStructure;
-
if (pin == NC) return;
// Get the pin informations
@@ -82,7 +78,7 @@
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Configure Alternate Function
// Warning: Must be done before the GPIO is initialized
@@ -91,6 +87,7 @@
}
// Configure GPIO
+ GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = (uint16_t)(1 << pin_index);
GPIO_InitStructure.GPIO_Mode = (GPIOMode_TypeDef)mode;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz;
@@ -113,8 +110,6 @@
* Configure pin pull-up/pull-down
*/
void pin_mode(PinName pin, PinMode mode) {
- GPIO_TypeDef *gpio;
-
if (pin == NC) return;
uint32_t port_index = STM_PORT(pin);
@@ -122,7 +117,7 @@
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Configure pull-up/pull-down resistors
uint32_t pupd = (uint32_t)mode;
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/port_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/port_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -43,13 +43,11 @@
}
void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
- GPIO_TypeDef *gpio;
-
- uint32_t port_index = (uint32_t)port; // (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, ...)
+ uint32_t port_index = (uint32_t)port;
// Enable GPIO clock
uint32_t gpio_add = Set_GPIO_Clock(port_index);
- gpio = (GPIO_TypeDef *)gpio_add;
+ GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
// Fill PORT object structure for future use
obj->port = port;
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/pwmout_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/pwmout_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -34,11 +34,10 @@
#include "error.h"
static const PinMap PinMap_PWM[] = {
- {PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH2
- {PB_4, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH1
- //{PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH3
- //{PC_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH2
- {NC, NC, 0}
+ {PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM2)}, // TIM2_CH2
+ {PB_4, PWM_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM3)}, // TIM3_CH1
+ {PB_6, PWM_4, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_TIM4)}, // TIM4_CH1
+ {NC, NC, 0}
};
void pwmout_init(pwmout_t* obj, PinName pin) {
@@ -52,7 +51,8 @@
// Enable TIM clock
if (obj->pwm == PWM_2) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
if (obj->pwm == PWM_3) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
-
+ if (obj->pwm == PWM_4) RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
+
// Configure GPIO
pinmap_pinout(pin, PinMap_PWM);
@@ -77,10 +77,7 @@
} else if (value > 1.0) {
value = 1.0;
}
-
- //while(TIM_GetFlagStatus(tim, TIM_FLAG_Update) == RESET);
- //TIM_ClearFlag(tim, TIM_FLAG_Update);
-
+
obj->pulse = (uint32_t)((float)obj->period * value);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
@@ -89,7 +86,7 @@
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
// Configure channel 1
- if (obj->pin == PB_4) {
+ if ((obj->pin == PB_4) || (obj->pin == PB_6)) {
TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC1Init(tim, &TIM_OCInitStructure);
}
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/sleep.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/sleep.c Mon Feb 03 09:30:05 2014 +0000
@@ -102,10 +102,17 @@
// MCU SLEEP mode
void sleep(void)
{
+ // Disable us_ticker update interrupt
+ TIM_ITConfig(TIM9, TIM_IT_Update, DISABLE);
+
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
+
// Request to enter SLEEP mode with regulator ON
- PWR_EnterSleepMode(PWR_Regulator_ON, PWR_SLEEPEntry_WFI);
+ PWR_EnterSleepMode(PWR_Regulator_ON, PWR_SLEEPEntry_WFI);
+
+ // Re-enable us_ticker update interrupt
+ TIM_ITConfig(TIM9, TIM_IT_Update, ENABLE);
}
// MCU STOP mode (Regulator in LP mode, LSI, HSI and HSE OFF)
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/spi_api.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/spi_api.c Mon Feb 03 09:30:05 2014 +0000
@@ -114,7 +114,7 @@
obj->bits = SPI_DataSize_8b;
obj->cpol = SPI_CPOL_Low;
obj->cpha = SPI_CPHA_1Edge;
- obj->br_presc = SPI_BaudRatePrescaler_64; // Closest to 1MHz (72MHz/64 = 1.125MHz)
+ obj->br_presc = SPI_BaudRatePrescaler_16; // 1 MHz
if (ssel == NC) { // Master
obj->mode = SPI_Mode_Master;
@@ -176,7 +176,7 @@
void spi_frequency(spi_t *obj, int hz) {
// Get SPI clock frequency
- uint32_t PCLK = SystemCoreClock >> 1;
+ uint32_t PCLK = SystemCoreClock;
// Choose the baud rate divisor (between 2 and 256)
uint32_t divisor = PCLK / hz;
--- a/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/us_ticker.c Fri Jan 31 10:15:06 2014 +0000
+++ b/targets/hal/TARGET_STM/TARGET_NUCLEO_L152RE/us_ticker.c Mon Feb 03 09:30:05 2014 +0000
@@ -29,60 +29,68 @@
#include "us_ticker_api.h"
#include "PeripheralNames.h"
-// Timers selection:
-// The Master timer clocks the Slave timer
+// Timer selection:
+#define TIM_MST TIM9
+#define TIM_MST_IRQ TIM9_IRQn
+#define TIM_MST_RCC RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM9, ENABLE)
-#define TIM_MST TIM9
-#define TIM_MST_IRQ TIM9_IRQn
-#define TIM_MST_RCC RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM9, ENABLE)
+static int us_ticker_inited = 0;
+static uint32_t SlaveCounter = 0;
+static uint32_t us_ticker_int_counter = 0;
+static uint16_t us_ticker_int_remainder = 0;
+
+static void tim_update_oc_irq_handler(void) {
+ // Update interrupt: increment the slave counter
+ if (TIM_GetITStatus(TIM_MST, TIM_IT_Update) == SET) {
+ TIM_ClearITPendingBit(TIM_MST, TIM_IT_Update);
+ SlaveCounter++;
+ }
-#define TIM_SLV TIM4
-#define TIM_SLV_IRQ TIM4_IRQn
-#define TIM_SLV_RCC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
-
-#define MST_SLV_ITR TIM_TS_ITR3
+ // Output compare interrupt: used by interrupt system
+ if (TIM_GetITStatus(TIM_MST, TIM_IT_CC1) == SET) {
+ TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
+ if (us_ticker_int_counter > 0) {
+ TIM_SetCompare1(TIM_MST, 0xFFFF);
+ us_ticker_int_counter--;
+ } else {
+ if (us_ticker_int_remainder > 0) {
+ TIM_SetCompare1(TIM_MST, us_ticker_int_remainder);
+ us_ticker_int_remainder = 0;
+ } else {
+ // This function is going to disable the interrupts if there are
+ // no other events in the queue
+ us_ticker_irq_handler();
+ }
+ }
+ }
+}
-int us_ticker_inited = 0;
-
-void us_ticker_init(void) {
-
+void us_ticker_init(void) {
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
- TIM_OCInitTypeDef TIM_OCInitStructure;
-
+
if (us_ticker_inited) return;
us_ticker_inited = 1;
- // Enable Timers clock
+ // Enable Timer clock
TIM_MST_RCC;
- TIM_SLV_RCC;
- // Master and Slave timers time base configuration
+ // Configure time base
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 0xFFFF;
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM_MST, &TIM_TimeBaseStructure);
- TIM_TimeBaseStructure.TIM_Prescaler = 0;
- TIM_TimeBaseInit(TIM_SLV, &TIM_TimeBaseStructure);
-
- // Master timer configuration
- TIM_OCStructInit(&TIM_OCInitStructure);
- TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle;
- TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
- TIM_OCInitStructure.TIM_Pulse = 0;
- TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
- TIM_OC1Init(TIM_MST, &TIM_OCInitStructure);
- TIM_SelectMasterSlaveMode(TIM_MST, TIM_MasterSlaveMode_Enable);
- TIM_SelectOutputTrigger(TIM_MST, TIM_TRGOSource_Update);
+
+ // Configure interrupts
+ TIM_ITConfig(TIM_MST, TIM_IT_Update, ENABLE);
+ TIM_ITConfig(TIM_MST, TIM_IT_CC1, ENABLE);
- // Slave timer configuration
- TIM_SelectSlaveMode(TIM_SLV, TIM_SlaveMode_External1);
- // The connection between Master and Slave is done here
- TIM_SelectInputTrigger(TIM_SLV, MST_SLV_ITR);
+ // For 32-bit counter and output compare
+ NVIC_SetVector(TIM_MST_IRQ, (uint32_t)tim_update_oc_irq_handler);
+ NVIC_EnableIRQ(TIM_MST_IRQ);
- // Enable timers
- TIM_Cmd(TIM_SLV, ENABLE);
+ // Enable timer
TIM_Cmd(TIM_MST, ENABLE);
}
@@ -94,10 +102,10 @@
// previous (incorrect) value of Slave and the new value of Master, which would return a
// value in the past. Avoid this by computing consecutive values of the timer until they
// are properly ordered.
- counter = (uint32_t)((uint32_t)TIM_GetCounter(TIM_SLV) << 16);
+ counter = (uint32_t)(SlaveCounter << 16);
counter += (uint32_t)TIM_GetCounter(TIM_MST);
while (1) {
- counter2 = (uint32_t)((uint32_t)TIM_GetCounter(TIM_SLV) << 16);
+ counter2 = (uint32_t)(SlaveCounter << 16);
counter2 += (uint32_t)TIM_GetCounter(TIM_MST);
if (counter2 > counter) {
break;
@@ -108,26 +116,31 @@
}
void us_ticker_set_interrupt(unsigned int timestamp) {
- if (timestamp > 0xFFFF) {
- TIM_SetCompare1(TIM_SLV, (uint16_t)((timestamp >> 16) & 0xFFFF));
- TIM_ITConfig(TIM_SLV, TIM_IT_CC1, ENABLE);
- NVIC_SetVector(TIM_SLV_IRQ, (uint32_t)us_ticker_irq_handler);
- NVIC_EnableIRQ(TIM_SLV_IRQ);
+ int delta = (int)(timestamp - us_ticker_read());
+
+ if (delta <= 0) { // This event was in the past
+ us_ticker_irq_handler();
+ return;
}
else {
- TIM_SetCompare1(TIM_MST, (uint16_t)timestamp);
- TIM_ITConfig(TIM_MST, TIM_IT_CC1, ENABLE);
- NVIC_SetVector(TIM_MST_IRQ, (uint32_t)us_ticker_irq_handler);
- NVIC_EnableIRQ(TIM_MST_IRQ);
+ us_ticker_int_counter = (uint32_t)(delta >> 16);
+ us_ticker_int_remainder = (uint16_t)(delta & 0xFFFF);
+ if (us_ticker_int_counter > 0) { // means delta > 0xFFFF
+ TIM_SetCompare1(TIM_MST, 0xFFFF);
+ us_ticker_int_counter--;
+ } else {
+ TIM_SetCompare1(TIM_MST, us_ticker_int_remainder);
+ us_ticker_int_remainder = 0;
+ }
}
}
void us_ticker_disable_interrupt(void) {
TIM_ITConfig(TIM_MST, TIM_IT_CC1, DISABLE);
- TIM_ITConfig(TIM_SLV, TIM_IT_CC1, DISABLE);
}
void us_ticker_clear_interrupt(void) {
- TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
- TIM_ClearITPendingBit(TIM_SLV, TIM_IT_CC1);
+ if (TIM_GetITStatus(TIM_MST, TIM_IT_CC1) == SET) {
+ TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
+ }
}