UsbInc.h

00001 
00002 /*
00003 Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
00004  
00005 Permission is hereby granted, free of charge, to any person obtaining a copy
00006 of this software and associated documentation files (the "Software"), to deal
00007 in the Software without restriction, including without limitation the rights
00008 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
00009 copies of the Software, and to permit persons to whom the Software is
00010 furnished to do so, subject to the following conditions:
00011  
00012 The above copyright notice and this permission notice shall be included in
00013 all copies or substantial portions of the Software.
00014  
00015 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00016 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00017 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
00018 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
00019 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
00020 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
00021 THE SOFTWARE.
00022 */
00023 
00024 #ifndef USB_INC_H
00025 #define USB_INC_H
00026 
00027 #include "mbed.h"
00028 
00029 #define MIN(a,b) ((a)<(b)?(a):(b))
00030 #define MAX(a,b) ((a)>(b)?(a):(b))
00031 
00032 //typedef int32_t RC;
00033 
00034 typedef uint8_t byte;
00035 typedef uint16_t word;
00036 
00037 enum UsbErr
00038 {
00039   __USBERR_MIN = -0xFFFF,
00040   USBERR_DISCONNECTED,
00041   USBERR_NOTFOUND,
00042   USBERR_BADCONFIG,
00043   USBERR_PROCESSING,
00044   USBERR_HALTED, //Transfer on an ep is stalled
00045   USBERR_BUSY,
00046   USBERR_TDFAIL,
00047   USBERR_ERROR,
00048   USBERR_OK = 0
00049 };
00050 
00051 
00052 /* From NXP's USBHostLite stack's usbhost_lpc17xx.h */
00053 /* Only the types names have been changed to avoid unecessary typedefs */
00054 
00055 
00056 /*
00057 **************************************************************************************************************
00058 *                                                 NXP USB Host Stack
00059 *
00060 *                                     (c) Copyright 2008, NXP SemiConductors
00061 *                                     (c) Copyright 2008, OnChip  Technologies LLC
00062 *                                                 All Rights Reserved
00063 *
00064 *                                                  www.nxp.com
00065 *                                               www.onchiptech.com
00066 *
00067 * File           : usbhost_lpc17xx.h
00068 * Programmer(s)  : Ravikanth.P
00069 * Version        :
00070 *
00071 **************************************************************************************************************
00072 */
00073 
00074 
00075 
00076 /*
00077 **************************************************************************************************************
00078 *                                  OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
00079 **************************************************************************************************************
00080 */
00081 
00082                                             /* ------------------ HcControl Register ---------------------  */
00083 #define  OR_CONTROL_PLE                 0x00000004
00084 #define  OR_CONTROL_IE                  0x00000008
00085 #define  OR_CONTROL_CLE                 0x00000010
00086 #define  OR_CONTROL_BLE                 0x00000020
00087 #define  OR_CONTROL_HCFS                0x000000C0
00088 #define  OR_CONTROL_HC_OPER             0x00000080
00089                                             /* ----------------- HcCommandStatus Register ----------------- */
00090 #define  OR_CMD_STATUS_HCR              0x00000001
00091 #define  OR_CMD_STATUS_CLF              0x00000002
00092 #define  OR_CMD_STATUS_BLF              0x00000004
00093                                             /* --------------- HcInterruptStatus Register ----------------- */
00094 #define  OR_INTR_STATUS_WDH             0x00000002
00095 #define  OR_INTR_STATUS_RHSC            0x00000040
00096 #define  OR_INTR_STATUS_UE              0x00000010
00097                                             /* --------------- HcInterruptEnable Register ----------------- */
00098 #define  OR_INTR_ENABLE_WDH             0x00000002
00099 #define  OR_INTR_ENABLE_RHSC            0x00000040
00100 #define  OR_INTR_ENABLE_MIE             0x80000000
00101                                             /* ---------------- HcRhDescriptorA Register ------------------ */
00102 #define  OR_RH_STATUS_LPSC              0x00010000
00103 #define  OR_RH_STATUS_DRWE              0x00008000
00104                                             /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
00105 #define  OR_RH_PORT_CCS                 0x00000001
00106 #define  OR_RH_PORT_PRS                 0x00000010
00107 #define  OR_RH_PORT_CSC                 0x00010000
00108 #define  OR_RH_PORT_PRSC                0x00100000
00109 
00110 
00111 /*
00112 **************************************************************************************************************
00113 *                                               FRAME INTERVAL
00114 **************************************************************************************************************
00115 */
00116 
00117 #define  FI                     0x2EDF           /* 12000 bits per frame (-1)                               */
00118 #define  DEFAULT_FMINTERVAL     ((((6 * (FI - 210)) / 7) << 16) | FI)
00119 
00120 /*
00121 **************************************************************************************************************
00122 *                                       ENDPOINT DESCRIPTOR CONTROL FIELDS
00123 **************************************************************************************************************
00124 */
00125 
00126 #define  ED_SKIP            (uint32_t) (0x00001000)        /* Skip this ep in queue                       */
00127 
00128 /*
00129 **************************************************************************************************************
00130 *                                       TRANSFER DESCRIPTOR CONTROL FIELDS
00131 **************************************************************************************************************
00132 */
00133 
00134 #define  TD_ROUNDING        (uint32_t) (0x00040000)        /* Buffer Rounding                             */
00135 #define  TD_SETUP           (uint32_t)(0)                  /* Direction of Setup Packet                   */
00136 #define  TD_IN              (uint32_t)(0x00100000)         /* Direction In                                */
00137 #define  TD_OUT             (uint32_t)(0x00080000)         /* Direction Out                               */
00138 #define  TD_DELAY_INT(x)    (uint32_t)((x) << 21)          /* Delay Interrupt                             */
00139 #define  TD_TOGGLE_0        (uint32_t)(0x02000000)         /* Toggle 0                                    */
00140 #define  TD_TOGGLE_1        (uint32_t)(0x03000000)         /* Toggle 1                                    */
00141 #define  TD_CC              (uint32_t)(0xF0000000)         /* Completion Code                             */
00142 
00143 #define  ITD_SF             (uint32_t)(0x0000FFFF)         /* Starting Frame */
00144 #define  ITD_FC             (uint32_t)(0x07000000)         /* FrameCount */
00145 
00146 /*
00147 **************************************************************************************************************
00148 *                                       USB STANDARD REQUEST DEFINITIONS
00149 **************************************************************************************************************
00150 */
00151 
00152 #define  USB_DESCRIPTOR_TYPE_DEVICE                     1
00153 #define  USB_DESCRIPTOR_TYPE_CONFIGURATION              2
00154 #define  USB_DESCRIPTOR_TYPE_STRING                     3
00155 #define  USB_DESCRIPTOR_TYPE_INTERFACE                  4
00156 #define  USB_DESCRIPTOR_TYPE_ENDPOINT                   5
00157 #define  USB_DESCRIPTOR_TYPE_HUB                     0x29
00158                                                     /*  ----------- Control RequestType Fields  ----------- */
00159 #define  USB_DEVICE_TO_HOST         0x80
00160 #define  USB_HOST_TO_DEVICE         0x00
00161 #define  USB_REQUEST_TYPE_CLASS     0x20
00162 #define  USB_RECIPIENT_DEVICE       0x00
00163 #define  USB_RECIPIENT_INTERFACE    0x01
00164 #define  USB_RECIPIENT_OTHER        0x03
00165 
00166                                                 /* -------------- USB Standard Requests  -------------- */
00167 #define  GET_STATUS                  0
00168 #define  CLEAR_FEATURE               1
00169 #define  SET_FEATURE                 3
00170 #define  SET_ADDRESS                 5
00171 #define  GET_DESCRIPTOR              6
00172 #define  SET_CONFIGURATION           9
00173 #define  SET_INTERFACE              11
00174 
00175 /*
00176 **************************************************************************************************************
00177 *                                       TYPE DEFINITIONS
00178 **************************************************************************************************************
00179 */
00180 
00181 typedef struct hcEd {                       /* ----------- HostController EndPoint Descriptor ------------- */
00182     volatile  uint32_t  Control;              /* Endpoint descriptor control                              */
00183     volatile  uint32_t  TailTd;               /* Physical address of tail in Transfer descriptor list     */
00184     volatile  uint32_t  HeadTd;               /* Physcial address of head in Transfer descriptor list     */
00185     volatile  uint32_t  Next;                 /* Physical address of next Endpoint descriptor             */
00186 } HCED;
00187 
00188 typedef struct hcTd {                       /* ------------ HostController Transfer Descriptor ------------ */
00189     volatile  uint32_t  Control;              /* Transfer descriptor control                              */
00190     volatile  uint32_t  CurrBufPtr;           /* Physical address of current buffer pointer               */
00191     volatile  uint32_t  Next;                 /* Physical pointer to next Transfer Descriptor             */
00192     volatile  uint32_t  BufEnd;               /* Physical address of end of buffer                        */
00193 } HCTD;
00194 
00195 typedef struct hcItd {               // HostController Isochronous Transfer Descriptor
00196     volatile  uint32_t  Control;     // Transfer descriptor control
00197     volatile  uint32_t  BufferPage0; // Buffer Page 0
00198     volatile  uint32_t  Next;        // Physical pointer to next Transfer Descriptor
00199     volatile  uint32_t  BufferEnd;   // buffer End
00200     volatile  uint32_t  OffsetPSW10; // Offset1/PSW1 Offset0/PSW0
00201     volatile  uint32_t  OffsetPSW32; // Offset3/PSW3 Offset2/PSW2
00202     volatile  uint32_t  OffsetPSW54; // Offset5/PSW5 Offset4/PSW4
00203     volatile  uint32_t  OffsetPSW76; // Offset7/PSW7 Offset6/PSW6
00204 } HCITD;
00205 
00206 typedef struct hcUtd {
00207     union {
00208         HCTD  hctd;
00209         HCITD hcitd;
00210     };
00211     volatile uint32_t type;        // 1:TD, 2:ITD 
00212     volatile uint32_t UsbEndpoint;
00213     volatile uint32_t reserve1;
00214     volatile uint32_t reserve2;
00215 } HCUTD;
00216 
00217 typedef struct hcca {                       /* ----------- Host Controller Communication Area ------------  */
00218     volatile  uint32_t  IntTable[32];         /* Interrupt Table                                          */
00219     volatile  uint32_t  FrameNumber;          /* Frame Number                                             */
00220     volatile  uint32_t  DoneHead;             /* Done Head                                                */
00221     volatile  uint8_t  Reserved[116];        /* Reserved for future use                                  */
00222     volatile  uint8_t  Unknown[4];           /* Unused                                                   */
00223 } HCCA;
00224 
00225 
00226 
00227 #endif