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Show/hide line numbers us_ticker.c Source File

us_ticker.c

00001 /* mbed Microcontroller Library
00002  * Copyright (c) 2006-2013 ARM Limited
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 #include <stddef.h>
00017 #include "us_ticker_api.h"
00018 #include "PeripheralNames.h"
00019 
00020 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
00021 #define US_TICKER_TIMER      ((LPC_TIM_TypeDef *)LPC_TIM3_BASE)
00022 #define US_TICKER_TIMER_IRQn TIMER3_IRQn
00023 
00024 #elif defined(TARGET_LPC11U24)
00025 #define US_TICKER_TIMER          ((LPC_CTxxBx_Type *)LPC_CT32B1_BASE)
00026 #define US_TICKER_TIMER_IRQn     TIMER_32_1_IRQn
00027 
00028 #elif defined(TARGET_LPC812)
00029 #define US_TICKER_TIMER_IRQn     SCT_IRQn
00030 
00031 #endif
00032 
00033 int us_ticker_inited = 0;
00034 
00035 void us_ticker_init(void) {
00036     if (us_ticker_inited) return;
00037     us_ticker_inited = 1;
00038     
00039 #ifdef TARGET_LPC812
00040     // Enable the SCT clock
00041     LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8);
00042     
00043     // Clear peripheral reset the SCT:
00044     LPC_SYSCON->PRESETCTRL |= (1 << 8);
00045     
00046     // Unified counter (32 bits)
00047     LPC_SCT->CONFIG |= 1;
00048     
00049     // halt and clear the counter
00050     LPC_SCT->CTRL_L |= (1 << 2) | (1 << 3);
00051     
00052     // System Clock (12)MHz -> us_ticker (1)MHz
00053     LPC_SCT->CTRL_L |= ((SystemCoreClock /1000000 - 1) << 5);
00054     
00055     // unhalt the counter:
00056     //    - clearing bit 2 of the CTRL register
00057     LPC_SCT->CTRL_L &= ~(1 << 2);
00058     
00059 #else
00060 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
00061     LPC_SC->PCONP |= 1 << 23; // Clock TIMER_3
00062     
00063     US_TICKER_TIMER->CTCR = 0x0; // timer mode
00064     uint32_t PCLK = SystemCoreClock  / 4;
00065     
00066 #elif defined(TARGET_LPC11U24)
00067     LPC_SYSCON->SYSAHBCLKCTRL |= (1<<10); // Clock TIMER_1
00068     uint32_t PCLK = SystemCoreClock ;
00069 
00070 #endif
00071     US_TICKER_TIMER->TCR = 0x2;  // reset
00072     
00073     uint32_t prescale = PCLK / 1000000; // default to 1MHz (1 us ticks)
00074     US_TICKER_TIMER->PR = prescale - 1;
00075     US_TICKER_TIMER->TCR = 1; // enable = 1, reset = 0
00076 #endif
00077 
00078     NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
00079     NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
00080 }
00081 
00082 uint32_t us_ticker_read() {
00083     if (!us_ticker_inited)
00084         us_ticker_init();
00085     
00086 #ifdef TARGET_LPC812
00087     return LPC_SCT->COUNT_U;
00088 #else
00089     return US_TICKER_TIMER->TC;
00090 #endif
00091 }
00092 
00093 void us_ticker_set_interrupt(unsigned int timestamp) {
00094 #ifdef TARGET_LPC812
00095     // halt the counter: 
00096     //    - setting bit 2 of the CTRL register
00097     LPC_SCT->CTRL_L |= (1 << 2);
00098     
00099     // set timestamp in compare register
00100     LPC_SCT->MATCH[0].U = timestamp;
00101     
00102     // unhalt the counter:
00103     //    - clearing bit 2 of the CTRL register
00104     LPC_SCT->CTRL_L &= ~(1 << 2);
00105     
00106     // if events are not enabled, enable them
00107     if (!(LPC_SCT->EVEN & 0x01)) {
00108         
00109         // comb mode = match only
00110         LPC_SCT->EVENT[0].CTRL = (1 << 12);
00111         
00112         // ref manual:
00113         //   In simple applications that do not 
00114         //   use states, write 0x01 to this 
00115         //   register to enable an event
00116         LPC_SCT->EVENT[0].STATE |= 0x1;
00117         
00118         // enable events
00119         LPC_SCT->EVEN |= 0x1;
00120     }
00121     
00122 #else
00123     // set match value
00124     US_TICKER_TIMER->MR0 = timestamp;
00125     // enable match interrupt
00126     US_TICKER_TIMER->MCR |= 1;
00127 #endif
00128 }
00129 
00130 void us_ticker_disable_interrupt(void) {
00131 #ifdef TARGET_LPC812
00132     LPC_SCT->EVEN &= ~1;
00133 #else
00134     US_TICKER_TIMER->MCR &= ~1;
00135 #endif
00136 }
00137 
00138 void us_ticker_clear_interrupt(void) {
00139 #ifdef TARGET_LPC812
00140     LPC_SCT->EVFLAG = 1;
00141 #else
00142     US_TICKER_TIMER->IR = 1;
00143 #endif
00144 }