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Dependencies:   mbed

MAX30001/MAX30001/MAX30001.cpp@0:9ead5978d784, 2019-03-28 (annotated)

Committer:
douqan93
Date:
Thu Mar 28 08:10:23 2019 +0000
Revision:
0:9ead5978d784
MAX32620HSP raw ECG data on serial

Who changed what in which revision?

UserRevisionLine numberNew contents of line
douqan93 0:9ead5978d784 1
douqan93 0:9ead5978d784 2 /*******************************************************************************
douqan93 0:9ead5978d784 3 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
douqan93 0:9ead5978d784 4 *
douqan93 0:9ead5978d784 5 * Permission is hereby granted, free of charge, to any person obtaining a
douqan93 0:9ead5978d784 6 * copy of this software and associated documentation files (the "Software"),
douqan93 0:9ead5978d784 7 * to deal in the Software without restriction, including without limitation
douqan93 0:9ead5978d784 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
douqan93 0:9ead5978d784 9 * and/or sell copies of the Software, and to permit persons to whom the
douqan93 0:9ead5978d784 10 * Software is furnished to do so, subject to the following conditions:
douqan93 0:9ead5978d784 11 *
douqan93 0:9ead5978d784 12 * The above copyright notice and this permission notice shall be included
douqan93 0:9ead5978d784 13 * in all copies or substantial portions of the Software.
douqan93 0:9ead5978d784 14 *
douqan93 0:9ead5978d784 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
douqan93 0:9ead5978d784 16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
douqan93 0:9ead5978d784 17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
douqan93 0:9ead5978d784 18 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
douqan93 0:9ead5978d784 19 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
douqan93 0:9ead5978d784 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
douqan93 0:9ead5978d784 21 * OTHER DEALINGS IN THE SOFTWARE.
douqan93 0:9ead5978d784 22 *
douqan93 0:9ead5978d784 23 * Except as contained in this notice, the name of Maxim Integrated
douqan93 0:9ead5978d784 24 * Products, Inc. shall not be used except as stated in the Maxim Integrated
douqan93 0:9ead5978d784 25 * Products, Inc. Branding Policy.
douqan93 0:9ead5978d784 26 *
douqan93 0:9ead5978d784 27 * The mere transfer of this software does not imply any licenses
douqan93 0:9ead5978d784 28 * of trade secrets, proprietary technology, copyrights, patents,
douqan93 0:9ead5978d784 29 * trademarks, maskwork rights, or any other form of intellectual
douqan93 0:9ead5978d784 30 * property whatsoever. Maxim Integrated Products, Inc. retains all
douqan93 0:9ead5978d784 31 * ownership rights.
douqan93 0:9ead5978d784 32 *******************************************************************************
douqan93 0:9ead5978d784 33 */
douqan93 0:9ead5978d784 34
douqan93 0:9ead5978d784 35 #include "mbed.h"
douqan93 0:9ead5978d784 36 #include "MAX30001.h"
douqan93 0:9ead5978d784 37
douqan93 0:9ead5978d784 38 MAX30001 *MAX30001::instance = NULL;
douqan93 0:9ead5978d784 39
douqan93 0:9ead5978d784 40 //******************************************************************************
douqan93 0:9ead5978d784 41 MAX30001::MAX30001(PinName mosi, PinName miso, PinName sclk, PinName cs) {
douqan93 0:9ead5978d784 42 spi = new SPI(mosi, miso, sclk, cs);
douqan93 0:9ead5978d784 43 spi->frequency(3000000);
douqan93 0:9ead5978d784 44 spi_owner = true;
douqan93 0:9ead5978d784 45 functionpointer.attach(&spiHandler);
douqan93 0:9ead5978d784 46 onDataAvailableCallback = NULL;
douqan93 0:9ead5978d784 47 instance = this;
douqan93 0:9ead5978d784 48 }
douqan93 0:9ead5978d784 49
douqan93 0:9ead5978d784 50 //******************************************************************************
douqan93 0:9ead5978d784 51 MAX30001::MAX30001(SPI *_spi) {
douqan93 0:9ead5978d784 52 spi = _spi;
douqan93 0:9ead5978d784 53 spi->frequency(3000000);
douqan93 0:9ead5978d784 54 spi_owner = false;
douqan93 0:9ead5978d784 55 functionpointer.attach(&spiHandler);
douqan93 0:9ead5978d784 56 onDataAvailableCallback = NULL;
douqan93 0:9ead5978d784 57 instance = this;
douqan93 0:9ead5978d784 58 }
douqan93 0:9ead5978d784 59
douqan93 0:9ead5978d784 60 //******************************************************************************
douqan93 0:9ead5978d784 61 MAX30001::~MAX30001(void) {
douqan93 0:9ead5978d784 62 if (spi_owner) {
douqan93 0:9ead5978d784 63 delete spi;
douqan93 0:9ead5978d784 64 }
douqan93 0:9ead5978d784 65 }
douqan93 0:9ead5978d784 66
douqan93 0:9ead5978d784 67 //******************************************************************************
douqan93 0:9ead5978d784 68 int MAX30001::max30001_Rbias_FMSTR_Init(uint8_t En_rbias, uint8_t Rbiasv,
douqan93 0:9ead5978d784 69 uint8_t Rbiasp, uint8_t Rbiasn,
douqan93 0:9ead5978d784 70 uint8_t Fmstr) {
douqan93 0:9ead5978d784 71 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 72 return -1;
douqan93 0:9ead5978d784 73 }
douqan93 0:9ead5978d784 74
douqan93 0:9ead5978d784 75 max30001_cnfg_gen.bit.en_rbias = En_rbias;
douqan93 0:9ead5978d784 76 max30001_cnfg_gen.bit.rbiasv = Rbiasv;
douqan93 0:9ead5978d784 77 max30001_cnfg_gen.bit.rbiasp = Rbiasp;
douqan93 0:9ead5978d784 78 max30001_cnfg_gen.bit.rbiasn = Rbiasn;
douqan93 0:9ead5978d784 79 max30001_cnfg_gen.bit.fmstr = Fmstr;
douqan93 0:9ead5978d784 80
douqan93 0:9ead5978d784 81 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 82 return -1;
douqan93 0:9ead5978d784 83 }
douqan93 0:9ead5978d784 84 return 0;
douqan93 0:9ead5978d784 85 }
douqan93 0:9ead5978d784 86
douqan93 0:9ead5978d784 87 //******************************************************************************
douqan93 0:9ead5978d784 88 int MAX30001::max30001_CAL_InitStart(uint8_t En_Vcal, uint8_t Vmode,
douqan93 0:9ead5978d784 89 uint8_t Vmag, uint8_t Fcal, uint16_t Thigh,
douqan93 0:9ead5978d784 90 uint8_t Fifty) {
douqan93 0:9ead5978d784 91 // CNFG_CAL
douqan93 0:9ead5978d784 92 if (max30001_reg_read(CNFG_CAL, &max30001_cnfg_cal.all) == -1) {
douqan93 0:9ead5978d784 93 return -1;
douqan93 0:9ead5978d784 94 }
douqan93 0:9ead5978d784 95
douqan93 0:9ead5978d784 96 max30001_cnfg_cal.bit.vmode = Vmode;
douqan93 0:9ead5978d784 97 max30001_cnfg_cal.bit.vmag = Vmag;
douqan93 0:9ead5978d784 98 max30001_cnfg_cal.bit.fcal = Fcal;
douqan93 0:9ead5978d784 99 max30001_cnfg_cal.bit.thigh = Thigh;
douqan93 0:9ead5978d784 100 max30001_cnfg_cal.bit.fifty = Fifty;
douqan93 0:9ead5978d784 101
douqan93 0:9ead5978d784 102 if (max30001_reg_write(CNFG_CAL, max30001_cnfg_cal.all) == -1) {
douqan93 0:9ead5978d784 103 return -1;
douqan93 0:9ead5978d784 104 }
douqan93 0:9ead5978d784 105
douqan93 0:9ead5978d784 106 // RTOS uses a 32768HZ clock. 32768ticks represents 1secs. 1sec/10 =
douqan93 0:9ead5978d784 107 // 100msecs.
douqan93 0:9ead5978d784 108 wait(1.0 / 10.0);
douqan93 0:9ead5978d784 109
douqan93 0:9ead5978d784 110 if (max30001_reg_read(CNFG_CAL, &max30001_cnfg_cal.all) == -1) {
douqan93 0:9ead5978d784 111 return -1;
douqan93 0:9ead5978d784 112 }
douqan93 0:9ead5978d784 113
douqan93 0:9ead5978d784 114 max30001_cnfg_cal.bit.en_vcal = En_Vcal;
douqan93 0:9ead5978d784 115
douqan93 0:9ead5978d784 116 if (max30001_reg_write(CNFG_CAL, max30001_cnfg_cal.all) == -1) {
douqan93 0:9ead5978d784 117 return -1;
douqan93 0:9ead5978d784 118 }
douqan93 0:9ead5978d784 119
douqan93 0:9ead5978d784 120 // RTOS uses a 32768HZ clock. 32768ticks represents 1secs. 1sec/10 =
douqan93 0:9ead5978d784 121 // 100msecs.
douqan93 0:9ead5978d784 122 wait(1.0 / 10.0);
douqan93 0:9ead5978d784 123
douqan93 0:9ead5978d784 124 return 0;
douqan93 0:9ead5978d784 125 }
douqan93 0:9ead5978d784 126
douqan93 0:9ead5978d784 127 //******************************************************************************
douqan93 0:9ead5978d784 128 int MAX30001::max30001_CAL_Stop(void) {
douqan93 0:9ead5978d784 129
douqan93 0:9ead5978d784 130 if (max30001_reg_read(CNFG_CAL, &max30001_cnfg_cal.all) == -1) {
douqan93 0:9ead5978d784 131 return -1;
douqan93 0:9ead5978d784 132 }
douqan93 0:9ead5978d784 133
douqan93 0:9ead5978d784 134 max30001_cnfg_cal.bit.en_vcal = 0; // Disable VCAL, all other settings are left unaffected
douqan93 0:9ead5978d784 135
douqan93 0:9ead5978d784 136 if (max30001_reg_write(CNFG_CAL, max30001_cnfg_cal.all) == -1) {
douqan93 0:9ead5978d784 137 return -1;
douqan93 0:9ead5978d784 138 }
douqan93 0:9ead5978d784 139
douqan93 0:9ead5978d784 140 return 0;
douqan93 0:9ead5978d784 141 }
douqan93 0:9ead5978d784 142 //******************************************************************************
douqan93 0:9ead5978d784 143 //******************************************************************************
douqan93 0:9ead5978d784 144 int MAX30001::max30001_INT_assignment(max30001_intrpt_Location_t en_enint_loc, max30001_intrpt_Location_t en_eovf_loc, max30001_intrpt_Location_t en_fstint_loc,
douqan93 0:9ead5978d784 145 max30001_intrpt_Location_t en_dcloffint_loc, max30001_intrpt_Location_t en_bint_loc, max30001_intrpt_Location_t en_bovf_loc,
douqan93 0:9ead5978d784 146 max30001_intrpt_Location_t en_bover_loc, max30001_intrpt_Location_t en_bundr_loc, max30001_intrpt_Location_t en_bcgmon_loc,
douqan93 0:9ead5978d784 147 max30001_intrpt_Location_t en_pint_loc, max30001_intrpt_Location_t en_povf_loc, max30001_intrpt_Location_t en_pedge_loc,
douqan93 0:9ead5978d784 148 max30001_intrpt_Location_t en_lonint_loc, max30001_intrpt_Location_t en_rrint_loc, max30001_intrpt_Location_t en_samp_loc,
douqan93 0:9ead5978d784 149 max30001_intrpt_type_t intb_Type, max30001_intrpt_type_t int2b_Type)
douqan93 0:9ead5978d784 150
douqan93 0:9ead5978d784 151
douqan93 0:9ead5978d784 152 {
douqan93 0:9ead5978d784 153 // INT1
douqan93 0:9ead5978d784 154
douqan93 0:9ead5978d784 155 if (max30001_reg_read(EN_INT, &max30001_en_int.all) == -1) {
douqan93 0:9ead5978d784 156 return -1;
douqan93 0:9ead5978d784 157 }
douqan93 0:9ead5978d784 158
douqan93 0:9ead5978d784 159 // max30001_en_int2.bit.en_pint = 0b1; // Keep this off...
douqan93 0:9ead5978d784 160
douqan93 0:9ead5978d784 161 max30001_en_int.bit.en_eint = 0b1 & en_enint_loc;
douqan93 0:9ead5978d784 162 max30001_en_int.bit.en_eovf = 0b1 & en_eovf_loc;
douqan93 0:9ead5978d784 163 max30001_en_int.bit.en_fstint = 0b1 & en_fstint_loc;
douqan93 0:9ead5978d784 164
douqan93 0:9ead5978d784 165 max30001_en_int.bit.en_dcloffint = 0b1 & en_dcloffint_loc;
douqan93 0:9ead5978d784 166 max30001_en_int.bit.en_bint = 0b1 & en_bint_loc;
douqan93 0:9ead5978d784 167 max30001_en_int.bit.en_bovf = 0b1 & en_bovf_loc;
douqan93 0:9ead5978d784 168
douqan93 0:9ead5978d784 169 max30001_en_int.bit.en_bover = 0b1 & en_bover_loc;
douqan93 0:9ead5978d784 170 max30001_en_int.bit.en_bundr = 0b1 & en_bundr_loc;
douqan93 0:9ead5978d784 171 max30001_en_int.bit.en_bcgmon = 0b1 & en_bcgmon_loc;
douqan93 0:9ead5978d784 172
douqan93 0:9ead5978d784 173 max30001_en_int.bit.en_pint = 0b1 & en_pint_loc;
douqan93 0:9ead5978d784 174 max30001_en_int.bit.en_povf = 0b1 & en_povf_loc;
douqan93 0:9ead5978d784 175 max30001_en_int.bit.en_pedge = 0b1 & en_pedge_loc;
douqan93 0:9ead5978d784 176
douqan93 0:9ead5978d784 177 max30001_en_int.bit.en_lonint = 0b1 & en_lonint_loc;
douqan93 0:9ead5978d784 178 max30001_en_int.bit.en_rrint = 0b1 & en_rrint_loc;
douqan93 0:9ead5978d784 179 max30001_en_int.bit.en_samp = 0b1 & en_samp_loc;
douqan93 0:9ead5978d784 180
douqan93 0:9ead5978d784 181 max30001_en_int.bit.intb_type = int2b_Type;
douqan93 0:9ead5978d784 182
douqan93 0:9ead5978d784 183 if (max30001_reg_write(EN_INT, max30001_en_int.all) == -1) {
douqan93 0:9ead5978d784 184 return -1;
douqan93 0:9ead5978d784 185 }
douqan93 0:9ead5978d784 186
douqan93 0:9ead5978d784 187 // INT2
douqan93 0:9ead5978d784 188
douqan93 0:9ead5978d784 189 if (max30001_reg_read(EN_INT2, &max30001_en_int2.all) == -1) {
douqan93 0:9ead5978d784 190 return -1;
douqan93 0:9ead5978d784 191 }
douqan93 0:9ead5978d784 192
douqan93 0:9ead5978d784 193 max30001_en_int2.bit.en_eint = 0b1 & (en_enint_loc >> 1);
douqan93 0:9ead5978d784 194 max30001_en_int2.bit.en_eovf = 0b1 & (en_eovf_loc >> 1);
douqan93 0:9ead5978d784 195 max30001_en_int2.bit.en_fstint = 0b1 & (en_fstint_loc >> 1);
douqan93 0:9ead5978d784 196
douqan93 0:9ead5978d784 197 max30001_en_int2.bit.en_dcloffint = 0b1 & (en_dcloffint_loc >> 1);
douqan93 0:9ead5978d784 198 max30001_en_int2.bit.en_bint = 0b1 & (en_bint_loc >> 1);
douqan93 0:9ead5978d784 199 max30001_en_int2.bit.en_bovf = 0b1 & (en_bovf_loc >> 1);
douqan93 0:9ead5978d784 200
douqan93 0:9ead5978d784 201 max30001_en_int2.bit.en_bover = 0b1 & (en_bover_loc >> 1);
douqan93 0:9ead5978d784 202 max30001_en_int2.bit.en_bundr = 0b1 & (en_bundr_loc >> 1);
douqan93 0:9ead5978d784 203 max30001_en_int2.bit.en_bcgmon = 0b1 & (en_bcgmon_loc >> 1);
douqan93 0:9ead5978d784 204
douqan93 0:9ead5978d784 205 max30001_en_int2.bit.en_pint = 0b1 & (en_pint_loc >> 1);
douqan93 0:9ead5978d784 206 max30001_en_int2.bit.en_povf = 0b1 & (en_povf_loc >> 1);
douqan93 0:9ead5978d784 207 max30001_en_int2.bit.en_pedge = 0b1 & (en_pedge_loc >> 1);
douqan93 0:9ead5978d784 208
douqan93 0:9ead5978d784 209 max30001_en_int2.bit.en_lonint = 0b1 & (en_lonint_loc >> 1);
douqan93 0:9ead5978d784 210 max30001_en_int2.bit.en_rrint = 0b1 & (en_rrint_loc >> 1);
douqan93 0:9ead5978d784 211 max30001_en_int2.bit.en_samp = 0b1 & (en_samp_loc >> 1);
douqan93 0:9ead5978d784 212
douqan93 0:9ead5978d784 213 max30001_en_int2.bit.intb_type = intb_Type;
douqan93 0:9ead5978d784 214
douqan93 0:9ead5978d784 215 if (max30001_reg_write(EN_INT2, max30001_en_int2.all) == -1) {
douqan93 0:9ead5978d784 216 return -1;
douqan93 0:9ead5978d784 217 }
douqan93 0:9ead5978d784 218
douqan93 0:9ead5978d784 219 return 0;
douqan93 0:9ead5978d784 220 }
douqan93 0:9ead5978d784 221
douqan93 0:9ead5978d784 222 //******************************************************************************
douqan93 0:9ead5978d784 223 int MAX30001::max30001_ECG_InitStart(uint8_t En_ecg, uint8_t Openp,
douqan93 0:9ead5978d784 224 uint8_t Openn, uint8_t Pol,
douqan93 0:9ead5978d784 225 uint8_t Calp_sel, uint8_t Caln_sel,
douqan93 0:9ead5978d784 226 uint8_t E_fit, uint8_t Rate, uint8_t Gain,
douqan93 0:9ead5978d784 227 uint8_t Dhpf, uint8_t Dlpf) {
douqan93 0:9ead5978d784 228
douqan93 0:9ead5978d784 229 // CNFG_EMUX
douqan93 0:9ead5978d784 230
douqan93 0:9ead5978d784 231 if (max30001_reg_read(CNFG_EMUX, &max30001_cnfg_emux.all) == -1) {
douqan93 0:9ead5978d784 232 return -1;
douqan93 0:9ead5978d784 233 }
douqan93 0:9ead5978d784 234
douqan93 0:9ead5978d784 235 max30001_cnfg_emux.bit.openp = Openp;
douqan93 0:9ead5978d784 236 max30001_cnfg_emux.bit.openn = Openn;
douqan93 0:9ead5978d784 237 max30001_cnfg_emux.bit.pol = Pol;
douqan93 0:9ead5978d784 238 max30001_cnfg_emux.bit.calp_sel = Calp_sel;
douqan93 0:9ead5978d784 239 max30001_cnfg_emux.bit.caln_sel = Caln_sel;
douqan93 0:9ead5978d784 240
douqan93 0:9ead5978d784 241 if (max30001_reg_write(CNFG_EMUX, max30001_cnfg_emux.all) == -1) {
douqan93 0:9ead5978d784 242 return -1;
douqan93 0:9ead5978d784 243 }
douqan93 0:9ead5978d784 244
douqan93 0:9ead5978d784 245 /**** ENABLE CHANNELS ****/
douqan93 0:9ead5978d784 246 // CNFG_GEN
douqan93 0:9ead5978d784 247
douqan93 0:9ead5978d784 248 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 249 return -1;
douqan93 0:9ead5978d784 250 }
douqan93 0:9ead5978d784 251
douqan93 0:9ead5978d784 252 max30001_cnfg_gen.bit.en_ecg = En_ecg; // 0b1
douqan93 0:9ead5978d784 253
douqan93 0:9ead5978d784 254 // fmstr is default
douqan93 0:9ead5978d784 255
douqan93 0:9ead5978d784 256 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 257 return -1;
douqan93 0:9ead5978d784 258 }
douqan93 0:9ead5978d784 259
douqan93 0:9ead5978d784 260 /**** Wait for PLL Lock & References to settle down ****/
douqan93 0:9ead5978d784 261
douqan93 0:9ead5978d784 262 max30001_timeout = 0;
douqan93 0:9ead5978d784 263
douqan93 0:9ead5978d784 264 do {
douqan93 0:9ead5978d784 265 if (max30001_reg_read(STATUS, &max30001_status.all) == -1) // Wait and spin for PLL to lock...
douqan93 0:9ead5978d784 266 {
douqan93 0:9ead5978d784 267 return -1;
douqan93 0:9ead5978d784 268 }
douqan93 0:9ead5978d784 269 } while (max30001_status.bit.pllint == 1 && max30001_timeout++ <= 1000);
douqan93 0:9ead5978d784 270
douqan93 0:9ead5978d784 271 // MNGR_INT
douqan93 0:9ead5978d784 272
douqan93 0:9ead5978d784 273 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 274 return -1;
douqan93 0:9ead5978d784 275 }
douqan93 0:9ead5978d784 276
douqan93 0:9ead5978d784 277 max30001_mngr_int.bit.e_fit = E_fit; // 31
douqan93 0:9ead5978d784 278
douqan93 0:9ead5978d784 279 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 280 return -1;
douqan93 0:9ead5978d784 281 }
douqan93 0:9ead5978d784 282
douqan93 0:9ead5978d784 283 // CNFG_ECG
douqan93 0:9ead5978d784 284
douqan93 0:9ead5978d784 285 if (max30001_reg_read(CNFG_ECG, &max30001_cnfg_ecg.all) == -1) {
douqan93 0:9ead5978d784 286 return -1;
douqan93 0:9ead5978d784 287 }
douqan93 0:9ead5978d784 288
douqan93 0:9ead5978d784 289 max30001_cnfg_ecg.bit.rate = Rate;
douqan93 0:9ead5978d784 290 max30001_cnfg_ecg.bit.gain = Gain;
douqan93 0:9ead5978d784 291 max30001_cnfg_ecg.bit.dhpf = Dhpf;
douqan93 0:9ead5978d784 292 max30001_cnfg_ecg.bit.dlpf = Dlpf;
douqan93 0:9ead5978d784 293
douqan93 0:9ead5978d784 294 if (max30001_reg_write(CNFG_ECG, max30001_cnfg_ecg.all) == -1) {
douqan93 0:9ead5978d784 295 return -1;
douqan93 0:9ead5978d784 296 }
douqan93 0:9ead5978d784 297
douqan93 0:9ead5978d784 298 return 0;
douqan93 0:9ead5978d784 299 }
douqan93 0:9ead5978d784 300
douqan93 0:9ead5978d784 301 //******************************************************************************
douqan93 0:9ead5978d784 302 int MAX30001::max30001_ECGFast_Init(uint8_t Clr_Fast, uint8_t Fast, uint8_t Fast_Th) {
douqan93 0:9ead5978d784 303 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 304 return -1;
douqan93 0:9ead5978d784 305 }
douqan93 0:9ead5978d784 306
douqan93 0:9ead5978d784 307 max30001_mngr_int.bit.clr_fast = Clr_Fast;
douqan93 0:9ead5978d784 308
douqan93 0:9ead5978d784 309 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 310 return -1;
douqan93 0:9ead5978d784 311 }
douqan93 0:9ead5978d784 312
douqan93 0:9ead5978d784 313 if (max30001_reg_read(MNGR_DYN, &max30001_mngr_dyn.all) == -1) {
douqan93 0:9ead5978d784 314 return -1;
douqan93 0:9ead5978d784 315 }
douqan93 0:9ead5978d784 316
douqan93 0:9ead5978d784 317 max30001_mngr_dyn.bit.fast = Fast;
douqan93 0:9ead5978d784 318 max30001_mngr_dyn.bit.fast_th = Fast_Th;
douqan93 0:9ead5978d784 319
douqan93 0:9ead5978d784 320 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 321 return -1;
douqan93 0:9ead5978d784 322 }
douqan93 0:9ead5978d784 323
douqan93 0:9ead5978d784 324 return 0;
douqan93 0:9ead5978d784 325 }
douqan93 0:9ead5978d784 326
douqan93 0:9ead5978d784 327 //******************************************************************************
douqan93 0:9ead5978d784 328 int MAX30001::max30001_Stop_ECG(void) {
douqan93 0:9ead5978d784 329
douqan93 0:9ead5978d784 330 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 331 return -1;
douqan93 0:9ead5978d784 332 }
douqan93 0:9ead5978d784 333
douqan93 0:9ead5978d784 334 max30001_cnfg_gen.bit.en_ecg = 0; // Stop ECG
douqan93 0:9ead5978d784 335
douqan93 0:9ead5978d784 336 // fmstr is default
douqan93 0:9ead5978d784 337
douqan93 0:9ead5978d784 338 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 339 return -1;
douqan93 0:9ead5978d784 340 }
douqan93 0:9ead5978d784 341
douqan93 0:9ead5978d784 342 return 0;
douqan93 0:9ead5978d784 343 }
douqan93 0:9ead5978d784 344
douqan93 0:9ead5978d784 345 //******************************************************************************
douqan93 0:9ead5978d784 346 int MAX30001::max30001_PACE_InitStart(uint8_t En_pace, uint8_t Clr_pedge,
douqan93 0:9ead5978d784 347 uint8_t Pol, uint8_t Gn_diff_off,
douqan93 0:9ead5978d784 348 uint8_t Gain, uint8_t Aout_lbw,
douqan93 0:9ead5978d784 349 uint8_t Aout, uint8_t Dacp,
douqan93 0:9ead5978d784 350 uint8_t Dacn) {
douqan93 0:9ead5978d784 351
douqan93 0:9ead5978d784 352 /**** SET MASTER FREQUENCY, ENABLE CHANNELS ****/
douqan93 0:9ead5978d784 353
douqan93 0:9ead5978d784 354 // CNFG_GEN
douqan93 0:9ead5978d784 355
douqan93 0:9ead5978d784 356 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 357 return -1;
douqan93 0:9ead5978d784 358 }
douqan93 0:9ead5978d784 359
douqan93 0:9ead5978d784 360 max30001_cnfg_gen.bit.en_pace = En_pace; // 0b1;
douqan93 0:9ead5978d784 361
douqan93 0:9ead5978d784 362 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 363 return -1;
douqan93 0:9ead5978d784 364 }
douqan93 0:9ead5978d784 365
douqan93 0:9ead5978d784 366 /**** Wait for PLL Lock & References to settle down ****/
douqan93 0:9ead5978d784 367 max30001_timeout = 0;
douqan93 0:9ead5978d784 368
douqan93 0:9ead5978d784 369 do {
douqan93 0:9ead5978d784 370 if (max30001_reg_read(STATUS, &max30001_status.all) ==
douqan93 0:9ead5978d784 371 -1) // Wait and spin for PLL to lock...
douqan93 0:9ead5978d784 372 {
douqan93 0:9ead5978d784 373 return -1;
douqan93 0:9ead5978d784 374 }
douqan93 0:9ead5978d784 375
douqan93 0:9ead5978d784 376 } while (max30001_status.bit.pllint == 1 && max30001_timeout++ <= 1000);
douqan93 0:9ead5978d784 377
douqan93 0:9ead5978d784 378 // MNGR_INT
douqan93 0:9ead5978d784 379
douqan93 0:9ead5978d784 380 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 381 return -1;
douqan93 0:9ead5978d784 382 }
douqan93 0:9ead5978d784 383
douqan93 0:9ead5978d784 384 max30001_mngr_int.bit.clr_pedge = Clr_pedge; // 0b0;
douqan93 0:9ead5978d784 385
douqan93 0:9ead5978d784 386 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 387 return -1;
douqan93 0:9ead5978d784 388 }
douqan93 0:9ead5978d784 389
douqan93 0:9ead5978d784 390 /* Put: CNFG_PACE */
douqan93 0:9ead5978d784 391
douqan93 0:9ead5978d784 392 max30001_reg_read(CNFG_PACE, &max30001_cnfg_pace.all);
douqan93 0:9ead5978d784 393
douqan93 0:9ead5978d784 394 max30001_cnfg_pace.bit.pol = Pol;
douqan93 0:9ead5978d784 395 max30001_cnfg_pace.bit.gn_diff_off = Gn_diff_off;
douqan93 0:9ead5978d784 396 max30001_cnfg_pace.bit.gain = Gain;
douqan93 0:9ead5978d784 397 max30001_cnfg_pace.bit.aout_lbw = Aout_lbw;
douqan93 0:9ead5978d784 398 max30001_cnfg_pace.bit.aout = Aout;
douqan93 0:9ead5978d784 399 max30001_cnfg_pace.bit.dacp = Dacp;
douqan93 0:9ead5978d784 400 max30001_cnfg_pace.bit.dacn = Dacn;
douqan93 0:9ead5978d784 401
douqan93 0:9ead5978d784 402 max30001_reg_write(CNFG_PACE, max30001_cnfg_pace.all);
douqan93 0:9ead5978d784 403
douqan93 0:9ead5978d784 404 return 0;
douqan93 0:9ead5978d784 405 }
douqan93 0:9ead5978d784 406 //******************************************************************************
douqan93 0:9ead5978d784 407 int MAX30001::max30001_Stop_PACE(void) {
douqan93 0:9ead5978d784 408
douqan93 0:9ead5978d784 409 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 410 return -1;
douqan93 0:9ead5978d784 411 }
douqan93 0:9ead5978d784 412
douqan93 0:9ead5978d784 413 max30001_cnfg_gen.bit.en_pace = 0; // Stop PACE
douqan93 0:9ead5978d784 414
douqan93 0:9ead5978d784 415 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 416 return -1;
douqan93 0:9ead5978d784 417 }
douqan93 0:9ead5978d784 418
douqan93 0:9ead5978d784 419 return 0;
douqan93 0:9ead5978d784 420 }
douqan93 0:9ead5978d784 421
douqan93 0:9ead5978d784 422 //******************************************************************************
douqan93 0:9ead5978d784 423 int MAX30001::max30001_BIOZ_InitStart(
douqan93 0:9ead5978d784 424 uint8_t En_bioz, uint8_t Openp, uint8_t Openn, uint8_t Calp_sel,
douqan93 0:9ead5978d784 425 uint8_t Caln_sel, uint8_t CG_mode, uint8_t B_fit, uint8_t Rate,
douqan93 0:9ead5978d784 426 uint8_t Ahpf, uint8_t Ext_rbias, uint8_t Gain, uint8_t Dhpf, uint8_t Dlpf,
douqan93 0:9ead5978d784 427 uint8_t Fcgen, uint8_t Cgmon, uint8_t Cgmag, uint8_t Phoff) {
douqan93 0:9ead5978d784 428
douqan93 0:9ead5978d784 429 // CNFG_BMUX
douqan93 0:9ead5978d784 430
douqan93 0:9ead5978d784 431 if (max30001_reg_read(CNFG_BMUX, &max30001_cnfg_bmux.all) == -1) {
douqan93 0:9ead5978d784 432 return -1;
douqan93 0:9ead5978d784 433 }
douqan93 0:9ead5978d784 434
douqan93 0:9ead5978d784 435 max30001_cnfg_bmux.bit.openp = Openp; // 0b1;
douqan93 0:9ead5978d784 436 max30001_cnfg_bmux.bit.openn = Openn; // 0b1;
douqan93 0:9ead5978d784 437 max30001_cnfg_bmux.bit.calp_sel = Calp_sel; // 0b10;
douqan93 0:9ead5978d784 438 max30001_cnfg_bmux.bit.caln_sel = Caln_sel; // 0b11;
douqan93 0:9ead5978d784 439 max30001_cnfg_bmux.bit.cg_mode = CG_mode; // 0b00;
douqan93 0:9ead5978d784 440
douqan93 0:9ead5978d784 441 if (max30001_reg_write(CNFG_BMUX, max30001_cnfg_bmux.all) == -1) {
douqan93 0:9ead5978d784 442 return -1;
douqan93 0:9ead5978d784 443 }
douqan93 0:9ead5978d784 444
douqan93 0:9ead5978d784 445 /**** SET MASTER FREQUENCY, ENABLE CHANNELS ****/
douqan93 0:9ead5978d784 446
douqan93 0:9ead5978d784 447 // CNFG_GEN
douqan93 0:9ead5978d784 448
douqan93 0:9ead5978d784 449 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 450 return -1;
douqan93 0:9ead5978d784 451 }
douqan93 0:9ead5978d784 452
douqan93 0:9ead5978d784 453 max30001_cnfg_gen.bit.en_bioz = En_bioz;
douqan93 0:9ead5978d784 454
douqan93 0:9ead5978d784 455 // fmstr is default
douqan93 0:9ead5978d784 456
douqan93 0:9ead5978d784 457 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 458 return -1;
douqan93 0:9ead5978d784 459 }
douqan93 0:9ead5978d784 460
douqan93 0:9ead5978d784 461 /**** Wait for PLL Lock & References to settle down ****/
douqan93 0:9ead5978d784 462
douqan93 0:9ead5978d784 463 max30001_timeout = 0;
douqan93 0:9ead5978d784 464
douqan93 0:9ead5978d784 465 do {
douqan93 0:9ead5978d784 466 if (max30001_reg_read(STATUS, &max30001_status.all) ==
douqan93 0:9ead5978d784 467 -1) // Wait and spin for PLL to lock...
douqan93 0:9ead5978d784 468 {
douqan93 0:9ead5978d784 469 return -1;
douqan93 0:9ead5978d784 470 }
douqan93 0:9ead5978d784 471
douqan93 0:9ead5978d784 472 } while (max30001_status.bit.pllint == 1 && max30001_timeout++ <= 1000);
douqan93 0:9ead5978d784 473
douqan93 0:9ead5978d784 474 /**** Start of CNFG_BIOZ ****/
douqan93 0:9ead5978d784 475
douqan93 0:9ead5978d784 476 // MNGR_INT
douqan93 0:9ead5978d784 477
douqan93 0:9ead5978d784 478 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 479 return -1;
douqan93 0:9ead5978d784 480 }
douqan93 0:9ead5978d784 481
douqan93 0:9ead5978d784 482 max30001_mngr_int.bit.b_fit = B_fit; //;
douqan93 0:9ead5978d784 483
douqan93 0:9ead5978d784 484 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 485 return -1;
douqan93 0:9ead5978d784 486 }
douqan93 0:9ead5978d784 487
douqan93 0:9ead5978d784 488 // CNFG_BIOZ
douqan93 0:9ead5978d784 489
douqan93 0:9ead5978d784 490 if (max30001_reg_read(CNFG_BIOZ, &max30001_cnfg_bioz.all) == -1) {
douqan93 0:9ead5978d784 491 return -1;
douqan93 0:9ead5978d784 492 }
douqan93 0:9ead5978d784 493
douqan93 0:9ead5978d784 494 max30001_cnfg_bioz.bit.rate = Rate;
douqan93 0:9ead5978d784 495 max30001_cnfg_bioz.bit.ahpf = Ahpf;
douqan93 0:9ead5978d784 496 max30001_cnfg_bioz.bit.ext_rbias = Ext_rbias;
douqan93 0:9ead5978d784 497 max30001_cnfg_bioz.bit.gain = Gain;
douqan93 0:9ead5978d784 498 max30001_cnfg_bioz.bit.dhpf = Dhpf;
douqan93 0:9ead5978d784 499 max30001_cnfg_bioz.bit.dlpf = Dlpf;
douqan93 0:9ead5978d784 500 max30001_cnfg_bioz.bit.fcgen = Fcgen;
douqan93 0:9ead5978d784 501 max30001_cnfg_bioz.bit.cgmon = Cgmon;
douqan93 0:9ead5978d784 502 max30001_cnfg_bioz.bit.cgmag = Cgmag;
douqan93 0:9ead5978d784 503 max30001_cnfg_bioz.bit.phoff = Phoff;
douqan93 0:9ead5978d784 504
douqan93 0:9ead5978d784 505 if (max30001_reg_write(CNFG_BIOZ, max30001_cnfg_bioz.all) == -1) {
douqan93 0:9ead5978d784 506 return -1;
douqan93 0:9ead5978d784 507 }
douqan93 0:9ead5978d784 508
douqan93 0:9ead5978d784 509 return 0;
douqan93 0:9ead5978d784 510 }
douqan93 0:9ead5978d784 511
douqan93 0:9ead5978d784 512 //******************************************************************************
douqan93 0:9ead5978d784 513 int MAX30001::max30001_Stop_BIOZ(void) {
douqan93 0:9ead5978d784 514
douqan93 0:9ead5978d784 515 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 516 return -1;
douqan93 0:9ead5978d784 517 }
douqan93 0:9ead5978d784 518
douqan93 0:9ead5978d784 519 max30001_cnfg_gen.bit.en_bioz = 0; // Stop BIOZ
douqan93 0:9ead5978d784 520
douqan93 0:9ead5978d784 521 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 522 return -1;
douqan93 0:9ead5978d784 523 }
douqan93 0:9ead5978d784 524
douqan93 0:9ead5978d784 525 return 0;
douqan93 0:9ead5978d784 526 }
douqan93 0:9ead5978d784 527
douqan93 0:9ead5978d784 528 //******************************************************************************
douqan93 0:9ead5978d784 529 int MAX30001::max30001_BIOZ_InitBist(uint8_t En_bist, uint8_t Rnom,
douqan93 0:9ead5978d784 530 uint8_t Rmod, uint8_t Fbist) {
douqan93 0:9ead5978d784 531
douqan93 0:9ead5978d784 532 // CNFG_BMUX
douqan93 0:9ead5978d784 533
douqan93 0:9ead5978d784 534 if (max30001_reg_read(CNFG_BMUX, &max30001_cnfg_bmux.all) == -1) {
douqan93 0:9ead5978d784 535 return -1;
douqan93 0:9ead5978d784 536 }
douqan93 0:9ead5978d784 537
douqan93 0:9ead5978d784 538 max30001_cnfg_bmux.bit.en_bist = En_bist;
douqan93 0:9ead5978d784 539 max30001_cnfg_bmux.bit.rnom = Rnom;
douqan93 0:9ead5978d784 540 max30001_cnfg_bmux.bit.rmod = Rmod;
douqan93 0:9ead5978d784 541 max30001_cnfg_bmux.bit.fbist = Fbist;
douqan93 0:9ead5978d784 542
douqan93 0:9ead5978d784 543 if (max30001_reg_write(CNFG_BMUX, max30001_cnfg_bmux.all) == -1) {
douqan93 0:9ead5978d784 544 return -1;
douqan93 0:9ead5978d784 545 }
douqan93 0:9ead5978d784 546
douqan93 0:9ead5978d784 547 return 0;
douqan93 0:9ead5978d784 548 }
douqan93 0:9ead5978d784 549 //******************************************************************************
douqan93 0:9ead5978d784 550 int MAX30001::max30001_RtoR_InitStart(uint8_t En_rtor, uint8_t Wndw,
douqan93 0:9ead5978d784 551 uint8_t Gain, uint8_t Pavg, uint8_t Ptsf,
douqan93 0:9ead5978d784 552 uint8_t Hoff, uint8_t Ravg, uint8_t Rhsf,
douqan93 0:9ead5978d784 553 uint8_t Clr_rrint) {
douqan93 0:9ead5978d784 554
douqan93 0:9ead5978d784 555 // MNGR_INT
douqan93 0:9ead5978d784 556
douqan93 0:9ead5978d784 557 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 558 return -1;
douqan93 0:9ead5978d784 559 }
douqan93 0:9ead5978d784 560
douqan93 0:9ead5978d784 561 max30001_mngr_int.bit.clr_rrint =
douqan93 0:9ead5978d784 562 Clr_rrint; // 0b01 & 0b00 are for interrupt mode...
douqan93 0:9ead5978d784 563 // 0b10 is for monitoring mode... it just overwrites the data...
douqan93 0:9ead5978d784 564
douqan93 0:9ead5978d784 565 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
douqan93 0:9ead5978d784 566 return -1;
douqan93 0:9ead5978d784 567 }
douqan93 0:9ead5978d784 568
douqan93 0:9ead5978d784 569 // RTOR1
douqan93 0:9ead5978d784 570 if (max30001_reg_read(CNFG_RTOR1, &max30001_cnfg_rtor1.all) == -1) {
douqan93 0:9ead5978d784 571 return -1;
douqan93 0:9ead5978d784 572 }
douqan93 0:9ead5978d784 573
douqan93 0:9ead5978d784 574 max30001_cnfg_rtor1.bit.wndw = Wndw;
douqan93 0:9ead5978d784 575 max30001_cnfg_rtor1.bit.gain = Gain;
douqan93 0:9ead5978d784 576 max30001_cnfg_rtor1.bit.en_rtor = En_rtor;
douqan93 0:9ead5978d784 577 max30001_cnfg_rtor1.bit.pavg = Pavg;
douqan93 0:9ead5978d784 578 max30001_cnfg_rtor1.bit.ptsf = Ptsf;
douqan93 0:9ead5978d784 579
douqan93 0:9ead5978d784 580 if (max30001_reg_write(CNFG_RTOR1, max30001_cnfg_rtor1.all) == -1) {
douqan93 0:9ead5978d784 581 return -1;
douqan93 0:9ead5978d784 582 }
douqan93 0:9ead5978d784 583 // RTOR2
douqan93 0:9ead5978d784 584
douqan93 0:9ead5978d784 585 if (max30001_reg_read(CNFG_RTOR2, &max30001_cnfg_rtor2.all) == -1) {
douqan93 0:9ead5978d784 586 return -1;
douqan93 0:9ead5978d784 587 }
douqan93 0:9ead5978d784 588 max30001_cnfg_rtor2.bit.hoff = Hoff;
douqan93 0:9ead5978d784 589 max30001_cnfg_rtor2.bit.ravg = Ravg;
douqan93 0:9ead5978d784 590 max30001_cnfg_rtor2.bit.rhsf = Rhsf;
douqan93 0:9ead5978d784 591
douqan93 0:9ead5978d784 592 if (max30001_reg_write(CNFG_RTOR2, max30001_cnfg_rtor2.all) == -1) {
douqan93 0:9ead5978d784 593 return -1;
douqan93 0:9ead5978d784 594 }
douqan93 0:9ead5978d784 595
douqan93 0:9ead5978d784 596 return 0;
douqan93 0:9ead5978d784 597 }
douqan93 0:9ead5978d784 598
douqan93 0:9ead5978d784 599 //******************************************************************************
douqan93 0:9ead5978d784 600 int MAX30001::max30001_Stop_RtoR(void) {
douqan93 0:9ead5978d784 601
douqan93 0:9ead5978d784 602 if (max30001_reg_read(CNFG_RTOR1, &max30001_cnfg_rtor1.all) == -1) {
douqan93 0:9ead5978d784 603 return -1;
douqan93 0:9ead5978d784 604 }
douqan93 0:9ead5978d784 605
douqan93 0:9ead5978d784 606 max30001_cnfg_rtor1.bit.en_rtor = 0; // Stop RtoR
douqan93 0:9ead5978d784 607
douqan93 0:9ead5978d784 608 if (max30001_reg_write(CNFG_RTOR1, max30001_cnfg_rtor1.all) == -1) {
douqan93 0:9ead5978d784 609 return -1;
douqan93 0:9ead5978d784 610 }
douqan93 0:9ead5978d784 611
douqan93 0:9ead5978d784 612 return 0;
douqan93 0:9ead5978d784 613 }
douqan93 0:9ead5978d784 614
douqan93 0:9ead5978d784 615 //******************************************************************************
douqan93 0:9ead5978d784 616 int MAX30001::max30001_PLL_lock(void) {
douqan93 0:9ead5978d784 617 // Spin to see PLLint become zero to indicate a lock.
douqan93 0:9ead5978d784 618
douqan93 0:9ead5978d784 619 max30001_timeout = 0;
douqan93 0:9ead5978d784 620
douqan93 0:9ead5978d784 621 do {
douqan93 0:9ead5978d784 622 if (max30001_reg_read(STATUS, &max30001_status.all) ==
douqan93 0:9ead5978d784 623 -1) // Wait and spin for PLL to lock...
douqan93 0:9ead5978d784 624 {
douqan93 0:9ead5978d784 625 return -1;
douqan93 0:9ead5978d784 626 }
douqan93 0:9ead5978d784 627
douqan93 0:9ead5978d784 628 } while (max30001_status.bit.pllint == 1 && max30001_timeout++ <= 1000);
douqan93 0:9ead5978d784 629
douqan93 0:9ead5978d784 630 return 0;
douqan93 0:9ead5978d784 631 }
douqan93 0:9ead5978d784 632
douqan93 0:9ead5978d784 633 //******************************************************************************
douqan93 0:9ead5978d784 634 int MAX30001::max30001_sw_rst(void) {
douqan93 0:9ead5978d784 635 // SW reset for the MAX30001 chip
douqan93 0:9ead5978d784 636
douqan93 0:9ead5978d784 637 if (max30001_reg_write(SW_RST, 0x000000) == -1) {
douqan93 0:9ead5978d784 638 return -1;
douqan93 0:9ead5978d784 639 }
douqan93 0:9ead5978d784 640
douqan93 0:9ead5978d784 641 return 0;
douqan93 0:9ead5978d784 642 }
douqan93 0:9ead5978d784 643
douqan93 0:9ead5978d784 644 //******************************************************************************
douqan93 0:9ead5978d784 645 int MAX30001::max30001_synch(void) { // For synchronization
douqan93 0:9ead5978d784 646 if (max30001_reg_write(SYNCH, 0x000000) == -1) {
douqan93 0:9ead5978d784 647 return -1;
douqan93 0:9ead5978d784 648 }
douqan93 0:9ead5978d784 649 return 0;
douqan93 0:9ead5978d784 650 }
douqan93 0:9ead5978d784 651
douqan93 0:9ead5978d784 652 //******************************************************************************
douqan93 0:9ead5978d784 653 int MAX30001::max300001_fifo_rst(void) { // Resets the FIFO
douqan93 0:9ead5978d784 654 if (max30001_reg_write(FIFO_RST, 0x000000) == -1) {
douqan93 0:9ead5978d784 655 return -1;
douqan93 0:9ead5978d784 656 }
douqan93 0:9ead5978d784 657 return 0;
douqan93 0:9ead5978d784 658 }
douqan93 0:9ead5978d784 659
douqan93 0:9ead5978d784 660 //******************************************************************************
douqan93 0:9ead5978d784 661 // int MAX30001::max30001_reg_write(uint8_t addr, uint32_t data)
douqan93 0:9ead5978d784 662 int MAX30001::max30001_reg_write(MAX30001_REG_map_t addr, uint32_t data) {
douqan93 0:9ead5978d784 663
douqan93 0:9ead5978d784 664 uint8_t result[4];
douqan93 0:9ead5978d784 665 uint8_t data_array[4];
douqan93 0:9ead5978d784 666 int32_t success = 0;
douqan93 0:9ead5978d784 667
douqan93 0:9ead5978d784 668 data_array[0] = (addr << 1) & 0xff;
douqan93 0:9ead5978d784 669
douqan93 0:9ead5978d784 670 data_array[3] = data & 0xff;
douqan93 0:9ead5978d784 671 data_array[2] = (data >> 8) & 0xff;
douqan93 0:9ead5978d784 672 data_array[1] = (data >> 16) & 0xff;
douqan93 0:9ead5978d784 673
douqan93 0:9ead5978d784 674 success = SPI_Transmit(&data_array[0], 4, &result[0], 4);
douqan93 0:9ead5978d784 675
douqan93 0:9ead5978d784 676 if (success != 0) {
douqan93 0:9ead5978d784 677 return -1;
douqan93 0:9ead5978d784 678 } else {
douqan93 0:9ead5978d784 679 return 0;
douqan93 0:9ead5978d784 680 }
douqan93 0:9ead5978d784 681 }
douqan93 0:9ead5978d784 682
douqan93 0:9ead5978d784 683 //******************************************************************************
douqan93 0:9ead5978d784 684 // int MAX30001::max30001_reg_read(uint8_t addr, uint32_t *return_data)
douqan93 0:9ead5978d784 685 int MAX30001::max30001_reg_read(MAX30001_REG_map_t addr,
douqan93 0:9ead5978d784 686 uint32_t *return_data) {
douqan93 0:9ead5978d784 687 uint8_t result[4];
douqan93 0:9ead5978d784 688 uint8_t data_array[1];
douqan93 0:9ead5978d784 689 int32_t success = 0;
douqan93 0:9ead5978d784 690
douqan93 0:9ead5978d784 691 data_array[0] = ((addr << 1) & 0xff) | 1; // For Read, Or with 1
douqan93 0:9ead5978d784 692 success = SPI_Transmit(&data_array[0], 1, &result[0], 4);
douqan93 0:9ead5978d784 693 *return_data = /*result[0] + */ (uint32_t)(result[1] << 16) +
douqan93 0:9ead5978d784 694 (result[2] << 8) + result[3];
douqan93 0:9ead5978d784 695 if (success != 0) {
douqan93 0:9ead5978d784 696 return -1;
douqan93 0:9ead5978d784 697 } else {
douqan93 0:9ead5978d784 698 return 0;
douqan93 0:9ead5978d784 699 }
douqan93 0:9ead5978d784 700 }
douqan93 0:9ead5978d784 701
douqan93 0:9ead5978d784 702 //******************************************************************************
douqan93 0:9ead5978d784 703 int MAX30001::max30001_Enable_DcLeadOFF_Init(int8_t En_dcloff, int8_t Ipol,
douqan93 0:9ead5978d784 704 int8_t Imag, int8_t Vth) {
douqan93 0:9ead5978d784 705 // the leads are not touching the body
douqan93 0:9ead5978d784 706
douqan93 0:9ead5978d784 707 // CNFG_EMUX, Set ECGP and ECGN for external hook up...
douqan93 0:9ead5978d784 708
douqan93 0:9ead5978d784 709 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 710 return -1;
douqan93 0:9ead5978d784 711 }
douqan93 0:9ead5978d784 712
douqan93 0:9ead5978d784 713 max30001_cnfg_gen.bit.en_dcloff = En_dcloff;
douqan93 0:9ead5978d784 714 max30001_cnfg_gen.bit.ipol = Ipol;
douqan93 0:9ead5978d784 715 max30001_cnfg_gen.bit.imag = Imag;
douqan93 0:9ead5978d784 716 max30001_cnfg_gen.bit.vth = Vth;
douqan93 0:9ead5978d784 717
douqan93 0:9ead5978d784 718 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 719 return -1;
douqan93 0:9ead5978d784 720 }
douqan93 0:9ead5978d784 721
douqan93 0:9ead5978d784 722 return 0;
douqan93 0:9ead5978d784 723 }
douqan93 0:9ead5978d784 724
douqan93 0:9ead5978d784 725 //******************************************************************************
douqan93 0:9ead5978d784 726 int MAX30001::max30001_Disable_DcLeadOFF(void) {
douqan93 0:9ead5978d784 727 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 728 return -1;
douqan93 0:9ead5978d784 729 }
douqan93 0:9ead5978d784 730
douqan93 0:9ead5978d784 731 max30001_cnfg_gen.bit.en_dcloff = 0; // Turned off the dc lead off.
douqan93 0:9ead5978d784 732
douqan93 0:9ead5978d784 733 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 734 return -1;
douqan93 0:9ead5978d784 735 }
douqan93 0:9ead5978d784 736
douqan93 0:9ead5978d784 737 return 0;
douqan93 0:9ead5978d784 738 }
douqan93 0:9ead5978d784 739
douqan93 0:9ead5978d784 740 //******************************************************************************
douqan93 0:9ead5978d784 741 int MAX30001::max30001_BIOZ_Enable_ACLeadOFF_Init(uint8_t En_bloff,
douqan93 0:9ead5978d784 742 uint8_t Bloff_hi_it,
douqan93 0:9ead5978d784 743 uint8_t Bloff_lo_it) {
douqan93 0:9ead5978d784 744
douqan93 0:9ead5978d784 745 // CNFG_GEN
douqan93 0:9ead5978d784 746 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 747 return -1;
douqan93 0:9ead5978d784 748 }
douqan93 0:9ead5978d784 749
douqan93 0:9ead5978d784 750 max30001_cnfg_gen.bit.en_bloff = En_bloff;
douqan93 0:9ead5978d784 751
douqan93 0:9ead5978d784 752 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 753 return -1;
douqan93 0:9ead5978d784 754 }
douqan93 0:9ead5978d784 755
douqan93 0:9ead5978d784 756 // MNGR_DYN
douqan93 0:9ead5978d784 757 if (max30001_reg_read(MNGR_DYN, &max30001_mngr_dyn.all) == -1) {
douqan93 0:9ead5978d784 758 return -1;
douqan93 0:9ead5978d784 759 }
douqan93 0:9ead5978d784 760
douqan93 0:9ead5978d784 761 max30001_mngr_dyn.bit.bloff_hi_it = Bloff_hi_it;
douqan93 0:9ead5978d784 762 max30001_mngr_dyn.bit.bloff_lo_it = Bloff_lo_it;
douqan93 0:9ead5978d784 763
douqan93 0:9ead5978d784 764 if (max30001_reg_write(MNGR_DYN, max30001_mngr_dyn.all) == -1) {
douqan93 0:9ead5978d784 765 return -1;
douqan93 0:9ead5978d784 766 }
douqan93 0:9ead5978d784 767
douqan93 0:9ead5978d784 768 return 0;
douqan93 0:9ead5978d784 769 }
douqan93 0:9ead5978d784 770
douqan93 0:9ead5978d784 771 //******************************************************************************
douqan93 0:9ead5978d784 772 int MAX30001::max30001_BIOZ_Disable_ACleadOFF(void) {
douqan93 0:9ead5978d784 773 // CNFG_GEN
douqan93 0:9ead5978d784 774 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 775 return -1;
douqan93 0:9ead5978d784 776 }
douqan93 0:9ead5978d784 777
douqan93 0:9ead5978d784 778 max30001_cnfg_gen.bit.en_bloff = 0b0; // Turns of the BIOZ AC Lead OFF feature
douqan93 0:9ead5978d784 779
douqan93 0:9ead5978d784 780 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 781 return -1;
douqan93 0:9ead5978d784 782 }
douqan93 0:9ead5978d784 783
douqan93 0:9ead5978d784 784 return 0;
douqan93 0:9ead5978d784 785 }
douqan93 0:9ead5978d784 786
douqan93 0:9ead5978d784 787 //******************************************************************************
douqan93 0:9ead5978d784 788 int MAX30001::max30001_BIOZ_Enable_BCGMON(void) {
douqan93 0:9ead5978d784 789 // CNFG_BIOZ
douqan93 0:9ead5978d784 790 if (max30001_reg_read(CNFG_BIOZ, &max30001_cnfg_bioz.all) == -1) {
douqan93 0:9ead5978d784 791 return -1;
douqan93 0:9ead5978d784 792 }
douqan93 0:9ead5978d784 793
douqan93 0:9ead5978d784 794 max30001_cnfg_bioz.bit.cgmon = 1;
douqan93 0:9ead5978d784 795
douqan93 0:9ead5978d784 796 if (max30001_reg_write(CNFG_BIOZ, max30001_cnfg_bioz.all) == -1) {
douqan93 0:9ead5978d784 797 return -1;
douqan93 0:9ead5978d784 798 }
douqan93 0:9ead5978d784 799
douqan93 0:9ead5978d784 800 max30001_reg_read(CNFG_BIOZ, &max30001_cnfg_bioz.all);
douqan93 0:9ead5978d784 801
douqan93 0:9ead5978d784 802 return 0;
douqan93 0:9ead5978d784 803 }
douqan93 0:9ead5978d784 804
douqan93 0:9ead5978d784 805 #if 1
douqan93 0:9ead5978d784 806 //******************************************************************************
douqan93 0:9ead5978d784 807 int MAX30001::max30001_Enable_LeadON(int8_t Channel) // Channel: ECG = 0b01, BIOZ = 0b10, Disable = 0b00
douqan93 0:9ead5978d784 808 {
douqan93 0:9ead5978d784 809
douqan93 0:9ead5978d784 810 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 811 return -1;
douqan93 0:9ead5978d784 812 }
douqan93 0:9ead5978d784 813
douqan93 0:9ead5978d784 814 max30001_cnfg_gen.bit.en_ecg = 0b0;
douqan93 0:9ead5978d784 815 max30001_cnfg_gen.bit.en_bioz = 0b0;
douqan93 0:9ead5978d784 816 max30001_cnfg_gen.bit.en_pace = 0b0;
douqan93 0:9ead5978d784 817
douqan93 0:9ead5978d784 818 max30001_cnfg_gen.bit.en_ulp_lon = Channel; // BIOZ ULP lead on detection...
douqan93 0:9ead5978d784 819
douqan93 0:9ead5978d784 820 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 821 return -1;
douqan93 0:9ead5978d784 822 }
douqan93 0:9ead5978d784 823
douqan93 0:9ead5978d784 824 max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all);
douqan93 0:9ead5978d784 825
douqan93 0:9ead5978d784 826 max30001_reg_read(STATUS, &max30001_status.all);
douqan93 0:9ead5978d784 827
douqan93 0:9ead5978d784 828 return 0;
douqan93 0:9ead5978d784 829 }
douqan93 0:9ead5978d784 830 //******************************************************************************
douqan93 0:9ead5978d784 831 int MAX30001::max30001_Disable_LeadON(void) {
douqan93 0:9ead5978d784 832
douqan93 0:9ead5978d784 833 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 834 return -1;
douqan93 0:9ead5978d784 835 }
douqan93 0:9ead5978d784 836
douqan93 0:9ead5978d784 837 max30001_cnfg_gen.bit.en_ulp_lon = 0b0;
douqan93 0:9ead5978d784 838
douqan93 0:9ead5978d784 839 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
douqan93 0:9ead5978d784 840 return -1;
douqan93 0:9ead5978d784 841 }
douqan93 0:9ead5978d784 842
douqan93 0:9ead5978d784 843 return 0;
douqan93 0:9ead5978d784 844 }
douqan93 0:9ead5978d784 845 #endif
douqan93 0:9ead5978d784 846 //******************************************************************************
douqan93 0:9ead5978d784 847 #define LEADOFF_SERVICE_TIME 0x2000 // 0x1000 = 1 second
douqan93 0:9ead5978d784 848 #define LEADOFF_NUMSTATES 2
douqan93 0:9ead5978d784 849 uint32_t leadoffState = 0;
douqan93 0:9ead5978d784 850 uint32_t max30001_LeadOffoldTime = 0;
douqan93 0:9ead5978d784 851 void MAX30001::max30001_ServiceLeadoff(uint32_t currentTime) {
douqan93 0:9ead5978d784 852
douqan93 0:9ead5978d784 853 uint32_t delta_Time;
douqan93 0:9ead5978d784 854
douqan93 0:9ead5978d784 855 delta_Time = currentTime - max30001_LeadOffoldTime;
douqan93 0:9ead5978d784 856
douqan93 0:9ead5978d784 857 if (delta_Time > LEADOFF_SERVICE_TIME) {
douqan93 0:9ead5978d784 858 switch (leadoffState) {
douqan93 0:9ead5978d784 859 case 0: /* switch to ECG DC Lead OFF */
douqan93 0:9ead5978d784 860 max30001_Enable_DcLeadOFF_Init(0b01, 0b0, 0b001, 0b00);
douqan93 0:9ead5978d784 861 break;
douqan93 0:9ead5978d784 862
douqan93 0:9ead5978d784 863 case 1: /* switch to BIOZ DC Lead OFF */
douqan93 0:9ead5978d784 864 max30001_Enable_DcLeadOFF_Init(0b10, 0b0, 0b001, 0b00);
douqan93 0:9ead5978d784 865 break;
douqan93 0:9ead5978d784 866 }
douqan93 0:9ead5978d784 867
douqan93 0:9ead5978d784 868 leadoffState++;
douqan93 0:9ead5978d784 869 leadoffState %= LEADOFF_NUMSTATES;
douqan93 0:9ead5978d784 870
douqan93 0:9ead5978d784 871 max30001_LeadOffoldTime = currentTime;
douqan93 0:9ead5978d784 872 }
douqan93 0:9ead5978d784 873 }
douqan93 0:9ead5978d784 874 //******************************************************************************
douqan93 0:9ead5978d784 875 #define LEADON_SERVICE_TIME 0x2000 // 0x1000 = 1 second
douqan93 0:9ead5978d784 876 #define LEADON_NUMSTATES 2
douqan93 0:9ead5978d784 877 uint32_t leadOnState = 0;
douqan93 0:9ead5978d784 878 uint32_t max30001_LeadOnoldTime = 0;
douqan93 0:9ead5978d784 879 void MAX30001::max30001_ServiceLeadON(uint32_t currentTime) {
douqan93 0:9ead5978d784 880
douqan93 0:9ead5978d784 881 uint32_t delta_Time;
douqan93 0:9ead5978d784 882
douqan93 0:9ead5978d784 883 delta_Time = currentTime - max30001_LeadOnoldTime;
douqan93 0:9ead5978d784 884
douqan93 0:9ead5978d784 885 if (delta_Time > LEADON_SERVICE_TIME) {
douqan93 0:9ead5978d784 886 switch (leadOnState) {
douqan93 0:9ead5978d784 887 case 0: /* switch to ECG DC Lead ON */
douqan93 0:9ead5978d784 888 max30001_Enable_LeadON(0b01);
douqan93 0:9ead5978d784 889 break;
douqan93 0:9ead5978d784 890
douqan93 0:9ead5978d784 891 case 1: /* switch to BIOZ DC Lead ON */
douqan93 0:9ead5978d784 892 max30001_Enable_LeadON(0b10);
douqan93 0:9ead5978d784 893 break;
douqan93 0:9ead5978d784 894 }
douqan93 0:9ead5978d784 895
douqan93 0:9ead5978d784 896 leadOnState++;
douqan93 0:9ead5978d784 897 leadOnState %= LEADON_NUMSTATES;
douqan93 0:9ead5978d784 898
douqan93 0:9ead5978d784 899 max30001_LeadOnoldTime = currentTime;
douqan93 0:9ead5978d784 900 }
douqan93 0:9ead5978d784 901 }
douqan93 0:9ead5978d784 902
douqan93 0:9ead5978d784 903 //******************************************************************************
douqan93 0:9ead5978d784 904 int MAX30001::max30001_FIFO_LeadONOff_Read(void) {
douqan93 0:9ead5978d784 905
douqan93 0:9ead5978d784 906 uint8_t result[32 * 3]; // 32words - 3bytes each
douqan93 0:9ead5978d784 907
douqan93 0:9ead5978d784 908 uint8_t data_array[4];
douqan93 0:9ead5978d784 909 int32_t success = 0;
douqan93 0:9ead5978d784 910 int i, j;
douqan93 0:9ead5978d784 911
douqan93 0:9ead5978d784 912 uint32_t total_databytes;
douqan93 0:9ead5978d784 913 uint8_t i_index;
douqan93 0:9ead5978d784 914 uint8_t data_chunk;
douqan93 0:9ead5978d784 915 uint8_t loop_logic;
douqan93 0:9ead5978d784 916
douqan93 0:9ead5978d784 917 uint8_t etag, ptag, btag;
douqan93 0:9ead5978d784 918
douqan93 0:9ead5978d784 919 uint8_t adr;
douqan93 0:9ead5978d784 920
douqan93 0:9ead5978d784 921 int8_t ReadAllPaceOnce;
douqan93 0:9ead5978d784 922
douqan93 0:9ead5978d784 923 static uint8_t dcloffint_OneShot = 0;
douqan93 0:9ead5978d784 924 static uint8_t acloffint_OneShot = 0;
douqan93 0:9ead5978d784 925 static uint8_t bcgmon_OneShot = 0;
douqan93 0:9ead5978d784 926 static uint8_t acleadon_OneShot = 0;
douqan93 0:9ead5978d784 927
douqan93 0:9ead5978d784 928 int8_t ret_val;
douqan93 0:9ead5978d784 929
douqan93 0:9ead5978d784 930 if (max30001_status.bit.eint == 1 || max30001_status.bit.pint == 1) {
douqan93 0:9ead5978d784 931 adr = ECG_FIFO_BURST;
douqan93 0:9ead5978d784 932 data_array[0] = ((adr << 1) & 0xff) | 1;
douqan93 0:9ead5978d784 933
douqan93 0:9ead5978d784 934 // The SPI routine only sends out data of 32 bytes in size. Therefore the
douqan93 0:9ead5978d784 935 // data is being read in
douqan93 0:9ead5978d784 936 // smaller chunks in this routine...
douqan93 0:9ead5978d784 937
douqan93 0:9ead5978d784 938 total_databytes = (max30001_mngr_int.bit.e_fit + 1) * 3;
douqan93 0:9ead5978d784 939
douqan93 0:9ead5978d784 940 i_index = 0;
douqan93 0:9ead5978d784 941 loop_logic = 1;
douqan93 0:9ead5978d784 942
douqan93 0:9ead5978d784 943 while (loop_logic) {
douqan93 0:9ead5978d784 944 if (total_databytes > 30) {
douqan93 0:9ead5978d784 945 data_chunk = 30;
douqan93 0:9ead5978d784 946 total_databytes = total_databytes - 30;
douqan93 0:9ead5978d784 947 } else {
douqan93 0:9ead5978d784 948 data_chunk = total_databytes;
douqan93 0:9ead5978d784 949 loop_logic = 0;
douqan93 0:9ead5978d784 950 }
douqan93 0:9ead5978d784 951
douqan93 0:9ead5978d784 952 /* The extra 1 byte is for the extra byte that comes out of the SPI */
douqan93 0:9ead5978d784 953 success = SPI_Transmit(&data_array[0], 1, &result[i_index], (data_chunk + 1)); // Make a copy of the FIFO over here...
douqan93 0:9ead5978d784 954
douqan93 0:9ead5978d784 955 if (success != 0) {
douqan93 0:9ead5978d784 956 return -1;
douqan93 0:9ead5978d784 957 }
douqan93 0:9ead5978d784 958
douqan93 0:9ead5978d784 959 /* This is important, because every transaction above creates an empty
douqan93 0:9ead5978d784 960 * redundant data at result[0] */
douqan93 0:9ead5978d784 961 for (j = i_index; j < (data_chunk + i_index); j++) /* get rid of the 1 extra byte by moving the whole array up one */
douqan93 0:9ead5978d784 962 {
douqan93 0:9ead5978d784 963 result[j] = result[j + 1];
douqan93 0:9ead5978d784 964 }
douqan93 0:9ead5978d784 965
douqan93 0:9ead5978d784 966 i_index = i_index + 30; /* point to the next array location to put the data in */
douqan93 0:9ead5978d784 967 }
douqan93 0:9ead5978d784 968
douqan93 0:9ead5978d784 969 ReadAllPaceOnce = 0;
douqan93 0:9ead5978d784 970
douqan93 0:9ead5978d784 971 /* Put the content of the FIFO based on the EFIT value, We ignore the
douqan93 0:9ead5978d784 972 * result[0] and start concatenating indexes: 1,2,3 - 4,5,6 - 7,8,9 - */
douqan93 0:9ead5978d784 973 for (i = 0, j = 0; i < max30001_mngr_int.bit.e_fit + 1; i++, j = j + 3) // index1=23-16 bit, index2=15-8 bit, index3=7-0 bit
douqan93 0:9ead5978d784 974 {
douqan93 0:9ead5978d784 975 max30001_ECG_FIFO_buffer[i] = ((uint32_t)result[j] << 16) + (result[j + 1] << 8) + result[j + 2];
douqan93 0:9ead5978d784 976
douqan93 0:9ead5978d784 977 etag = (0b00111000 & result[j + 2]) >> 3;
douqan93 0:9ead5978d784 978 ptag = 0b00000111 & result[j + 2];
douqan93 0:9ead5978d784 979
douqan93 0:9ead5978d784 980 if (ptag != 0b111 && ReadAllPaceOnce == 0) {
douqan93 0:9ead5978d784 981
douqan93 0:9ead5978d784 982 ReadAllPaceOnce = 1; // This will prevent extra read of PACE, once group
douqan93 0:9ead5978d784 983 // 0-5 is read ONCE.
douqan93 0:9ead5978d784 984
douqan93 0:9ead5978d784 985 adr = PACE0_FIFO_BURST;
douqan93 0:9ead5978d784 986
douqan93 0:9ead5978d784 987 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
douqan93 0:9ead5978d784 988
douqan93 0:9ead5978d784 989 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
douqan93 0:9ead5978d784 990
douqan93 0:9ead5978d784 991 max30001_PACE[0] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
douqan93 0:9ead5978d784 992 max30001_PACE[1] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
douqan93 0:9ead5978d784 993 max30001_PACE[2] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
douqan93 0:9ead5978d784 994
douqan93 0:9ead5978d784 995 adr = PACE1_FIFO_BURST;
douqan93 0:9ead5978d784 996
douqan93 0:9ead5978d784 997 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
douqan93 0:9ead5978d784 998
douqan93 0:9ead5978d784 999 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
douqan93 0:9ead5978d784 1000
douqan93 0:9ead5978d784 1001 max30001_PACE[3] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
douqan93 0:9ead5978d784 1002 max30001_PACE[4] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
douqan93 0:9ead5978d784 1003 max30001_PACE[5] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
douqan93 0:9ead5978d784 1004
douqan93 0:9ead5978d784 1005 adr = PACE2_FIFO_BURST;
douqan93 0:9ead5978d784 1006
douqan93 0:9ead5978d784 1007 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
douqan93 0:9ead5978d784 1008
douqan93 0:9ead5978d784 1009 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
douqan93 0:9ead5978d784 1010
douqan93 0:9ead5978d784 1011 max30001_PACE[6] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
douqan93 0:9ead5978d784 1012 max30001_PACE[7] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
douqan93 0:9ead5978d784 1013 max30001_PACE[8] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
douqan93 0:9ead5978d784 1014
douqan93 0:9ead5978d784 1015 adr = PACE3_FIFO_BURST;
douqan93 0:9ead5978d784 1016
douqan93 0:9ead5978d784 1017 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
douqan93 0:9ead5978d784 1018
douqan93 0:9ead5978d784 1019 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
douqan93 0:9ead5978d784 1020
douqan93 0:9ead5978d784 1021 max30001_PACE[9] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
douqan93 0:9ead5978d784 1022 max30001_PACE[10] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
douqan93 0:9ead5978d784 1023 max30001_PACE[11] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
douqan93 0:9ead5978d784 1024
douqan93 0:9ead5978d784 1025 adr = PACE4_FIFO_BURST;
douqan93 0:9ead5978d784 1026
douqan93 0:9ead5978d784 1027 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
douqan93 0:9ead5978d784 1028
douqan93 0:9ead5978d784 1029 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
douqan93 0:9ead5978d784 1030
douqan93 0:9ead5978d784 1031 max30001_PACE[12] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
douqan93 0:9ead5978d784 1032 max30001_PACE[13] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
douqan93 0:9ead5978d784 1033 max30001_PACE[14] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
douqan93 0:9ead5978d784 1034
douqan93 0:9ead5978d784 1035 adr = PACE5_FIFO_BURST;
douqan93 0:9ead5978d784 1036
douqan93 0:9ead5978d784 1037 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
douqan93 0:9ead5978d784 1038
douqan93 0:9ead5978d784 1039 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
douqan93 0:9ead5978d784 1040
douqan93 0:9ead5978d784 1041 max30001_PACE[15] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
douqan93 0:9ead5978d784 1042 max30001_PACE[16] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
douqan93 0:9ead5978d784 1043 max30001_PACE[17] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
douqan93 0:9ead5978d784 1044
douqan93 0:9ead5978d784 1045 dataAvailable(MAX30001_DATA_PACE, max30001_PACE, 18); // Send out the Pace data once only
douqan93 0:9ead5978d784 1046 }
douqan93 0:9ead5978d784 1047 }
douqan93 0:9ead5978d784 1048
douqan93 0:9ead5978d784 1049 if (etag != 0b110) {
douqan93 0:9ead5978d784 1050
douqan93 0:9ead5978d784 1051 dataAvailable(MAX30001_DATA_ECG, max30001_ECG_FIFO_buffer, (max30001_mngr_int.bit.e_fit + 1));
douqan93 0:9ead5978d784 1052 }
douqan93 0:9ead5978d784 1053
douqan93 0:9ead5978d784 1054 } /* End of ECG init */
douqan93 0:9ead5978d784 1055
douqan93 0:9ead5978d784 1056 /* RtoR */
douqan93 0:9ead5978d784 1057
douqan93 0:9ead5978d784 1058 if (max30001_status.bit.rrint == 1) {
douqan93 0:9ead5978d784 1059 if (max30001_reg_read(RTOR, &max30001_RtoR_data) == -1) {
douqan93 0:9ead5978d784 1060 return -1;
douqan93 0:9ead5978d784 1061 }
douqan93 0:9ead5978d784 1062
douqan93 0:9ead5978d784 1063 max30001_RtoR_data = (0x00FFFFFF & max30001_RtoR_data) >> 10;
douqan93 0:9ead5978d784 1064
douqan93 0:9ead5978d784 1065 hspValMax30001.R2R = (uint16_t)max30001_RtoR_data;
douqan93 0:9ead5978d784 1066 hspValMax30001.fmstr = (uint16_t)max30001_cnfg_gen.bit.fmstr;
douqan93 0:9ead5978d784 1067
douqan93 0:9ead5978d784 1068 dataAvailable(MAX30001_DATA_RTOR, &max30001_RtoR_data, 1);
douqan93 0:9ead5978d784 1069 }
douqan93 0:9ead5978d784 1070
douqan93 0:9ead5978d784 1071 // Handling BIOZ data...
douqan93 0:9ead5978d784 1072
douqan93 0:9ead5978d784 1073 if (max30001_status.bit.bint == 1) {
douqan93 0:9ead5978d784 1074 adr = 0x22;
douqan93 0:9ead5978d784 1075 data_array[0] = ((adr << 1) & 0xff) | 1;
douqan93 0:9ead5978d784 1076
douqan93 0:9ead5978d784 1077 /* [(BFIT+1)*3byte]+1extra byte due to the addr */
douqan93 0:9ead5978d784 1078
douqan93 0:9ead5978d784 1079 if (SPI_Transmit(&data_array[0], 1, &result[0],((max30001_mngr_int.bit.b_fit + 1) * 3) + 1) == -1) // Make a copy of the FIFO over here...
douqan93 0:9ead5978d784 1080
douqan93 0:9ead5978d784 1081 {
douqan93 0:9ead5978d784 1082 return -1;
douqan93 0:9ead5978d784 1083 }
douqan93 0:9ead5978d784 1084
douqan93 0:9ead5978d784 1085 btag = 0b00000111 & result[3];
douqan93 0:9ead5978d784 1086
douqan93 0:9ead5978d784 1087 /* Put the content of the FIFO based on the BFIT value, We ignore the
douqan93 0:9ead5978d784 1088 * result[0] and start concatenating indexes: 1,2,3 - 4,5,6 - 7,8,9 - */
douqan93 0:9ead5978d784 1089 for (i = 0, j = 0; i < max30001_mngr_int.bit.b_fit + 1; i++, j = j + 3) // index1=23-16 bit, index2=15-8 bit, index3=7-0 bit
douqan93 0:9ead5978d784 1090 {
douqan93 0:9ead5978d784 1091 max30001_BIOZ_FIFO_buffer[i] = ((uint32_t)result[j + 1] << 16) + (result[j + 2] << 8) + result[j + 3];
douqan93 0:9ead5978d784 1092 }
douqan93 0:9ead5978d784 1093
douqan93 0:9ead5978d784 1094 if (btag != 0b110) {
douqan93 0:9ead5978d784 1095 dataAvailable(MAX30001_DATA_BIOZ, max30001_BIOZ_FIFO_buffer, 8);
douqan93 0:9ead5978d784 1096 }
douqan93 0:9ead5978d784 1097 }
douqan93 0:9ead5978d784 1098
douqan93 0:9ead5978d784 1099 ret_val = 0;
douqan93 0:9ead5978d784 1100
douqan93 0:9ead5978d784 1101 if (max30001_status.bit.dcloffint == 1) // ECG/BIOZ Lead Off
douqan93 0:9ead5978d784 1102 {
douqan93 0:9ead5978d784 1103 dcloffint_OneShot = 1;
douqan93 0:9ead5978d784 1104 max30001_DCLeadOff = 0;
douqan93 0:9ead5978d784 1105 max30001_DCLeadOff = max30001_DCLeadOff | (max30001_cnfg_gen.bit.en_dcloff << 8) | (max30001_status.all & 0x00000F);
douqan93 0:9ead5978d784 1106 dataAvailable(MAX30001_DATA_LEADOFF_DC, &max30001_DCLeadOff, 1);
douqan93 0:9ead5978d784 1107 // Do a FIFO Reset
douqan93 0:9ead5978d784 1108 max30001_reg_write(FIFO_RST, 0x000000);
douqan93 0:9ead5978d784 1109
douqan93 0:9ead5978d784 1110 ret_val = 0b100;
douqan93 0:9ead5978d784 1111
douqan93 0:9ead5978d784 1112 } else if (dcloffint_OneShot == 1 && max30001_status.bit.dcloffint == 0) // Just send once when it comes out of dc lead off
douqan93 0:9ead5978d784 1113 {
douqan93 0:9ead5978d784 1114 max30001_DCLeadOff = 0;
douqan93 0:9ead5978d784 1115 max30001_DCLeadOff = max30001_DCLeadOff | (max30001_cnfg_gen.bit.en_dcloff << 8) | (max30001_status.all & 0x00000F);
douqan93 0:9ead5978d784 1116 dataAvailable(MAX30001_DATA_LEADOFF_DC, &max30001_DCLeadOff, 1);
douqan93 0:9ead5978d784 1117 dcloffint_OneShot = 0;
douqan93 0:9ead5978d784 1118 }
douqan93 0:9ead5978d784 1119
douqan93 0:9ead5978d784 1120 if (max30001_status.bit.bover == 1 || max30001_status.bit.bundr == 1) // BIOZ AC Lead Off
douqan93 0:9ead5978d784 1121 {
douqan93 0:9ead5978d784 1122 acloffint_OneShot = 1;
douqan93 0:9ead5978d784 1123 max30001_ACLeadOff = 0;
douqan93 0:9ead5978d784 1124 max30001_ACLeadOff =
douqan93 0:9ead5978d784 1125 max30001_ACLeadOff | ((max30001_status.all & 0x030000) >> 16);
douqan93 0:9ead5978d784 1126 dataAvailable(MAX30001_DATA_LEADOFF_AC, &max30001_ACLeadOff, 1);
douqan93 0:9ead5978d784 1127 // Do a FIFO Reset
douqan93 0:9ead5978d784 1128 max30001_reg_write(FIFO_RST, 0x000000);
douqan93 0:9ead5978d784 1129
douqan93 0:9ead5978d784 1130 ret_val = 0b1000;
douqan93 0:9ead5978d784 1131 } else if (acloffint_OneShot == 1 && max30001_status.bit.bover == 0 && max30001_status.bit.bundr == 0) // Just send once when it comes out of ac lead off
douqan93 0:9ead5978d784 1132 {
douqan93 0:9ead5978d784 1133 max30001_ACLeadOff = 0;
douqan93 0:9ead5978d784 1134 max30001_ACLeadOff = max30001_ACLeadOff | ((max30001_status.all & 0x030000) >> 16);
douqan93 0:9ead5978d784 1135 dataAvailable(MAX30001_DATA_LEADOFF_AC, &max30001_ACLeadOff, 1);
douqan93 0:9ead5978d784 1136 acloffint_OneShot = 0;
douqan93 0:9ead5978d784 1137 }
douqan93 0:9ead5978d784 1138
douqan93 0:9ead5978d784 1139 if (max30001_status.bit.bcgmon == 1) // BIOZ BCGMON check
douqan93 0:9ead5978d784 1140 {
douqan93 0:9ead5978d784 1141 bcgmon_OneShot = 1;
douqan93 0:9ead5978d784 1142 max30001_bcgmon = 0;
douqan93 0:9ead5978d784 1143 max30001_bcgmon = max30001_bcgmon | ((max30001_status.all & 0x000030) >> 4);
douqan93 0:9ead5978d784 1144 dataAvailable(MAX30001_DATA_BCGMON, &max30001_bcgmon, 1);
douqan93 0:9ead5978d784 1145 // Do a FIFO Reset
douqan93 0:9ead5978d784 1146 max30001_reg_write(FIFO_RST, 0x000000);
douqan93 0:9ead5978d784 1147
douqan93 0:9ead5978d784 1148 ret_val = 0b10000;
douqan93 0:9ead5978d784 1149 } else if (bcgmon_OneShot == 1 && max30001_status.bit.bcgmon == 0) {
douqan93 0:9ead5978d784 1150 max30001_bcgmon = 0;
douqan93 0:9ead5978d784 1151 max30001_bcgmon = max30001_bcgmon | ((max30001_status.all & 0x000030) >> 4);
douqan93 0:9ead5978d784 1152 bcgmon_OneShot = 0;
douqan93 0:9ead5978d784 1153 dataAvailable(MAX30001_DATA_BCGMON, &max30001_bcgmon, 1);
douqan93 0:9ead5978d784 1154 }
douqan93 0:9ead5978d784 1155
douqan93 0:9ead5978d784 1156 #if 0
douqan93 0:9ead5978d784 1157 if(max30001_status.bit.lonint == 1) // AC LeadON Check
douqan93 0:9ead5978d784 1158 {
douqan93 0:9ead5978d784 1159 max30001_LeadOn = 0;
douqan93 0:9ead5978d784 1160 max30001_reg_read(STATUS,&max30001_status.all); // Reading is important
douqan93 0:9ead5978d784 1161 max30001_LeadOn = max30001_LeadOn | (max30001_cnfg_gen.bit.en_ulp_lon << 8) | ((max30001_status.all & 0x000800) >> 11); // 0b01 will mean ECG Lead On, 0b10 will mean BIOZ Lead On
douqan93 0:9ead5978d784 1162 // LEAD ON has been detected... Now take actions
douqan93 0:9ead5978d784 1163 }
douqan93 0:9ead5978d784 1164 #endif
douqan93 0:9ead5978d784 1165
douqan93 0:9ead5978d784 1166 if (max30001_status.bit.lonint == 1 &&
douqan93 0:9ead5978d784 1167 acleadon_OneShot == 0) // AC LeadON Check, when lead is on
douqan93 0:9ead5978d784 1168 {
douqan93 0:9ead5978d784 1169 max30001_LeadOn = 0;
douqan93 0:9ead5978d784 1170 max30001_reg_read(STATUS, &max30001_status.all); // Reading is important
douqan93 0:9ead5978d784 1171 max30001_LeadOn =
douqan93 0:9ead5978d784 1172 max30001_LeadOn | (max30001_cnfg_gen.bit.en_ulp_lon << 8) |
douqan93 0:9ead5978d784 1173 ((max30001_status.all & 0x000800) >>
douqan93 0:9ead5978d784 1174 11); // 0b01 will mean ECG Lead On, 0b10 will mean BIOZ Lead On
douqan93 0:9ead5978d784 1175
douqan93 0:9ead5978d784 1176 // LEAD ON has been detected... Now take actions
douqan93 0:9ead5978d784 1177 acleadon_OneShot = 1;
douqan93 0:9ead5978d784 1178 dataAvailable(MAX30001_DATA_ACLEADON, &max30001_LeadOn, 1); // One shot data will be sent...
douqan93 0:9ead5978d784 1179 } else if (max30001_status.bit.lonint == 0 && acleadon_OneShot == 1) {
douqan93 0:9ead5978d784 1180 max30001_LeadOn = 0;
douqan93 0:9ead5978d784 1181 max30001_reg_read(STATUS, &max30001_status.all);
douqan93 0:9ead5978d784 1182 max30001_LeadOn =
douqan93 0:9ead5978d784 1183 max30001_LeadOn | (max30001_cnfg_gen.bit.en_ulp_lon << 8) | ((max30001_status.all & 0x000800) >> 11); // 0b01 will mean ECG Lead On, 0b10 will mean BIOZ Lead On
douqan93 0:9ead5978d784 1184 dataAvailable(MAX30001_DATA_ACLEADON, &max30001_LeadOn, 1); // One shot data will be sent...
douqan93 0:9ead5978d784 1185 acleadon_OneShot = 0;
douqan93 0:9ead5978d784 1186 }
douqan93 0:9ead5978d784 1187
douqan93 0:9ead5978d784 1188 return ret_val;
douqan93 0:9ead5978d784 1189 }
douqan93 0:9ead5978d784 1190
douqan93 0:9ead5978d784 1191 //******************************************************************************
douqan93 0:9ead5978d784 1192
douqan93 0:9ead5978d784 1193 int MAX30001::max30001_int_handler(void) {
douqan93 0:9ead5978d784 1194
douqan93 0:9ead5978d784 1195 static uint32_t InitReset = 0;
douqan93 0:9ead5978d784 1196
douqan93 0:9ead5978d784 1197 int8_t return_value;
douqan93 0:9ead5978d784 1198
douqan93 0:9ead5978d784 1199 max30001_reg_read(STATUS, &max30001_status.all);
douqan93 0:9ead5978d784 1200
douqan93 0:9ead5978d784 1201 // Inital Reset and any FIFO over flow invokes a FIFO reset
douqan93 0:9ead5978d784 1202 if (InitReset == 0 || max30001_status.bit.eovf == 1 || max30001_status.bit.bovf == 1 || max30001_status.bit.povf == 1) {
douqan93 0:9ead5978d784 1203 // Do a FIFO Reset
douqan93 0:9ead5978d784 1204 max30001_reg_write(FIFO_RST, 0x000000);
douqan93 0:9ead5978d784 1205
douqan93 0:9ead5978d784 1206 InitReset++;
douqan93 0:9ead5978d784 1207 return 2;
douqan93 0:9ead5978d784 1208 }
douqan93 0:9ead5978d784 1209
douqan93 0:9ead5978d784 1210 return_value = 0;
douqan93 0:9ead5978d784 1211
douqan93 0:9ead5978d784 1212 // The four data handling goes on over here
douqan93 0:9ead5978d784 1213 if (max30001_status.bit.eint == 1 || max30001_status.bit.pint == 1 || max30001_status.bit.bint == 1 || max30001_status.bit.rrint == 1) {
douqan93 0:9ead5978d784 1214 return_value = return_value | max30001_FIFO_LeadONOff_Read();
douqan93 0:9ead5978d784 1215 }
douqan93 0:9ead5978d784 1216
douqan93 0:9ead5978d784 1217 // ECG/BIOZ DC Lead Off test
douqan93 0:9ead5978d784 1218 if (max30001_status.bit.dcloffint == 1) {
douqan93 0:9ead5978d784 1219 return_value = return_value | max30001_FIFO_LeadONOff_Read();
douqan93 0:9ead5978d784 1220 }
douqan93 0:9ead5978d784 1221
douqan93 0:9ead5978d784 1222 // BIOZ AC Lead Off test
douqan93 0:9ead5978d784 1223 if (max30001_status.bit.bover == 1 || max30001_status.bit.bundr == 1) {
douqan93 0:9ead5978d784 1224 return_value = return_value | max30001_FIFO_LeadONOff_Read();
douqan93 0:9ead5978d784 1225 }
douqan93 0:9ead5978d784 1226
douqan93 0:9ead5978d784 1227 // BIOZ DRVP/N test using BCGMON.
douqan93 0:9ead5978d784 1228 if (max30001_status.bit.bcgmon == 1) {
douqan93 0:9ead5978d784 1229 return_value = return_value | max30001_FIFO_LeadONOff_Read();
douqan93 0:9ead5978d784 1230 }
douqan93 0:9ead5978d784 1231
douqan93 0:9ead5978d784 1232 if (max30001_status.bit.lonint == 1) // ECG Lead ON test: i.e. the leads are touching the body...
douqan93 0:9ead5978d784 1233 {
douqan93 0:9ead5978d784 1234
douqan93 0:9ead5978d784 1235 max30001_FIFO_LeadONOff_Read();
douqan93 0:9ead5978d784 1236 }
douqan93 0:9ead5978d784 1237
douqan93 0:9ead5978d784 1238 return return_value;
douqan93 0:9ead5978d784 1239 }
douqan93 0:9ead5978d784 1240
douqan93 0:9ead5978d784 1241 /// function pointer to the async callback
douqan93 0:9ead5978d784 1242 static event_callback_t functionpointer;
douqan93 0:9ead5978d784 1243 /// flag used to indicate an async xfer has taken place
douqan93 0:9ead5978d784 1244 static volatile int xferFlag = 0;
douqan93 0:9ead5978d784 1245
douqan93 0:9ead5978d784 1246 /**
douqan93 0:9ead5978d784 1247 * @brief Callback handler for SPI async events
douqan93 0:9ead5978d784 1248 * @param events description of event that occurred
douqan93 0:9ead5978d784 1249 */
douqan93 0:9ead5978d784 1250 static void spiHandler(int events) { xferFlag = 1; }
douqan93 0:9ead5978d784 1251
douqan93 0:9ead5978d784 1252 /**
douqan93 0:9ead5978d784 1253 * @brief Transmit and recieve QUAD SPI data
douqan93 0:9ead5978d784 1254 * @param tx_buf pointer to transmit byte buffer
douqan93 0:9ead5978d784 1255 * @param tx_size number of bytes to transmit
douqan93 0:9ead5978d784 1256 * @param rx_buf pointer to the recieve buffer
douqan93 0:9ead5978d784 1257 * @param rx_size number of bytes to recieve
douqan93 0:9ead5978d784 1258 */
douqan93 0:9ead5978d784 1259 int MAX30001::SPI_Transmit(const uint8_t *tx_buf, uint32_t tx_size, uint8_t *rx_buf, uint32_t rx_size) {
douqan93 0:9ead5978d784 1260 xferFlag = 0;
douqan93 0:9ead5978d784 1261 int i;
douqan93 0:9ead5978d784 1262 for (i = 0; i < sizeof(buffer); i++) {
douqan93 0:9ead5978d784 1263 if (i < tx_size)
douqan93 0:9ead5978d784 1264 buffer[i] = tx_buf[i];
douqan93 0:9ead5978d784 1265 else
douqan93 0:9ead5978d784 1266 buffer[i] = 0xFF;
douqan93 0:9ead5978d784 1267 }
douqan93 0:9ead5978d784 1268 spi->transfer<uint8_t>(buffer, (int)rx_size, rx_buf, (int)rx_size, spiHandler /* functionpointer */);
douqan93 0:9ead5978d784 1269 while (xferFlag == 0);
douqan93 0:9ead5978d784 1270 return 0;
douqan93 0:9ead5978d784 1271 }
douqan93 0:9ead5978d784 1272
douqan93 0:9ead5978d784 1273 //******************************************************************************
douqan93 0:9ead5978d784 1274 void MAX30001::max30001_ReadHeartrateData(max30001_t *_hspValMax30001) {
douqan93 0:9ead5978d784 1275 _hspValMax30001->R2R = hspValMax30001.R2R;
douqan93 0:9ead5978d784 1276 _hspValMax30001->fmstr = hspValMax30001.fmstr;
douqan93 0:9ead5978d784 1277 }
douqan93 0:9ead5978d784 1278
douqan93 0:9ead5978d784 1279 //******************************************************************************
douqan93 0:9ead5978d784 1280 void MAX30001::onDataAvailable(PtrFunction _onDataAvailable) {
douqan93 0:9ead5978d784 1281 onDataAvailableCallback = _onDataAvailable;
douqan93 0:9ead5978d784 1282 }
douqan93 0:9ead5978d784 1283
douqan93 0:9ead5978d784 1284 /**
douqan93 0:9ead5978d784 1285 * @brief Used to notify an external function that interrupt data is available
douqan93 0:9ead5978d784 1286 * @param id type of data available
douqan93 0:9ead5978d784 1287 * @param buffer 32-bit buffer that points to the data
douqan93 0:9ead5978d784 1288 * @param length length of 32-bit elements available
douqan93 0:9ead5978d784 1289 */
douqan93 0:9ead5978d784 1290 void MAX30001::dataAvailable(uint32_t id, uint32_t *buffer, uint32_t length) {
douqan93 0:9ead5978d784 1291 if (onDataAvailableCallback != NULL) {
douqan93 0:9ead5978d784 1292 (*onDataAvailableCallback)(id, buffer, length);
douqan93 0:9ead5978d784 1293 }
douqan93 0:9ead5978d784 1294 }
douqan93 0:9ead5978d784 1295
douqan93 0:9ead5978d784 1296 /**
douqan93 0:9ead5978d784 1297 * @brief Callback handler for SPI async events
douqan93 0:9ead5978d784 1298 * @param events description of event that occurred
douqan93 0:9ead5978d784 1299 */
douqan93 0:9ead5978d784 1300 void MAX30001::spiHandler(int events) { xferFlag = 1; }
douqan93 0:9ead5978d784 1301
douqan93 0:9ead5978d784 1302 //******************************************************************************
douqan93 0:9ead5978d784 1303 static int allowInterrupts = 0;
douqan93 0:9ead5978d784 1304
douqan93 0:9ead5978d784 1305 void MAX30001Mid_IntB_Handler(void) {
douqan93 0:9ead5978d784 1306 if (allowInterrupts == 0) return;
douqan93 0:9ead5978d784 1307 MAX30001::instance->max30001_int_handler();
douqan93 0:9ead5978d784 1308 }
douqan93 0:9ead5978d784 1309
douqan93 0:9ead5978d784 1310 void MAX30001Mid_Int2B_Handler(void) {
douqan93 0:9ead5978d784 1311 if (allowInterrupts == 0) return;
douqan93 0:9ead5978d784 1312 MAX30001::instance->max30001_int_handler();
douqan93 0:9ead5978d784 1313 }
douqan93 0:9ead5978d784 1314
douqan93 0:9ead5978d784 1315 void MAX30001_AllowInterrupts(int state) {
douqan93 0:9ead5978d784 1316 allowInterrupts = state;
douqan93 0:9ead5978d784 1317 }