Jesper Taxbøl
I have a problem getting this to work. Server only recieves half of the data being sent. Whats wrong
drv/usb/UsbHostMgr.cpp@0:66300c77c6e9, 2011-03-29 (annotated)
- Committer:
- tax
- Date:
- Tue Mar 29 13:20:15 2011 +0000
- Revision:
- 0:66300c77c6e9
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| tax | 0:66300c77c6e9 | 1 | |
| tax | 0:66300c77c6e9 | 2 | /* |
| tax | 0:66300c77c6e9 | 3 | Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com) |
| tax | 0:66300c77c6e9 | 4 | |
| tax | 0:66300c77c6e9 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy |
| tax | 0:66300c77c6e9 | 6 | of this software and associated documentation files (the "Software"), to deal |
| tax | 0:66300c77c6e9 | 7 | in the Software without restriction, including without limitation the rights |
| tax | 0:66300c77c6e9 | 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| tax | 0:66300c77c6e9 | 9 | copies of the Software, and to permit persons to whom the Software is |
| tax | 0:66300c77c6e9 | 10 | furnished to do so, subject to the following conditions: |
| tax | 0:66300c77c6e9 | 11 | |
| tax | 0:66300c77c6e9 | 12 | The above copyright notice and this permission notice shall be included in |
| tax | 0:66300c77c6e9 | 13 | all copies or substantial portions of the Software. |
| tax | 0:66300c77c6e9 | 14 | |
| tax | 0:66300c77c6e9 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| tax | 0:66300c77c6e9 | 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| tax | 0:66300c77c6e9 | 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| tax | 0:66300c77c6e9 | 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| tax | 0:66300c77c6e9 | 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| tax | 0:66300c77c6e9 | 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| tax | 0:66300c77c6e9 | 21 | THE SOFTWARE. |
| tax | 0:66300c77c6e9 | 22 | */ |
| tax | 0:66300c77c6e9 | 23 | |
| tax | 0:66300c77c6e9 | 24 | #include "UsbHostMgr.h" |
| tax | 0:66300c77c6e9 | 25 | |
| tax | 0:66300c77c6e9 | 26 | #include "usb_mem.h" |
| tax | 0:66300c77c6e9 | 27 | |
| tax | 0:66300c77c6e9 | 28 | #include "string.h" //For memcpy, memmove, memset |
| tax | 0:66300c77c6e9 | 29 | |
| tax | 0:66300c77c6e9 | 30 | #include "netCfg.h" |
| tax | 0:66300c77c6e9 | 31 | #if NET_USB |
| tax | 0:66300c77c6e9 | 32 | |
| tax | 0:66300c77c6e9 | 33 | //#define __DEBUG |
| tax | 0:66300c77c6e9 | 34 | #include "dbg/dbg.h" |
| tax | 0:66300c77c6e9 | 35 | |
| tax | 0:66300c77c6e9 | 36 | // bits of the USB/OTG clock control register |
| tax | 0:66300c77c6e9 | 37 | #define HOST_CLK_EN (1<<0) |
| tax | 0:66300c77c6e9 | 38 | #define DEV_CLK_EN (1<<1) |
| tax | 0:66300c77c6e9 | 39 | #define PORTSEL_CLK_EN (1<<3) |
| tax | 0:66300c77c6e9 | 40 | #define AHB_CLK_EN (1<<4) |
| tax | 0:66300c77c6e9 | 41 | |
| tax | 0:66300c77c6e9 | 42 | // bits of the USB/OTG clock status register |
| tax | 0:66300c77c6e9 | 43 | #define HOST_CLK_ON (1<<0) |
| tax | 0:66300c77c6e9 | 44 | #define DEV_CLK_ON (1<<1) |
| tax | 0:66300c77c6e9 | 45 | #define PORTSEL_CLK_ON (1<<3) |
| tax | 0:66300c77c6e9 | 46 | #define AHB_CLK_ON (1<<4) |
| tax | 0:66300c77c6e9 | 47 | |
| tax | 0:66300c77c6e9 | 48 | // we need host clock, OTG/portsel clock and AHB clock |
| tax | 0:66300c77c6e9 | 49 | #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN) |
| tax | 0:66300c77c6e9 | 50 | |
| tax | 0:66300c77c6e9 | 51 | static UsbHostMgr* pMgr = NULL; |
| tax | 0:66300c77c6e9 | 52 | |
| tax | 0:66300c77c6e9 | 53 | extern "C" void sUsbIrqhandler(void) __irq |
| tax | 0:66300c77c6e9 | 54 | { |
| tax | 0:66300c77c6e9 | 55 | DBG("\n+Int\n"); |
| tax | 0:66300c77c6e9 | 56 | if(pMgr) |
| tax | 0:66300c77c6e9 | 57 | pMgr->UsbIrqhandler(); |
| tax | 0:66300c77c6e9 | 58 | DBG("\n-Int\n"); |
| tax | 0:66300c77c6e9 | 59 | return; |
| tax | 0:66300c77c6e9 | 60 | } |
| tax | 0:66300c77c6e9 | 61 | |
| tax | 0:66300c77c6e9 | 62 | UsbHostMgr::UsbHostMgr() : m_lpDevices() |
| tax | 0:66300c77c6e9 | 63 | { |
| tax | 0:66300c77c6e9 | 64 | /*if(!pMgr)*/ //Assume singleton |
| tax | 0:66300c77c6e9 | 65 | pMgr = this; |
| tax | 0:66300c77c6e9 | 66 | usb_mem_init(); |
| tax | 0:66300c77c6e9 | 67 | memset(m_lpDevices, NULL, sizeof(UsbDevice*) * USB_HOSTMGR_MAX_DEVS); |
| tax | 0:66300c77c6e9 | 68 | m_pHcca = (HCCA*) usb_get_hcca(); |
| tax | 0:66300c77c6e9 | 69 | memset((void*)m_pHcca, 0, 0x100); |
| tax | 0:66300c77c6e9 | 70 | DBG("Host manager at %p\n", this); |
| tax | 0:66300c77c6e9 | 71 | } |
| tax | 0:66300c77c6e9 | 72 | |
| tax | 0:66300c77c6e9 | 73 | UsbHostMgr::~UsbHostMgr() |
| tax | 0:66300c77c6e9 | 74 | { |
| tax | 0:66300c77c6e9 | 75 | if(pMgr == this) |
| tax | 0:66300c77c6e9 | 76 | pMgr = NULL; |
| tax | 0:66300c77c6e9 | 77 | } |
| tax | 0:66300c77c6e9 | 78 | |
| tax | 0:66300c77c6e9 | 79 | UsbErr UsbHostMgr::init() //Initialize host |
| tax | 0:66300c77c6e9 | 80 | { |
| tax | 0:66300c77c6e9 | 81 | NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */ |
| tax | 0:66300c77c6e9 | 82 | |
| tax | 0:66300c77c6e9 | 83 | LPC_SC->PCONP &= ~(1UL<<31); //Cut power |
| tax | 0:66300c77c6e9 | 84 | wait(1); |
| tax | 0:66300c77c6e9 | 85 | |
| tax | 0:66300c77c6e9 | 86 | |
| tax | 0:66300c77c6e9 | 87 | // turn on power for USB |
| tax | 0:66300c77c6e9 | 88 | LPC_SC->PCONP |= (1UL<<31); |
| tax | 0:66300c77c6e9 | 89 | // Enable USB host clock, port selection and AHB clock |
| tax | 0:66300c77c6e9 | 90 | LPC_USB->USBClkCtrl |= CLOCK_MASK; |
| tax | 0:66300c77c6e9 | 91 | // Wait for clocks to become available |
| tax | 0:66300c77c6e9 | 92 | while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK) |
| tax | 0:66300c77c6e9 | 93 | ; |
| tax | 0:66300c77c6e9 | 94 | |
| tax | 0:66300c77c6e9 | 95 | // it seems the bits[0:1] mean the following |
| tax | 0:66300c77c6e9 | 96 | // 0: U1=device, U2=host |
| tax | 0:66300c77c6e9 | 97 | // 1: U1=host, U2=host |
| tax | 0:66300c77c6e9 | 98 | // 2: reserved |
| tax | 0:66300c77c6e9 | 99 | // 3: U1=host, U2=device |
| tax | 0:66300c77c6e9 | 100 | // NB: this register is only available if OTG clock (aka "port select") is enabled!! |
| tax | 0:66300c77c6e9 | 101 | // since we don't care about port 2, set just bit 0 to 1 (U1=host) |
| tax | 0:66300c77c6e9 | 102 | LPC_USB->OTGStCtrl |= 1; |
| tax | 0:66300c77c6e9 | 103 | |
| tax | 0:66300c77c6e9 | 104 | // now that we've configured the ports, we can turn off the portsel clock |
| tax | 0:66300c77c6e9 | 105 | LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN; |
| tax | 0:66300c77c6e9 | 106 | |
| tax | 0:66300c77c6e9 | 107 | // power pins are not connected on mbed, so we can skip them |
| tax | 0:66300c77c6e9 | 108 | /* P1[18] = USB_UP_LED, 01 */ |
| tax | 0:66300c77c6e9 | 109 | /* P1[19] = /USB_PPWR, 10 */ |
| tax | 0:66300c77c6e9 | 110 | /* P1[22] = USB_PWRD, 10 */ |
| tax | 0:66300c77c6e9 | 111 | /* P1[27] = /USB_OVRCR, 10 */ |
| tax | 0:66300c77c6e9 | 112 | /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22)); |
| tax | 0:66300c77c6e9 | 113 | LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080 |
| tax | 0:66300c77c6e9 | 114 | */ |
| tax | 0:66300c77c6e9 | 115 | |
| tax | 0:66300c77c6e9 | 116 | // configure USB D+/D- pins |
| tax | 0:66300c77c6e9 | 117 | /* P0[29] = USB_D+, 01 */ |
| tax | 0:66300c77c6e9 | 118 | /* P0[30] = USB_D-, 01 */ |
| tax | 0:66300c77c6e9 | 119 | LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28)); |
| tax | 0:66300c77c6e9 | 120 | LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000 |
| tax | 0:66300c77c6e9 | 121 | |
| tax | 0:66300c77c6e9 | 122 | DBG("Initializing Host Stack\n"); |
| tax | 0:66300c77c6e9 | 123 | |
| tax | 0:66300c77c6e9 | 124 | wait_ms(100); /* Wait 50 ms before apply reset */ |
| tax | 0:66300c77c6e9 | 125 | LPC_USB->HcControl = 0; /* HARDWARE RESET */ |
| tax | 0:66300c77c6e9 | 126 | LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */ |
| tax | 0:66300c77c6e9 | 127 | LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */ |
| tax | 0:66300c77c6e9 | 128 | |
| tax | 0:66300c77c6e9 | 129 | /* SOFTWARE RESET */ |
| tax | 0:66300c77c6e9 | 130 | LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR; |
| tax | 0:66300c77c6e9 | 131 | LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */ |
| tax | 0:66300c77c6e9 | 132 | |
| tax | 0:66300c77c6e9 | 133 | /* Put HC in operational state */ |
| tax | 0:66300c77c6e9 | 134 | LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER; |
| tax | 0:66300c77c6e9 | 135 | LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */ |
| tax | 0:66300c77c6e9 | 136 | |
| tax | 0:66300c77c6e9 | 137 | LPC_USB->HcHCCA = (uint32_t)(m_pHcca); |
| tax | 0:66300c77c6e9 | 138 | LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */ |
| tax | 0:66300c77c6e9 | 139 | |
| tax | 0:66300c77c6e9 | 140 | |
| tax | 0:66300c77c6e9 | 141 | LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE | |
| tax | 0:66300c77c6e9 | 142 | OR_INTR_ENABLE_WDH | |
| tax | 0:66300c77c6e9 | 143 | OR_INTR_ENABLE_RHSC; |
| tax | 0:66300c77c6e9 | 144 | |
| tax | 0:66300c77c6e9 | 145 | NVIC_SetPriority(USB_IRQn, 0); /* highest priority */ |
| tax | 0:66300c77c6e9 | 146 | /* Enable the USB Interrupt */ |
| tax | 0:66300c77c6e9 | 147 | NVIC_SetVector(USB_IRQn, (uint32_t)(sUsbIrqhandler)); |
| tax | 0:66300c77c6e9 | 148 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC; |
| tax | 0:66300c77c6e9 | 149 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; |
| tax | 0:66300c77c6e9 | 150 | |
| tax | 0:66300c77c6e9 | 151 | /* Check for any connected devices */ |
| tax | 0:66300c77c6e9 | 152 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) //Root device connected |
| tax | 0:66300c77c6e9 | 153 | { |
| tax | 0:66300c77c6e9 | 154 | //Device connected |
| tax | 0:66300c77c6e9 | 155 | wait(1); |
| tax | 0:66300c77c6e9 | 156 | DBG("Device connected (%08x)\n", LPC_USB->HcRhPortStatus1); |
| tax | 0:66300c77c6e9 | 157 | onUsbDeviceConnected(0, 1); //Hub 0 (root hub), Port 1 (count starts at 1) |
| tax | 0:66300c77c6e9 | 158 | } |
| tax | 0:66300c77c6e9 | 159 | |
| tax | 0:66300c77c6e9 | 160 | DBG("Enabling IRQ\n"); |
| tax | 0:66300c77c6e9 | 161 | NVIC_EnableIRQ(USB_IRQn); |
| tax | 0:66300c77c6e9 | 162 | DBG("End of host stack initialization\n"); |
| tax | 0:66300c77c6e9 | 163 | return USBERR_OK; |
| tax | 0:66300c77c6e9 | 164 | } |
| tax | 0:66300c77c6e9 | 165 | |
| tax | 0:66300c77c6e9 | 166 | void UsbHostMgr::poll() //Enumerate connected devices, etc |
| tax | 0:66300c77c6e9 | 167 | { |
| tax | 0:66300c77c6e9 | 168 | /* Check for any connected devices */ |
| tax | 0:66300c77c6e9 | 169 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) //Root device connected |
| tax | 0:66300c77c6e9 | 170 | { |
| tax | 0:66300c77c6e9 | 171 | //Device connected |
| tax | 0:66300c77c6e9 | 172 | wait(1); |
| tax | 0:66300c77c6e9 | 173 | DBG("Device connected (%08x)\n", LPC_USB->HcRhPortStatus1); |
| tax | 0:66300c77c6e9 | 174 | onUsbDeviceConnected(0, 1); //Hub 0 (root hub), Port 1 (count starts at 1) |
| tax | 0:66300c77c6e9 | 175 | } |
| tax | 0:66300c77c6e9 | 176 | |
| tax | 0:66300c77c6e9 | 177 | for(int i = 0; i < devicesCount(); i++) |
| tax | 0:66300c77c6e9 | 178 | { |
| tax | 0:66300c77c6e9 | 179 | if( (m_lpDevices[i]->m_connected) |
| tax | 0:66300c77c6e9 | 180 | && !(m_lpDevices[i]->m_enumerated) ) |
| tax | 0:66300c77c6e9 | 181 | { |
| tax | 0:66300c77c6e9 | 182 | m_lpDevices[i]->enumerate(); |
| tax | 0:66300c77c6e9 | 183 | return; |
| tax | 0:66300c77c6e9 | 184 | } |
| tax | 0:66300c77c6e9 | 185 | } |
| tax | 0:66300c77c6e9 | 186 | } |
| tax | 0:66300c77c6e9 | 187 | |
| tax | 0:66300c77c6e9 | 188 | int UsbHostMgr::devicesCount() |
| tax | 0:66300c77c6e9 | 189 | { |
| tax | 0:66300c77c6e9 | 190 | int i; |
| tax | 0:66300c77c6e9 | 191 | for(i = 0; i < USB_HOSTMGR_MAX_DEVS; i++) |
| tax | 0:66300c77c6e9 | 192 | { |
| tax | 0:66300c77c6e9 | 193 | if (m_lpDevices[i] == NULL) |
| tax | 0:66300c77c6e9 | 194 | break; |
| tax | 0:66300c77c6e9 | 195 | } |
| tax | 0:66300c77c6e9 | 196 | return i; |
| tax | 0:66300c77c6e9 | 197 | } |
| tax | 0:66300c77c6e9 | 198 | |
| tax | 0:66300c77c6e9 | 199 | UsbDevice* UsbHostMgr::getDevice(int item) |
| tax | 0:66300c77c6e9 | 200 | { |
| tax | 0:66300c77c6e9 | 201 | UsbDevice* pDev = m_lpDevices[item]; |
| tax | 0:66300c77c6e9 | 202 | if(!pDev) |
| tax | 0:66300c77c6e9 | 203 | return NULL; |
| tax | 0:66300c77c6e9 | 204 | |
| tax | 0:66300c77c6e9 | 205 | pDev->m_refs++; |
| tax | 0:66300c77c6e9 | 206 | return pDev; |
| tax | 0:66300c77c6e9 | 207 | } |
| tax | 0:66300c77c6e9 | 208 | |
| tax | 0:66300c77c6e9 | 209 | void UsbHostMgr::releaseDevice(UsbDevice* pDev) |
| tax | 0:66300c77c6e9 | 210 | { |
| tax | 0:66300c77c6e9 | 211 | pDev->m_refs--; |
| tax | 0:66300c77c6e9 | 212 | if(pDev->m_refs > 0) |
| tax | 0:66300c77c6e9 | 213 | return; |
| tax | 0:66300c77c6e9 | 214 | //If refs count = 0, delete |
| tax | 0:66300c77c6e9 | 215 | //Find & remove from list |
| tax | 0:66300c77c6e9 | 216 | int i; |
| tax | 0:66300c77c6e9 | 217 | for(i = 0; i < USB_HOSTMGR_MAX_DEVS; i++) |
| tax | 0:66300c77c6e9 | 218 | { |
| tax | 0:66300c77c6e9 | 219 | if (m_lpDevices[i] == pDev) |
| tax | 0:66300c77c6e9 | 220 | break; |
| tax | 0:66300c77c6e9 | 221 | } |
| tax | 0:66300c77c6e9 | 222 | if(i!=USB_HOSTMGR_MAX_DEVS) |
| tax | 0:66300c77c6e9 | 223 | memmove(&m_lpDevices[i], &m_lpDevices[i+1], sizeof(UsbDevice*) * (USB_HOSTMGR_MAX_DEVS - (i + 1))); //Safer than memcpy because of overlapping mem |
| tax | 0:66300c77c6e9 | 224 | m_lpDevices[USB_HOSTMGR_MAX_DEVS - 1] = NULL; |
| tax | 0:66300c77c6e9 | 225 | delete pDev; |
| tax | 0:66300c77c6e9 | 226 | } |
| tax | 0:66300c77c6e9 | 227 | |
| tax | 0:66300c77c6e9 | 228 | void UsbHostMgr::UsbIrqhandler() |
| tax | 0:66300c77c6e9 | 229 | { |
| tax | 0:66300c77c6e9 | 230 | uint32_t int_status; |
| tax | 0:66300c77c6e9 | 231 | uint32_t ie_status; |
| tax | 0:66300c77c6e9 | 232 | |
| tax | 0:66300c77c6e9 | 233 | int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */ |
| tax | 0:66300c77c6e9 | 234 | ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */ |
| tax | 0:66300c77c6e9 | 235 | |
| tax | 0:66300c77c6e9 | 236 | if (!(int_status & ie_status)) |
| tax | 0:66300c77c6e9 | 237 | { |
| tax | 0:66300c77c6e9 | 238 | return; |
| tax | 0:66300c77c6e9 | 239 | } |
| tax | 0:66300c77c6e9 | 240 | else |
| tax | 0:66300c77c6e9 | 241 | { |
| tax | 0:66300c77c6e9 | 242 | int_status = int_status & ie_status; |
| tax | 0:66300c77c6e9 | 243 | if (int_status & OR_INTR_STATUS_RHSC) /* Root hub status change interrupt */ |
| tax | 0:66300c77c6e9 | 244 | { |
| tax | 0:66300c77c6e9 | 245 | DBG("LPC_USB->HcRhPortStatus1 = %08x\n", LPC_USB->HcRhPortStatus1); |
| tax | 0:66300c77c6e9 | 246 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) |
| tax | 0:66300c77c6e9 | 247 | { |
| tax | 0:66300c77c6e9 | 248 | if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) |
| tax | 0:66300c77c6e9 | 249 | { |
| tax | 0:66300c77c6e9 | 250 | /* |
| tax | 0:66300c77c6e9 | 251 | * When DRWE is on, Connect Status Change |
| tax | 0:66300c77c6e9 | 252 | * means a remote wakeup event. |
| tax | 0:66300c77c6e9 | 253 | */ |
| tax | 0:66300c77c6e9 | 254 | //HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT |
| tax | 0:66300c77c6e9 | 255 | } |
| tax | 0:66300c77c6e9 | 256 | else |
| tax | 0:66300c77c6e9 | 257 | { |
| tax | 0:66300c77c6e9 | 258 | /* |
| tax | 0:66300c77c6e9 | 259 | * When DRWE is off, Connect Status Change |
| tax | 0:66300c77c6e9 | 260 | * is NOT a remote wakeup event |
| tax | 0:66300c77c6e9 | 261 | */ |
| tax | 0:66300c77c6e9 | 262 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) //Root device connected |
| tax | 0:66300c77c6e9 | 263 | { |
| tax | 0:66300c77c6e9 | 264 | //Device connected |
| tax | 0:66300c77c6e9 | 265 | DBG("Device connected (%08x)\n", LPC_USB->HcRhPortStatus1); |
| tax | 0:66300c77c6e9 | 266 | onUsbDeviceConnected(0, 1); //Hub 0 (root hub), Port 1 (count starts at 1) |
| tax | 0:66300c77c6e9 | 267 | } |
| tax | 0:66300c77c6e9 | 268 | else //Root device disconnected |
| tax | 0:66300c77c6e9 | 269 | { |
| tax | 0:66300c77c6e9 | 270 | //Device disconnected |
| tax | 0:66300c77c6e9 | 271 | DBG("Device disconnected\n"); |
| tax | 0:66300c77c6e9 | 272 | onUsbDeviceDisconnected(0, 1); |
| tax | 0:66300c77c6e9 | 273 | } |
| tax | 0:66300c77c6e9 | 274 | //TODO: HUBS |
| tax | 0:66300c77c6e9 | 275 | } |
| tax | 0:66300c77c6e9 | 276 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC; |
| tax | 0:66300c77c6e9 | 277 | } |
| tax | 0:66300c77c6e9 | 278 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) |
| tax | 0:66300c77c6e9 | 279 | { |
| tax | 0:66300c77c6e9 | 280 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; |
| tax | 0:66300c77c6e9 | 281 | } |
| tax | 0:66300c77c6e9 | 282 | } |
| tax | 0:66300c77c6e9 | 283 | if (int_status & OR_INTR_STATUS_WDH) /* Writeback Done Head interrupt */ |
| tax | 0:66300c77c6e9 | 284 | { |
| tax | 0:66300c77c6e9 | 285 | //UsbEndpoint::sOnCompletion((LPC_USB->HccaDoneHead) & 0xFE); |
| tax | 0:66300c77c6e9 | 286 | if(m_pHcca->DoneHead) |
| tax | 0:66300c77c6e9 | 287 | { |
| tax | 0:66300c77c6e9 | 288 | UsbEndpoint::sOnCompletion(m_pHcca->DoneHead); |
| tax | 0:66300c77c6e9 | 289 | m_pHcca->DoneHead = 0; |
| tax | 0:66300c77c6e9 | 290 | LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH; |
| tax | 0:66300c77c6e9 | 291 | if(m_pHcca->DoneHead) |
| tax | 0:66300c77c6e9 | 292 | DBG("??????????????????????????????\n\n\n"); |
| tax | 0:66300c77c6e9 | 293 | } |
| tax | 0:66300c77c6e9 | 294 | else |
| tax | 0:66300c77c6e9 | 295 | { |
| tax | 0:66300c77c6e9 | 296 | //Probably an error |
| tax | 0:66300c77c6e9 | 297 | int_status = LPC_USB->HcInterruptStatus; |
| tax | 0:66300c77c6e9 | 298 | DBG("HcInterruptStatus = %08x\n", int_status); |
| tax | 0:66300c77c6e9 | 299 | if (int_status & OR_INTR_STATUS_UE) //Unrecoverable error, disconnect devices and resume |
| tax | 0:66300c77c6e9 | 300 | { |
| tax | 0:66300c77c6e9 | 301 | onUsbDeviceDisconnected(0, 1); |
| tax | 0:66300c77c6e9 | 302 | LPC_USB->HcInterruptStatus = OR_INTR_STATUS_UE; |
| tax | 0:66300c77c6e9 | 303 | LPC_USB->HcCommandStatus = 0x01; //Host Controller Reset |
| tax | 0:66300c77c6e9 | 304 | } |
| tax | 0:66300c77c6e9 | 305 | } |
| tax | 0:66300c77c6e9 | 306 | } |
| tax | 0:66300c77c6e9 | 307 | LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */ |
| tax | 0:66300c77c6e9 | 308 | } |
| tax | 0:66300c77c6e9 | 309 | return; |
| tax | 0:66300c77c6e9 | 310 | } |
| tax | 0:66300c77c6e9 | 311 | |
| tax | 0:66300c77c6e9 | 312 | void UsbHostMgr::onUsbDeviceConnected(int hub, int port) |
| tax | 0:66300c77c6e9 | 313 | { |
| tax | 0:66300c77c6e9 | 314 | int item = devicesCount(); |
| tax | 0:66300c77c6e9 | 315 | if( item == USB_HOSTMGR_MAX_DEVS ) |
| tax | 0:66300c77c6e9 | 316 | return; //List full... |
| tax | 0:66300c77c6e9 | 317 | //Find a free address (not optimized, but not really important) |
| tax | 0:66300c77c6e9 | 318 | int i; |
| tax | 0:66300c77c6e9 | 319 | int addr = 1; |
| tax | 0:66300c77c6e9 | 320 | for(i = 0; i < item; i++) |
| tax | 0:66300c77c6e9 | 321 | { |
| tax | 0:66300c77c6e9 | 322 | addr = MAX( addr, m_lpDevices[i]->m_addr + 1 ); |
| tax | 0:66300c77c6e9 | 323 | } |
| tax | 0:66300c77c6e9 | 324 | m_lpDevices[item] = new UsbDevice( this, hub, port, addr ); |
| tax | 0:66300c77c6e9 | 325 | m_lpDevices[item]->m_connected = true; |
| tax | 0:66300c77c6e9 | 326 | } |
| tax | 0:66300c77c6e9 | 327 | |
| tax | 0:66300c77c6e9 | 328 | void UsbHostMgr::onUsbDeviceDisconnected(int hub, int port) |
| tax | 0:66300c77c6e9 | 329 | { |
| tax | 0:66300c77c6e9 | 330 | for(int i = 0; i < devicesCount(); i++) |
| tax | 0:66300c77c6e9 | 331 | { |
| tax | 0:66300c77c6e9 | 332 | if( (m_lpDevices[i]->m_hub == hub) |
| tax | 0:66300c77c6e9 | 333 | && (m_lpDevices[i]->m_port == port) ) |
| tax | 0:66300c77c6e9 | 334 | { |
| tax | 0:66300c77c6e9 | 335 | m_lpDevices[i]->m_connected = false; |
| tax | 0:66300c77c6e9 | 336 | if(!m_lpDevices[i]->m_enumerated) |
| tax | 0:66300c77c6e9 | 337 | { |
| tax | 0:66300c77c6e9 | 338 | delete m_lpDevices[i]; |
| tax | 0:66300c77c6e9 | 339 | m_lpDevices[i] = NULL; |
| tax | 0:66300c77c6e9 | 340 | } |
| tax | 0:66300c77c6e9 | 341 | return; |
| tax | 0:66300c77c6e9 | 342 | } |
| tax | 0:66300c77c6e9 | 343 | } |
| tax | 0:66300c77c6e9 | 344 | } |
| tax | 0:66300c77c6e9 | 345 | |
| tax | 0:66300c77c6e9 | 346 | void UsbHostMgr::resetPort(int hub, int port) |
| tax | 0:66300c77c6e9 | 347 | { |
| tax | 0:66300c77c6e9 | 348 | DBG("Resetting hub %d, port %d\n", hub, port); |
| tax | 0:66300c77c6e9 | 349 | if(hub == 0) //Root hub |
| tax | 0:66300c77c6e9 | 350 | { |
| tax | 0:66300c77c6e9 | 351 | wait_ms(100); /* USB 2.0 spec says at least 50ms delay before port reset */ |
| tax | 0:66300c77c6e9 | 352 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset |
| tax | 0:66300c77c6e9 | 353 | DBG("Before loop\n"); |
| tax | 0:66300c77c6e9 | 354 | while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS) |
| tax | 0:66300c77c6e9 | 355 | ; |
| tax | 0:66300c77c6e9 | 356 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal |
| tax | 0:66300c77c6e9 | 357 | DBG("After loop\n"); |
| tax | 0:66300c77c6e9 | 358 | wait_ms(200); /* Wait for 100 MS after port reset */ |
| tax | 0:66300c77c6e9 | 359 | } |
| tax | 0:66300c77c6e9 | 360 | else |
| tax | 0:66300c77c6e9 | 361 | { |
| tax | 0:66300c77c6e9 | 362 | //TODO: Hubs |
| tax | 0:66300c77c6e9 | 363 | } |
| tax | 0:66300c77c6e9 | 364 | DBG("Port reset OK\n"); |
| tax | 0:66300c77c6e9 | 365 | } |
| tax | 0:66300c77c6e9 | 366 | |
| tax | 0:66300c77c6e9 | 367 | #endif |