Revision 0:56b10b0c7db4, committed 2018-03-01

Comitter:

tanabe2000

Date:

Thu Mar 01 00:46:05 2018 +0000

Commit message:

tekito; ;

Changed in this revision

diff -r 000000000000 -r 56b10b0c7db4 a4960.cpp
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/a4960.cpp	Thu Mar 01 00:46:05 2018 +0000
@@ -0,0 +1,88 @@
+#include "a4960.h"
+
+a4960::a4960() : spi(PB_15,PB_14,PB_13), _cs_pin(PB_1), _blink_pin(LED1), _PWM_pin(PA_11)
+{
+    PWM_freq = 20000.0;
+    PWM_duty = 0.5;
+    motor_started = true;
+
+    _config[0] = 0b0000000000000000; // 50 us comm blank time, 2.4 us blank time, 200 ns deadtime
+    _config[1] = 0b0010000000000000; // Vri = 100% Vref, Vdsth = 800mV
+    _config[2] =  0b0100000000000000; // 35.6 us current control time
+    _config[3] = 0b0110000000000000; // current limited, 50% current for hold, 18ms hold time
+    _config[4] =   0b1000000000000000; // 0.8ms min comm time, 24 ms start comm time
+    _config[5] =  0b1010000000000000; // 16.875deg phase adv, 100% ramp current, 0.4ms ramp rate
+    _config[6] =  0b1100000000000000; // fault detection all on
+    _config[7] = 0b1110000000000100;
+    // auto BEMF hyst, 3.2us zx det window, no stop on fail, DIAG pin = fault, restart on loss of sync, brake off, forward, coast
+    
+    SPI_init();
+}
+
+void a4960::SPI_init()
+{
+    // initialize pins
+    _cs_pin = 1;
+    _blink_pin = 1;
+    _PWM_pin.period(1/PWM_freq);
+    _PWM_pin.write(PWM_duty);
+    spi.format(16,3);
+    spi.frequency(1000000);
+    // initialize SPI connection
+    //SPI.begin(P0_8, P0_9, P0_11);//SCK, MOSI, MOSI
+    // set registers to default config
+    for (int i = 0; i < 8; i++) {
+        write_to_a4960(_config[i]);
+    }
+    // turn off pin to indicate initialization complete
+    _blink_pin = 0;
+}
+void a4960::write_to_a4960(uint16_t msg)
+{
+    // split 16-bit message to a4960 into two 8-bit messages
+    uint8_t ms_half;
+    uint8_t ls_half;
+
+    // ---- 1st message (bits 15 - 8)
+    // 3 bit address
+    // 12 bit message
+    // shift message to get rid of 8 LSB on the end and OR
+    // the write bit and the
+    // 4 remaining bits into the first-half msg
+    ms_half = 1 << 4 | (uint8_t)(msg>>8);
+    // ---- 2nd message (bits 7 - 0)
+    ls_half = (uint8_t)(msg);
+
+    // pull to active low
+    _cs_pin = 0;
+    wait_us(200);
+
+    // transfer the to messages halves, MSB first
+    printf("test %d :%d\n\r",spi.write(ms_half<<8 | ls_half),(ms_half<<8 | ls_half));
+    printf("test2 :%d",spi.write(0));
+
+    // wait and pull CS line back to inactive high
+    wait_us(200);
+    _cs_pin = 1;
+}
+
+void a4960::write_run(void)
+{
+    write_to_a4960(_config[7] | 1);
+}
+
+void a4960::write_brake(void)
+{
+    write_to_a4960(_config[7]);
+}
+
+int a4960::read()
+{   _cs_pin = 0;
+    uint8_t h;
+    wait_us(200);
+    h = spi.write(0b1110000000000000);
+    //h = spi.write(0);
+    wait_us(200);
+    _cs_pin = 1;
+    return h;
+}
\ No newline at end of file

diff -r 000000000000 -r 56b10b0c7db4 a4960.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/a4960.h	Thu Mar 01 00:46:05 2018 +0000
@@ -0,0 +1,60 @@
+#ifndef _A4960_H_
+#define _A4960_H_
+
+#include "mbed.h"
+//#include "spi_master.h"
+
+class a4960
+{
+public:
+    a4960();
+    void SPI_init();
+    void write_to_a4960(uint16_t msg);
+    void write_run();
+    void write_brake();
+    int read();
+    bool motor_started;
+    float PWM_freq; // Hz
+    float PWM_duty; // 0 to 1
+private:
+// the default configurations of the 8 a4960 registers
+// 0. Config0: basic timing settings
+//      CB(2 bits) comm. blank time
+//      BT (4 bits) blank time in 400ns increments
+//      DT (6 bits) dead time in 50ns increments
+// 1. Config1: basic voltage settings
+//      VR (4 bits) current limit reference voltage as ratio of Vref
+//      VT (6 bits) drain-source thresh. voltage in 25 mV increments
+// 2. Config2: PWM settings
+//      PT (5 bits) off-time for PWM current control, limits motor current
+// 3. Config3: start-up hold settings
+//      IDS (1 bit) select current control or duty cycle control for init. holding torque
+//      HQ (4 bits) holding torque for initial start position
+//                  hold current or duty cycle in increments of 6.25%
+//      HT (4 bits) hold time of init. start position, increments of 8ms from 2ms
+// 4. Config4: start-up timing settings
+//      EC (4 bits) end comm. time in incr. of 200us
+//      SC (4 bits) start comm. time in incr. of 8ms
+// 5. Config5: start-up ramp settings
+//      PA (4 bits) phase advance in incr. of 1.875 deg
+//      RQ (4 bits) torque during ramp up (duty cycle or current control dep. on IDS) in 6.25% incr.
+//      RR (4 bits) accel. rate during forced comm. ramp up
+// 6. Mask: fault masking bit for each fault bit in Diagnostic register
+//      each bit: 1 means diagnostic is diabled
+// 7. Run: bits to set running conditions
+//      BH (2 bits) select BEMF hysteresis
+//      BW (3 bits) BEMF window
+//      ESF (1 bit) enable stop on fault
+//      DG (2 bits) select output routed to DIAG terminal, default general fault output flag (low if fault detected)
+//      RSC (1 bit) 1 to enable restart after loss of sync if RUN 1, BRK 0, else coast to stop
+//      BRK (1 bit) brake control
+//      DIR (1 bit) direction control
+//      RUN (1 bit) run control
+    uint16_t _config[8];
+    SPI spi;
+    DigitalOut _cs_pin;
+    DigitalOut _blink_pin;
+    PwmOut _PWM_pin;
+};
+
+#endif
\ No newline at end of file