Kojo / mbed-rtos

mbed-rtos for GR-peach

Fork of mbed-rtos by mbed official

rtx/TARGET_CORTEX_M/HAL_CM.c@49:77c8e4604045, 2014-11-06 (annotated)

Committer:
mbed_official
Date:
Thu Nov 06 13:00:11 2014 +0000
Revision:
49:77c8e4604045
Synchronized with git revision 7b90c2ba137baaf9769219e0e8a7b8e8d1299c4f



Full URL: https://github.com/mbedmicro/mbed/commit/7b90c2ba137baaf9769219e0e8a7b8e8d1299c4f/



This target is not yet tested, so it can't be released as part of the official

SDK build for now.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 49:77c8e4604045 1 /*----------------------------------------------------------------------------
mbed_official 49:77c8e4604045 2 * RL-ARM - RTX
mbed_official 49:77c8e4604045 3 *----------------------------------------------------------------------------
mbed_official 49:77c8e4604045 4 * Name: HAL_CM.C
mbed_official 49:77c8e4604045 5 * Purpose: Hardware Abstraction Layer for Cortex-M
mbed_official 49:77c8e4604045 6 * Rev.: V4.60
mbed_official 49:77c8e4604045 7 *----------------------------------------------------------------------------
mbed_official 49:77c8e4604045 8 *
mbed_official 49:77c8e4604045 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
mbed_official 49:77c8e4604045 10 * All rights reserved.
mbed_official 49:77c8e4604045 11 * Redistribution and use in source and binary forms, with or without
mbed_official 49:77c8e4604045 12 * modification, are permitted provided that the following conditions are met:
mbed_official 49:77c8e4604045 13 * - Redistributions of source code must retain the above copyright
mbed_official 49:77c8e4604045 14 * notice, this list of conditions and the following disclaimer.
mbed_official 49:77c8e4604045 15 * - Redistributions in binary form must reproduce the above copyright
mbed_official 49:77c8e4604045 16 * notice, this list of conditions and the following disclaimer in the
mbed_official 49:77c8e4604045 17 * documentation and/or other materials provided with the distribution.
mbed_official 49:77c8e4604045 18 * - Neither the name of ARM nor the names of its contributors may be used
mbed_official 49:77c8e4604045 19 * to endorse or promote products derived from this software without
mbed_official 49:77c8e4604045 20 * specific prior written permission.
mbed_official 49:77c8e4604045 21 *
mbed_official 49:77c8e4604045 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 49:77c8e4604045 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 49:77c8e4604045 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mbed_official 49:77c8e4604045 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mbed_official 49:77c8e4604045 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mbed_official 49:77c8e4604045 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mbed_official 49:77c8e4604045 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mbed_official 49:77c8e4604045 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mbed_official 49:77c8e4604045 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mbed_official 49:77c8e4604045 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 49:77c8e4604045 32 * POSSIBILITY OF SUCH DAMAGE.
mbed_official 49:77c8e4604045 33 *---------------------------------------------------------------------------*/
mbed_official 49:77c8e4604045 34
mbed_official 49:77c8e4604045 35 #include "rt_TypeDef.h"
mbed_official 49:77c8e4604045 36 #include "RTX_Conf.h"
mbed_official 49:77c8e4604045 37 #include "rt_HAL_CM.h"
mbed_official 49:77c8e4604045 38
mbed_official 49:77c8e4604045 39
mbed_official 49:77c8e4604045 40 /*----------------------------------------------------------------------------
mbed_official 49:77c8e4604045 41 * Global Variables
mbed_official 49:77c8e4604045 42 *---------------------------------------------------------------------------*/
mbed_official 49:77c8e4604045 43
mbed_official 49:77c8e4604045 44 #ifdef DBG_MSG
mbed_official 49:77c8e4604045 45 BIT dbg_msg;
mbed_official 49:77c8e4604045 46 #endif
mbed_official 49:77c8e4604045 47
mbed_official 49:77c8e4604045 48 /*----------------------------------------------------------------------------
mbed_official 49:77c8e4604045 49 * Functions
mbed_official 49:77c8e4604045 50 *---------------------------------------------------------------------------*/
mbed_official 49:77c8e4604045 51
mbed_official 49:77c8e4604045 52
mbed_official 49:77c8e4604045 53 /*--------------------------- rt_init_stack ---------------------------------*/
mbed_official 49:77c8e4604045 54
mbed_official 49:77c8e4604045 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
mbed_official 49:77c8e4604045 56 /* Prepare TCB and saved context for a first time start of a task. */
mbed_official 49:77c8e4604045 57 U32 *stk,i,size;
mbed_official 49:77c8e4604045 58
mbed_official 49:77c8e4604045 59 /* Prepare a complete interrupt frame for first task start */
mbed_official 49:77c8e4604045 60 size = p_TCB->priv_stack >> 2;
mbed_official 49:77c8e4604045 61
mbed_official 49:77c8e4604045 62 /* Write to the top of stack. */
mbed_official 49:77c8e4604045 63 stk = &p_TCB->stack[size];
mbed_official 49:77c8e4604045 64
mbed_official 49:77c8e4604045 65 /* Auto correct to 8-byte ARM stack alignment. */
mbed_official 49:77c8e4604045 66 if ((U32)stk & 0x04) {
mbed_official 49:77c8e4604045 67 stk--;
mbed_official 49:77c8e4604045 68 }
mbed_official 49:77c8e4604045 69
mbed_official 49:77c8e4604045 70 stk -= 16;
mbed_official 49:77c8e4604045 71
mbed_official 49:77c8e4604045 72 /* Default xPSR and initial PC */
mbed_official 49:77c8e4604045 73 stk[15] = INITIAL_xPSR;
mbed_official 49:77c8e4604045 74 stk[14] = (U32)task_body;
mbed_official 49:77c8e4604045 75
mbed_official 49:77c8e4604045 76 /* Clear R4-R11,R0-R3,R12,LR registers. */
mbed_official 49:77c8e4604045 77 for (i = 0; i < 14; i++) {
mbed_official 49:77c8e4604045 78 stk[i] = 0;
mbed_official 49:77c8e4604045 79 }
mbed_official 49:77c8e4604045 80
mbed_official 49:77c8e4604045 81 /* Assign a void pointer to R0. */
mbed_official 49:77c8e4604045 82 stk[8] = (U32)p_TCB->msg;
mbed_official 49:77c8e4604045 83
mbed_official 49:77c8e4604045 84 /* Initial Task stack pointer. */
mbed_official 49:77c8e4604045 85 p_TCB->tsk_stack = (U32)stk;
mbed_official 49:77c8e4604045 86
mbed_official 49:77c8e4604045 87 /* Task entry point. */
mbed_official 49:77c8e4604045 88 p_TCB->ptask = task_body;
mbed_official 49:77c8e4604045 89
mbed_official 49:77c8e4604045 90 /* Set a magic word for checking of stack overflow.
mbed_official 49:77c8e4604045 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
mbed_official 49:77c8e4604045 92 heap, therefore the last word of the stack is a moving target.
mbed_official 49:77c8e4604045 93 We want to do stack/heap collision detection instead.
mbed_official 49:77c8e4604045 94 */
mbed_official 49:77c8e4604045 95 if (p_TCB->task_id != 0x01)
mbed_official 49:77c8e4604045 96 p_TCB->stack[0] = MAGIC_WORD;
mbed_official 49:77c8e4604045 97 }
mbed_official 49:77c8e4604045 98
mbed_official 49:77c8e4604045 99
mbed_official 49:77c8e4604045 100 /*--------------------------- rt_ret_val ----------------------------------*/
mbed_official 49:77c8e4604045 101
mbed_official 49:77c8e4604045 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
mbed_official 49:77c8e4604045 103 /* Get pointer to task return value registers (R0..R3) in Stack */
mbed_official 49:77c8e4604045 104 #if (__TARGET_FPU_VFP)
mbed_official 49:77c8e4604045 105 if (p_TCB->stack_frame) {
mbed_official 49:77c8e4604045 106 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
mbed_official 49:77c8e4604045 107 return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
mbed_official 49:77c8e4604045 108 } else {
mbed_official 49:77c8e4604045 109 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
mbed_official 49:77c8e4604045 110 return (U32 *)(p_TCB->tsk_stack + 8*4);
mbed_official 49:77c8e4604045 111 }
mbed_official 49:77c8e4604045 112 #else
mbed_official 49:77c8e4604045 113 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
mbed_official 49:77c8e4604045 114 return (U32 *)(p_TCB->tsk_stack + 8*4);
mbed_official 49:77c8e4604045 115 #endif
mbed_official 49:77c8e4604045 116 }
mbed_official 49:77c8e4604045 117
mbed_official 49:77c8e4604045 118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
mbed_official 49:77c8e4604045 119 U32 *ret;
mbed_official 49:77c8e4604045 120
mbed_official 49:77c8e4604045 121 ret = rt_ret_regs(p_TCB);
mbed_official 49:77c8e4604045 122 ret[0] = v0;
mbed_official 49:77c8e4604045 123 }
mbed_official 49:77c8e4604045 124
mbed_official 49:77c8e4604045 125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
mbed_official 49:77c8e4604045 126 U32 *ret;
mbed_official 49:77c8e4604045 127
mbed_official 49:77c8e4604045 128 ret = rt_ret_regs(p_TCB);
mbed_official 49:77c8e4604045 129 ret[0] = v0;
mbed_official 49:77c8e4604045 130 ret[1] = v1;
mbed_official 49:77c8e4604045 131 }
mbed_official 49:77c8e4604045 132
mbed_official 49:77c8e4604045 133
mbed_official 49:77c8e4604045 134 /*--------------------------- dbg_init --------------------------------------*/
mbed_official 49:77c8e4604045 135
mbed_official 49:77c8e4604045 136 #ifdef DBG_MSG
mbed_official 49:77c8e4604045 137 void dbg_init (void) {
mbed_official 49:77c8e4604045 138 if ((DEMCR & DEMCR_TRCENA) &&
mbed_official 49:77c8e4604045 139 (ITM_CONTROL & ITM_ITMENA) &&
mbed_official 49:77c8e4604045 140 (ITM_ENABLE & (1UL << 31))) {
mbed_official 49:77c8e4604045 141 dbg_msg = __TRUE;
mbed_official 49:77c8e4604045 142 }
mbed_official 49:77c8e4604045 143 }
mbed_official 49:77c8e4604045 144 #endif
mbed_official 49:77c8e4604045 145
mbed_official 49:77c8e4604045 146 /*--------------------------- dbg_task_notify -------------------------------*/
mbed_official 49:77c8e4604045 147
mbed_official 49:77c8e4604045 148 #ifdef DBG_MSG
mbed_official 49:77c8e4604045 149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
mbed_official 49:77c8e4604045 150 while (ITM_PORT31_U32 == 0);
mbed_official 49:77c8e4604045 151 ITM_PORT31_U32 = (U32)p_tcb->ptask;
mbed_official 49:77c8e4604045 152 while (ITM_PORT31_U32 == 0);
mbed_official 49:77c8e4604045 153 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
mbed_official 49:77c8e4604045 154 }
mbed_official 49:77c8e4604045 155 #endif
mbed_official 49:77c8e4604045 156
mbed_official 49:77c8e4604045 157 /*--------------------------- dbg_task_switch -------------------------------*/
mbed_official 49:77c8e4604045 158
mbed_official 49:77c8e4604045 159 #ifdef DBG_MSG
mbed_official 49:77c8e4604045 160 void dbg_task_switch (U32 task_id) {
mbed_official 49:77c8e4604045 161 while (ITM_PORT31_U32 == 0);
mbed_official 49:77c8e4604045 162 ITM_PORT31_U8 = task_id;
mbed_official 49:77c8e4604045 163 }
mbed_official 49:77c8e4604045 164 #endif
mbed_official 49:77c8e4604045 165
mbed_official 49:77c8e4604045 166
mbed_official 49:77c8e4604045 167 /*----------------------------------------------------------------------------
mbed_official 49:77c8e4604045 168 * end of file
mbed_official 49:77c8e4604045 169 *---------------------------------------------------------------------------*/
mbed_official 49:77c8e4604045 170