Greg Steiert / pegasus_dev

Dependents:   blinky_max32630fthr

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /*******************************************************************************
switches 0:5c4d7b2438d3 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
switches 0:5c4d7b2438d3 3 *
switches 0:5c4d7b2438d3 4 * Permission is hereby granted, free of charge, to any person obtaining a
switches 0:5c4d7b2438d3 5 * copy of this software and associated documentation files (the "Software"),
switches 0:5c4d7b2438d3 6 * to deal in the Software without restriction, including without limitation
switches 0:5c4d7b2438d3 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
switches 0:5c4d7b2438d3 8 * and/or sell copies of the Software, and to permit persons to whom the
switches 0:5c4d7b2438d3 9 * Software is furnished to do so, subject to the following conditions:
switches 0:5c4d7b2438d3 10 *
switches 0:5c4d7b2438d3 11 * The above copyright notice and this permission notice shall be included
switches 0:5c4d7b2438d3 12 * in all copies or substantial portions of the Software.
switches 0:5c4d7b2438d3 13 *
switches 0:5c4d7b2438d3 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
switches 0:5c4d7b2438d3 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
switches 0:5c4d7b2438d3 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
switches 0:5c4d7b2438d3 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
switches 0:5c4d7b2438d3 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
switches 0:5c4d7b2438d3 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
switches 0:5c4d7b2438d3 20 * OTHER DEALINGS IN THE SOFTWARE.
switches 0:5c4d7b2438d3 21 *
switches 0:5c4d7b2438d3 22 * Except as contained in this notice, the name of Maxim Integrated
switches 0:5c4d7b2438d3 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
switches 0:5c4d7b2438d3 24 * Products, Inc. Branding Policy.
switches 0:5c4d7b2438d3 25 *
switches 0:5c4d7b2438d3 26 * The mere transfer of this software does not imply any licenses
switches 0:5c4d7b2438d3 27 * of trade secrets, proprietary technology, copyrights, patents,
switches 0:5c4d7b2438d3 28 * trademarks, maskwork rights, or any other form of intellectual
switches 0:5c4d7b2438d3 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
switches 0:5c4d7b2438d3 30 * ownership rights.
switches 0:5c4d7b2438d3 31 *******************************************************************************
switches 0:5c4d7b2438d3 32 */
switches 0:5c4d7b2438d3 33
switches 0:5c4d7b2438d3 34 #include "mbed_assert.h"
switches 0:5c4d7b2438d3 35 #include "analogin_api.h"
switches 0:5c4d7b2438d3 36 #include "clkman_regs.h"
switches 0:5c4d7b2438d3 37 #include "pwrman_regs.h"
switches 0:5c4d7b2438d3 38 #include "trim_regs.h"
switches 0:5c4d7b2438d3 39 #include "PeripheralPins.h"
switches 0:5c4d7b2438d3 40
switches 0:5c4d7b2438d3 41 #define PGA_TRK_CNT 0x1F
switches 0:5c4d7b2438d3 42 #define ADC_ACT_CNT 0x1
switches 0:5c4d7b2438d3 43 #define ADC_PGA_CNT 0x1
switches 0:5c4d7b2438d3 44 #define ADC_ACQ_CNT 0x1
switches 0:5c4d7b2438d3 45 #define ADC_SLP_CNT 0x1
switches 0:5c4d7b2438d3 46
switches 0:5c4d7b2438d3 47 #define ADC_FULL_SCALE 0x3FF
switches 0:5c4d7b2438d3 48 #define ADC_EXTERNAL_LAST_INPUT 3
switches 0:5c4d7b2438d3 49
switches 0:5c4d7b2438d3 50 // Only allow initialization once
switches 0:5c4d7b2438d3 51 static int initialized = 0;
switches 0:5c4d7b2438d3 52
switches 0:5c4d7b2438d3 53 //******************************************************************************
switches 0:5c4d7b2438d3 54 void analogin_init(analogin_t *obj, PinName pin)
switches 0:5c4d7b2438d3 55 {
switches 0:5c4d7b2438d3 56 // Make sure pin is an analog pin we can use for ADC
switches 0:5c4d7b2438d3 57 MBED_ASSERT((ADCName)pinmap_peripheral(pin, PinMap_ADC) != (ADCName)NC);
switches 0:5c4d7b2438d3 58
switches 0:5c4d7b2438d3 59 // Set the object pointer
switches 0:5c4d7b2438d3 60 obj->adc = MXC_ADC;
switches 0:5c4d7b2438d3 61 obj->adc_pin = pin;
switches 0:5c4d7b2438d3 62
switches 0:5c4d7b2438d3 63 if (initialized == 0) {
switches 0:5c4d7b2438d3 64 // Enable AFE power
switches 0:5c4d7b2438d3 65 MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED;
switches 0:5c4d7b2438d3 66
switches 0:5c4d7b2438d3 67 // Enable the clock
switches 0:5c4d7b2438d3 68 MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_ADC_CLOCK_ENABLE;
switches 0:5c4d7b2438d3 69
switches 0:5c4d7b2438d3 70 // Enable clock gate
switches 0:5c4d7b2438d3 71 MXC_CLKMAN->clk_gate_ctrl2 |= MXC_F_CLKMAN_CLK_GATE_CTRL2_ADC_CLK_GATER;
switches 0:5c4d7b2438d3 72
switches 0:5c4d7b2438d3 73 // Enable interface clock
switches 0:5c4d7b2438d3 74 obj->adc->ctrl |= MXC_F_ADC_CTRL_ADC_CLK_EN;
switches 0:5c4d7b2438d3 75
switches 0:5c4d7b2438d3 76 if ((MXC_TRIM->reg11_adc_trim0 == 0xFFFFFFFF) && (MXC_TRIM->reg12_adc_trim1 == 0xFFFFFFFF)) {
switches 0:5c4d7b2438d3 77 // Set default trim for untrimmed parts.
switches 0:5c4d7b2438d3 78 MXC_TRIM->reg11_adc_trim0 = 0x02000200;
switches 0:5c4d7b2438d3 79 MXC_TRIM->reg12_adc_trim1 = 0x02000200;
switches 0:5c4d7b2438d3 80 }
switches 0:5c4d7b2438d3 81
switches 0:5c4d7b2438d3 82 // Clear ADC ready interrupt (wite 1 to clr)
switches 0:5c4d7b2438d3 83 obj->adc->intr = (obj->adc->intr & 0xFFFF) | MXC_F_ADC_INTR_ADC_REF_READY_IF;
switches 0:5c4d7b2438d3 84
switches 0:5c4d7b2438d3 85 // Using internal reference of 1.20V
switches 0:5c4d7b2438d3 86
switches 0:5c4d7b2438d3 87 // Enable ADC power bypass the buffer
switches 0:5c4d7b2438d3 88 obj->adc->ctrl |= (MXC_F_ADC_CTRL_ADC_PU | MXC_F_ADC_CTRL_ADC_REFBUF_PU |
switches 0:5c4d7b2438d3 89 MXC_F_ADC_CTRL_ADC_CHGPUMP_PU | MXC_F_ADC_CTRL_BUF_BYPASS);
switches 0:5c4d7b2438d3 90
switches 0:5c4d7b2438d3 91 // Wait for ADC ready
switches 0:5c4d7b2438d3 92 while (!(obj->adc->intr & MXC_F_ADC_INTR_ADC_REF_READY_IF));
switches 0:5c4d7b2438d3 93
switches 0:5c4d7b2438d3 94 initialized = 1;
switches 0:5c4d7b2438d3 95 }
switches 0:5c4d7b2438d3 96 }
switches 0:5c4d7b2438d3 97
switches 0:5c4d7b2438d3 98 //******************************************************************************
switches 0:5c4d7b2438d3 99 float analogin_read(analogin_t *obj)
switches 0:5c4d7b2438d3 100 {
switches 0:5c4d7b2438d3 101 // Convert integer to float
switches 0:5c4d7b2438d3 102 return (((float)analogin_read_u16(obj)/(float)ADC_FULL_SCALE));
switches 0:5c4d7b2438d3 103 }
switches 0:5c4d7b2438d3 104
switches 0:5c4d7b2438d3 105 //******************************************************************************
switches 0:5c4d7b2438d3 106 uint16_t analogin_read_u16(analogin_t *obj)
switches 0:5c4d7b2438d3 107 {
switches 0:5c4d7b2438d3 108 // Set the pin to take readings from
switches 0:5c4d7b2438d3 109 uint32_t adc_input = PINNAME_TO_PIN(obj->adc_pin);
switches 0:5c4d7b2438d3 110
switches 0:5c4d7b2438d3 111 // Select the channel
switches 0:5c4d7b2438d3 112 obj->adc->ctrl &= ~MXC_F_ADC_CTRL_ADC_CHSEL;
switches 0:5c4d7b2438d3 113 obj->adc->ctrl |= (adc_input << MXC_F_ADC_CTRL_ADC_CHSEL_POS) & MXC_F_ADC_CTRL_ADC_CHSEL;
switches 0:5c4d7b2438d3 114
switches 0:5c4d7b2438d3 115 // We want unity gain, to get full 0-Vref range
switches 0:5c4d7b2438d3 116 // So, both ref and adc input scale should be enabled
switches 0:5c4d7b2438d3 117 obj->adc->ctrl |= MXC_F_ADC_CTRL_ADC_SCALE | MXC_F_ADC_CTRL_ADC_REFSCL;
switches 0:5c4d7b2438d3 118
switches 0:5c4d7b2438d3 119 // Not using internal buffer, disable anyway
switches 0:5c4d7b2438d3 120 obj->adc->ctrl &= ~MXC_F_ADC_CTRL_BUF_PU;
switches 0:5c4d7b2438d3 121 obj->adc->ctrl |= MXC_F_ADC_CTRL_BUF_BYPASS;
switches 0:5c4d7b2438d3 122
switches 0:5c4d7b2438d3 123 // Normal LSB justified data alignment
switches 0:5c4d7b2438d3 124
switches 0:5c4d7b2438d3 125 // Not using limits
switches 0:5c4d7b2438d3 126
switches 0:5c4d7b2438d3 127 // Clear ADC done flag (wite 1 to clr)
switches 0:5c4d7b2438d3 128 obj->adc->intr = (obj->adc->intr & 0xFFFF) | MXC_F_ADC_INTR_ADC_DONE_IF;
switches 0:5c4d7b2438d3 129
switches 0:5c4d7b2438d3 130 // Start the conversion
switches 0:5c4d7b2438d3 131 obj->adc->ctrl |= MXC_F_ADC_CTRL_CPU_ADC_START;
switches 0:5c4d7b2438d3 132
switches 0:5c4d7b2438d3 133 // Wait for ADC done
switches 0:5c4d7b2438d3 134 while (!(obj->adc->intr & MXC_F_ADC_INTR_ADC_DONE_IF));
switches 0:5c4d7b2438d3 135
switches 0:5c4d7b2438d3 136 // Get sample from the fifo
switches 0:5c4d7b2438d3 137 uint16_t sample = obj->adc->data;
switches 0:5c4d7b2438d3 138
switches 0:5c4d7b2438d3 139 // Check for overflow, hardware will report overflow as 0
switches 0:5c4d7b2438d3 140 if (obj->adc->status & MXC_F_ADC_STATUS_ADC_OVERFLOW) {
switches 0:5c4d7b2438d3 141 sample = (uint16_t)ADC_FULL_SCALE;
switches 0:5c4d7b2438d3 142 }
switches 0:5c4d7b2438d3 143
switches 0:5c4d7b2438d3 144 return sample;
switches 0:5c4d7b2438d3 145 }