Greg Steiert / pegasus_dev

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Dependents:   blinky_max32630fthr

targets/TARGET_Maxim/TARGET_MAX32630/mxc/pmu.h@0:5c4d7b2438d3, 2016-11-11 (annotated)

Committer:
switches
Date:
Fri Nov 11 20:59:50 2016 +0000
Revision:
0:5c4d7b2438d3
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /**
switches 0:5c4d7b2438d3 2 * @file
switches 0:5c4d7b2438d3 3 * @brief Registers, Bit Masks and Bit Positions for the PMU module.
switches 0:5c4d7b2438d3 4 */
switches 0:5c4d7b2438d3 5 /* ****************************************************************************
switches 0:5c4d7b2438d3 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
switches 0:5c4d7b2438d3 7 *
switches 0:5c4d7b2438d3 8 * Permission is hereby granted, free of charge, to any person obtaining a
switches 0:5c4d7b2438d3 9 * copy of this software and associated documentation files (the "Software"),
switches 0:5c4d7b2438d3 10 * to deal in the Software without restriction, including without limitation
switches 0:5c4d7b2438d3 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
switches 0:5c4d7b2438d3 12 * and/or sell copies of the Software, and to permit persons to whom the
switches 0:5c4d7b2438d3 13 * Software is furnished to do so, subject to the following conditions:
switches 0:5c4d7b2438d3 14 *
switches 0:5c4d7b2438d3 15 * The above copyright notice and this permission notice shall be included
switches 0:5c4d7b2438d3 16 * in all copies or substantial portions of the Software.
switches 0:5c4d7b2438d3 17 *
switches 0:5c4d7b2438d3 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
switches 0:5c4d7b2438d3 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
switches 0:5c4d7b2438d3 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
switches 0:5c4d7b2438d3 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
switches 0:5c4d7b2438d3 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
switches 0:5c4d7b2438d3 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
switches 0:5c4d7b2438d3 24 * OTHER DEALINGS IN THE SOFTWARE.
switches 0:5c4d7b2438d3 25 *
switches 0:5c4d7b2438d3 26 * Except as contained in this notice, the name of Maxim Integrated
switches 0:5c4d7b2438d3 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
switches 0:5c4d7b2438d3 28 * Products, Inc. Branding Policy.
switches 0:5c4d7b2438d3 29 *
switches 0:5c4d7b2438d3 30 * The mere transfer of this software does not imply any licenses
switches 0:5c4d7b2438d3 31 * of trade secrets, proprietary technology, copyrights, patents,
switches 0:5c4d7b2438d3 32 * trademarks, maskwork rights, or any other form of intellectual
switches 0:5c4d7b2438d3 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
switches 0:5c4d7b2438d3 34 * ownership rights.
switches 0:5c4d7b2438d3 35 *
switches 0:5c4d7b2438d3 36 * $Date: 2016-10-10 19:24:21 -0500 (Mon, 10 Oct 2016) $
switches 0:5c4d7b2438d3 37 * $Revision: 24667 $
switches 0:5c4d7b2438d3 38 *
switches 0:5c4d7b2438d3 39 **************************************************************************** */
switches 0:5c4d7b2438d3 40
switches 0:5c4d7b2438d3 41 /* Define to prevent redundant inclusion */
switches 0:5c4d7b2438d3 42 #ifndef _PMU_H_
switches 0:5c4d7b2438d3 43 #define _PMU_H_
switches 0:5c4d7b2438d3 44
switches 0:5c4d7b2438d3 45 /* **** Includes **** */
switches 0:5c4d7b2438d3 46 #include "pmu_regs.h"
switches 0:5c4d7b2438d3 47
switches 0:5c4d7b2438d3 48 #ifdef __cplusplus
switches 0:5c4d7b2438d3 49 extern "C" {
switches 0:5c4d7b2438d3 50 #endif
switches 0:5c4d7b2438d3 51
switches 0:5c4d7b2438d3 52 /**
switches 0:5c4d7b2438d3 53 * @ingroup periphlibs
switches 0:5c4d7b2438d3 54 * @defgroup pmuGroup Peripheral Management Unit
switches 0:5c4d7b2438d3 55 * @brief Peripheral Management Unit (PMU) Interface.
switches 0:5c4d7b2438d3 56 * @{
switches 0:5c4d7b2438d3 57 */
switches 0:5c4d7b2438d3 58
switches 0:5c4d7b2438d3 59 /**
switches 0:5c4d7b2438d3 60 * Enum type for the clock scale used for the PMU timeout clock.
switches 0:5c4d7b2438d3 61 */
switches 0:5c4d7b2438d3 62 typedef enum {
switches 0:5c4d7b2438d3 63 PMU_PS_SEL_DISABLE = MXC_V_PMU_CFG_PS_SEL_DISABLE, /**< Timeout disabled */
switches 0:5c4d7b2438d3 64 PMU_PS_SEL_DIV_2_8 = MXC_V_PMU_CFG_PS_SEL_DIV_2_8, /**< Timeout clk = PMU clock / 2^8 = 256 */
switches 0:5c4d7b2438d3 65 PMU_PS_SEL_DIV_2_16 = MXC_V_PMU_CFG_PS_SEL_DIV_2_16, /**< Timeout clk = PMU clock / 2^16 = 65536 */
switches 0:5c4d7b2438d3 66 PMU_PS_SEL_DIV_2_24 = MXC_V_PMU_CFG_PS_SEL_DIV_2_24 /**< Timeout clk = PMU clock / 2^24 = 16777216 */
switches 0:5c4d7b2438d3 67 }pmu_ps_sel_t;
switches 0:5c4d7b2438d3 68
switches 0:5c4d7b2438d3 69 /**
switches 0:5c4d7b2438d3 70 * Enumeration type for the number of clk ticks for the timeout duration.
switches 0:5c4d7b2438d3 71 */
switches 0:5c4d7b2438d3 72 typedef enum {
switches 0:5c4d7b2438d3 73 PMU_TO_SEL_TICKS_4 = MXC_V_PMU_CFG_TO_SEL_TICKS_4, /**< timeout = 4 * Timeout clk period */
switches 0:5c4d7b2438d3 74 PMU_TO_SEL_TICKS_8 = MXC_V_PMU_CFG_TO_SEL_TICKS_8, /**< timeout = 8 * Timeout clk period */
switches 0:5c4d7b2438d3 75 PMU_TO_SEL_TICKS_16 = MXC_V_PMU_CFG_TO_SEL_TICKS_16, /**< timeout = 16 * Timeout clk period */
switches 0:5c4d7b2438d3 76 PMU_TO_SEL_TICKS_32 = MXC_V_PMU_CFG_TO_SEL_TICKS_32, /**< timeout = 32 * Timeout clk period */
switches 0:5c4d7b2438d3 77 PMU_TO_SEL_TICKS_64 = MXC_V_PMU_CFG_TO_SEL_TICKS_64, /**< timeout = 64 * Timeout clk period */
switches 0:5c4d7b2438d3 78 PMU_TO_SEL_TICKS_128 = MXC_V_PMU_CFG_TO_SEL_TICKS_128, /**< timeout = 128 * Timeout clk period */
switches 0:5c4d7b2438d3 79 PMU_TO_SEL_TICKS_256 = MXC_V_PMU_CFG_TO_SEL_TICKS_256, /**< timeout = 256 * Timeout clk period */
switches 0:5c4d7b2438d3 80 PMU_TO_SEL_TICKS_512 = MXC_V_PMU_CFG_TO_SEL_TICKS_512 /**< timeout = 512 * Timeout clk period */
switches 0:5c4d7b2438d3 81 }pmu_to_sel_t;
switches 0:5c4d7b2438d3 82
switches 0:5c4d7b2438d3 83 /*
switches 0:5c4d7b2438d3 84 * The macros like the one below are designed to help build static PMU programs
switches 0:5c4d7b2438d3 85 * as arrays of 32bit words.
switches 0:5c4d7b2438d3 86 */
switches 0:5c4d7b2438d3 87 #define PMU_IS(interrupt, stop) ((!!interrupt) << PMU_INT_POS) | ((!!stop) << PMU_STOP_POS)
switches 0:5c4d7b2438d3 88 /*
switches 0:5c4d7b2438d3 89 * Structure type to build a PMU Move Op Code.
switches 0:5c4d7b2438d3 90 */
switches 0:5c4d7b2438d3 91 typedef struct pmu_move_des_t {
switches 0:5c4d7b2438d3 92 uint32_t op_code : 3; /* 0x0 */
switches 0:5c4d7b2438d3 93 uint32_t interrupt : 1;
switches 0:5c4d7b2438d3 94 uint32_t stop : 1;
switches 0:5c4d7b2438d3 95 uint32_t read_size : 2;
switches 0:5c4d7b2438d3 96 uint32_t read_inc : 1;
switches 0:5c4d7b2438d3 97 uint32_t write_size : 2;
switches 0:5c4d7b2438d3 98 uint32_t write_inc : 1;
switches 0:5c4d7b2438d3 99 uint32_t cont : 1;
switches 0:5c4d7b2438d3 100 uint32_t length : 20;
switches 0:5c4d7b2438d3 101
switches 0:5c4d7b2438d3 102 uint32_t write_address;
switches 0:5c4d7b2438d3 103 uint32_t read_address;
switches 0:5c4d7b2438d3 104 } pmu_move_des_t;
switches 0:5c4d7b2438d3 105 #define PMU_MOVE(i, s, rs, ri, ws, wi, c, length, wa, ra) \
switches 0:5c4d7b2438d3 106 (PMU_MOVE_OP | PMU_IS(i,s) | ((rs & 3) << PMU_MOVE_READS_POS) | ((!!ri) << PMU_MOVE_READI_POS) | \
switches 0:5c4d7b2438d3 107 ((ws & 3) << PMU_MOVE_WRITES_POS) | ((!!wi) << PMU_MOVE_WRITEI_POS) | ((!!c) << PMU_MOVE_CONT_POS) | ((length & 0xFFFFF) << PMU_MOVE_LEN_POS)), wa, ra
switches 0:5c4d7b2438d3 108
switches 0:5c4d7b2438d3 109 /* new_value = value | (old_value & ~ mask) */
switches 0:5c4d7b2438d3 110 typedef struct pmu_write_des_t {
switches 0:5c4d7b2438d3 111 uint32_t op_code : 3; /* 0x1 */
switches 0:5c4d7b2438d3 112 uint32_t interrupt : 1;
switches 0:5c4d7b2438d3 113 uint32_t stop : 1;
switches 0:5c4d7b2438d3 114 uint32_t : 3;
switches 0:5c4d7b2438d3 115 uint32_t write_method : 4;
switches 0:5c4d7b2438d3 116 uint32_t : 20;
switches 0:5c4d7b2438d3 117
switches 0:5c4d7b2438d3 118 uint32_t write_address;
switches 0:5c4d7b2438d3 119 uint32_t value;
switches 0:5c4d7b2438d3 120 uint32_t mask;
switches 0:5c4d7b2438d3 121 } pmu_write_des_t;
switches 0:5c4d7b2438d3 122 #define PMU_WRITE(i, s, wm, a, v, m) (PMU_WRITE_OP | PMU_IS(i,s) | ((wm & 0xF) << PMU_WRITE_METHOD_POS)), a, v, m
switches 0:5c4d7b2438d3 123
switches 0:5c4d7b2438d3 124 typedef struct pmu_wait_des_t {
switches 0:5c4d7b2438d3 125 uint32_t op_code : 3; /* 0x2 */
switches 0:5c4d7b2438d3 126 uint32_t interrupt : 1;
switches 0:5c4d7b2438d3 127 uint32_t stop : 1;
switches 0:5c4d7b2438d3 128 uint32_t wait : 1;
switches 0:5c4d7b2438d3 129 uint32_t sel : 1;
switches 0:5c4d7b2438d3 130 uint32_t : 25;
switches 0:5c4d7b2438d3 131
switches 0:5c4d7b2438d3 132 uint32_t mask1;
switches 0:5c4d7b2438d3 133 uint32_t mask2;
switches 0:5c4d7b2438d3 134 uint32_t wait_count;
switches 0:5c4d7b2438d3 135 } pmu_wait_des_t;
switches 0:5c4d7b2438d3 136 #define PMU_WAIT(i, s, sel, m1, m2, cnt) (PMU_WAIT_OP | PMU_IS(i,s) | ((cnt>0)?(1<<PMU_WAIT_WAIT_POS):0) | ((!!sel) << PMU_WAIT_SEL_POS)), \
switches 0:5c4d7b2438d3 137 m1, m2, cnt
switches 0:5c4d7b2438d3 138
switches 0:5c4d7b2438d3 139 typedef struct pmu_jump_des_t {
switches 0:5c4d7b2438d3 140 uint32_t op_code : 3; /* 0x3 */
switches 0:5c4d7b2438d3 141 uint32_t interrupt : 1;
switches 0:5c4d7b2438d3 142 uint32_t stop : 1;
switches 0:5c4d7b2438d3 143 uint32_t : 27;
switches 0:5c4d7b2438d3 144
switches 0:5c4d7b2438d3 145 uint32_t address;
switches 0:5c4d7b2438d3 146 } pmu_jump_des_t;
switches 0:5c4d7b2438d3 147 #define PMU_JUMP(i, s, a) (PMU_JUMP_OP | PMU_IS(i,s)), a
switches 0:5c4d7b2438d3 148
switches 0:5c4d7b2438d3 149 typedef struct pmu_loop_des_t {
switches 0:5c4d7b2438d3 150 uint32_t op_code : 3; /* 0x4 */
switches 0:5c4d7b2438d3 151 uint32_t interrupt : 1;
switches 0:5c4d7b2438d3 152 uint32_t stop : 1;
switches 0:5c4d7b2438d3 153 uint32_t sel_counter : 1;
switches 0:5c4d7b2438d3 154 uint32_t : 26;
switches 0:5c4d7b2438d3 155
switches 0:5c4d7b2438d3 156 uint32_t address;
switches 0:5c4d7b2438d3 157 } pmu_loop_des_t;
switches 0:5c4d7b2438d3 158 #define PMU_LOOP(i, s, c, a) (PMU_LOOP_OP | PMU_IS(i,s) | ((!!c) << PMU_LOOP_SEL_COUNTER_POS)), a
switches 0:5c4d7b2438d3 159
switches 0:5c4d7b2438d3 160 typedef struct pmu_poll_des_t {
switches 0:5c4d7b2438d3 161 uint32_t op_code : 3; /* 0x5 */
switches 0:5c4d7b2438d3 162 uint32_t interrupt : 1;
switches 0:5c4d7b2438d3 163 uint32_t stop : 1;
switches 0:5c4d7b2438d3 164 uint32_t : 2;
switches 0:5c4d7b2438d3 165 uint32_t and : 1;
switches 0:5c4d7b2438d3 166 uint32_t : 24;
switches 0:5c4d7b2438d3 167
switches 0:5c4d7b2438d3 168 uint32_t poll_addr;
switches 0:5c4d7b2438d3 169 uint32_t data;
switches 0:5c4d7b2438d3 170 uint32_t mask;
switches 0:5c4d7b2438d3 171 uint32_t poll_interval;
switches 0:5c4d7b2438d3 172 } pmu_poll_des_t;
switches 0:5c4d7b2438d3 173 #define PMU_POLL(i, s, a, adr, d, m, per) (PMU_POLL_OP | PMU_IS(i,s) | ((!!a) << PMU_POLL_AND_POS)), adr, d, m, per
switches 0:5c4d7b2438d3 174
switches 0:5c4d7b2438d3 175 typedef struct pmu_branch_des_t {
switches 0:5c4d7b2438d3 176 uint32_t op_code : 3; /* 0x6 */
switches 0:5c4d7b2438d3 177 uint32_t interrupt : 1;
switches 0:5c4d7b2438d3 178 uint32_t stop : 1;
switches 0:5c4d7b2438d3 179 uint32_t : 2;
switches 0:5c4d7b2438d3 180 uint32_t and : 1;
switches 0:5c4d7b2438d3 181 uint32_t type : 3;
switches 0:5c4d7b2438d3 182 uint32_t : 21;
switches 0:5c4d7b2438d3 183
switches 0:5c4d7b2438d3 184 uint32_t poll_addr;
switches 0:5c4d7b2438d3 185 uint32_t data;
switches 0:5c4d7b2438d3 186 uint32_t mask;
switches 0:5c4d7b2438d3 187 uint32_t address;
switches 0:5c4d7b2438d3 188 } pmu_branch_des_t;
switches 0:5c4d7b2438d3 189 #define PMU_BRANCH(i, s, a, t, adr, d, m, badr) \
switches 0:5c4d7b2438d3 190 (PMU_BRANCH_OP | PMU_IS(i,s) | ((!!a) << PMU_BRANCH_AND_POS)| ((t & 7) << PMU_BRANCH_TYPE_POS)), adr, d, m, badr
switches 0:5c4d7b2438d3 191
switches 0:5c4d7b2438d3 192 typedef struct pmu_transfer_des_t {
switches 0:5c4d7b2438d3 193 uint32_t op_code : 3; /* 0x7 */
switches 0:5c4d7b2438d3 194 uint32_t interrupt : 1;
switches 0:5c4d7b2438d3 195 uint32_t stop : 1;
switches 0:5c4d7b2438d3 196 uint32_t read_size : 2;
switches 0:5c4d7b2438d3 197 uint32_t read_inc : 1;
switches 0:5c4d7b2438d3 198 uint32_t write_size : 2;
switches 0:5c4d7b2438d3 199 uint32_t write_inc : 1;
switches 0:5c4d7b2438d3 200 uint32_t : 1;
switches 0:5c4d7b2438d3 201 uint32_t tx_length : 20;
switches 0:5c4d7b2438d3 202
switches 0:5c4d7b2438d3 203 uint32_t write_address;
switches 0:5c4d7b2438d3 204 uint32_t read_address;
switches 0:5c4d7b2438d3 205
switches 0:5c4d7b2438d3 206 uint32_t int_mask : 25; /* valid int_mask is from 0 - 24 */
switches 0:5c4d7b2438d3 207 uint32_t : 1;
switches 0:5c4d7b2438d3 208 uint32_t burst_size : 6;
switches 0:5c4d7b2438d3 209 } pmu_transfer_des_t;
switches 0:5c4d7b2438d3 210 #define PMU_TRANSFER(i, s, rs, ri, ws, wi, l, wa, ra, imsk, b) \
switches 0:5c4d7b2438d3 211 (PMU_TRANSFER_OP | PMU_IS(i,s) | ((rs & 3) << PMU_TX_READS_POS) | ((!!ri) << PMU_TX_READI_POS) | \
switches 0:5c4d7b2438d3 212 ((ws & 3) << PMU_TX_WRITES_POS) | ((!!wi) << PMU_TX_WRITEI_POS) | ((l & 0xFFFFF) << PMU_TX_LEN_POS)), wa, ra, \
switches 0:5c4d7b2438d3 213 ((imsk) | ((b & 0x3F) << PMU_TX_BS_POS))
switches 0:5c4d7b2438d3 214 /**
switches 0:5c4d7b2438d3 215 * Callback function type for the PMU.
switches 0:5c4d7b2438d3 216 * @details The callback function signature is:
switches 0:5c4d7b2438d3 217 * @code
switches 0:5c4d7b2438d3 218 * void callback(int status);
switches 0:5c4d7b2438d3 219 * @endcode
switches 0:5c4d7b2438d3 220 * @p pmu_status - The callback function argument is a status bit
switches 0:5c4d7b2438d3 221 * indicating the status of the PMU program. The callback function
switches 0:5c4d7b2438d3 222 * will be called for every opcode that has the interrupt bit set.
switches 0:5c4d7b2438d3 223 * If NULL, the channel interrupt will not be enabled.
switches 0:5c4d7b2438d3 224 */
switches 0:5c4d7b2438d3 225 typedef void (*pmu_callback)(int pmu_status);
switches 0:5c4d7b2438d3 226
switches 0:5c4d7b2438d3 227 /**
switches 0:5c4d7b2438d3 228 * @brief Start a PMU program on a channel
switches 0:5c4d7b2438d3 229 *
switches 0:5c4d7b2438d3 230 * @param[in] channel The channel number to start the PMU program.
switches 0:5c4d7b2438d3 231 * @param[in] program_address A pointer to the first opcode of the PMU program.
switches 0:5c4d7b2438d3 232 * @param[in] callback A pointer to the callback function or NULL. See pmu_callback() for details.
switches 0:5c4d7b2438d3 233 *
switches 0:5c4d7b2438d3 234 * @return #E_NO_ERROR if everything is successful, error if unsuccessful.
switches 0:5c4d7b2438d3 235 */
switches 0:5c4d7b2438d3 236 int PMU_Start(unsigned int channel, const void *program_address, pmu_callback callback);
switches 0:5c4d7b2438d3 237
switches 0:5c4d7b2438d3 238 /**
switches 0:5c4d7b2438d3 239 * @brief Set a loop counter value on a channel
switches 0:5c4d7b2438d3 240 * @param channel Channel number to set the value on
switches 0:5c4d7b2438d3 241 * @param counter_num Counter number for the channel (0 or 1)
switches 0:5c4d7b2438d3 242 * @param value Loop count value
switches 0:5c4d7b2438d3 243 * @returns #E_NO_ERROR if everything is successful, error if unsuccessful.
switches 0:5c4d7b2438d3 244 */
switches 0:5c4d7b2438d3 245 int PMU_SetCounter(unsigned int channel, unsigned int counter_num, uint16_t value);
switches 0:5c4d7b2438d3 246
switches 0:5c4d7b2438d3 247 /**
switches 0:5c4d7b2438d3 248 * @brief Stop a running channel. This will clear the enable bit on the channel
switches 0:5c4d7b2438d3 249 * and stop the running PMU program at the current opcode. The callback
switches 0:5c4d7b2438d3 250 * function is not called.
switches 0:5c4d7b2438d3 251 * @param channel Channel to stop
switches 0:5c4d7b2438d3 252 */
switches 0:5c4d7b2438d3 253 void PMU_Stop(unsigned int channel);
switches 0:5c4d7b2438d3 254
switches 0:5c4d7b2438d3 255 /**
switches 0:5c4d7b2438d3 256 * @brief Function to handle PMU interrupts. This function can be called from
switches 0:5c4d7b2438d3 257 * the PMU interrupt service routine, or periodically from the
switches 0:5c4d7b2438d3 258 * application if interrupts are not enabled.
switches 0:5c4d7b2438d3 259 */
switches 0:5c4d7b2438d3 260 void PMU_Handler(void);
switches 0:5c4d7b2438d3 261
switches 0:5c4d7b2438d3 262 /**
switches 0:5c4d7b2438d3 263 * @brief Set the AHB bus operation timeout on a channel
switches 0:5c4d7b2438d3 264 * @param channel Selected PMU channel
switches 0:5c4d7b2438d3 265 * @param timeoutClkScale Clk scale use for timeout clk
switches 0:5c4d7b2438d3 266 * @param timeoutTicks Number of ticks for timeout duration
switches 0:5c4d7b2438d3 267 * @returns #E_NO_ERROR if everything is successful, error if unsuccessful.
switches 0:5c4d7b2438d3 268 */
switches 0:5c4d7b2438d3 269 int PMU_SetTimeout(unsigned int channel, pmu_ps_sel_t timeoutClkScale, pmu_to_sel_t timeoutTicks);
switches 0:5c4d7b2438d3 270
switches 0:5c4d7b2438d3 271 /**
switches 0:5c4d7b2438d3 272 * @brief Gets the PMU channel's flags
switches 0:5c4d7b2438d3 273 * @param channel Selected PMU channel
switches 0:5c4d7b2438d3 274 * @return 0 = flags not set, non-zero = flags
switches 0:5c4d7b2438d3 275 */
switches 0:5c4d7b2438d3 276 uint32_t PMU_GetFlags(unsigned int channel);
switches 0:5c4d7b2438d3 277
switches 0:5c4d7b2438d3 278 /**
switches 0:5c4d7b2438d3 279 * @brief Clear the PMU channel's flags based on the mask
switches 0:5c4d7b2438d3 280 * @param channel Selected PMU channel
switches 0:5c4d7b2438d3 281 * @param mask bits of the flags to clear
switches 0:5c4d7b2438d3 282 */
switches 0:5c4d7b2438d3 283 void PMU_ClearFlags(unsigned int channel, unsigned int mask);
switches 0:5c4d7b2438d3 284
switches 0:5c4d7b2438d3 285 /**
switches 0:5c4d7b2438d3 286 * @brief Determines if the PMU channel is running
switches 0:5c4d7b2438d3 287 * @param channel Selected PMU channel
switches 0:5c4d7b2438d3 288 * @return 0 - channel is off
switches 0:5c4d7b2438d3 289 * @return non-zero = channel is running
switches 0:5c4d7b2438d3 290 */
switches 0:5c4d7b2438d3 291 uint32_t PMU_IsActive(unsigned int channel);
switches 0:5c4d7b2438d3 292
switches 0:5c4d7b2438d3 293 /**@} end of group pmuGroup*/
switches 0:5c4d7b2438d3 294
switches 0:5c4d7b2438d3 295 #ifdef __cplusplus
switches 0:5c4d7b2438d3 296 }
switches 0:5c4d7b2438d3 297 #endif
switches 0:5c4d7b2438d3 298
switches 0:5c4d7b2438d3 299 #endif /* _PMU_H_ */