Greg Steiert / pegasus_dev

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Dependents:   blinky_max32630fthr

targets/TARGET_Maxim/TARGET_MAX32630/mxc/spim.h@3:1198227e6421, 2016-12-16 (annotated)

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3 
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /**
switches 0:5c4d7b2438d3 2 * @file
switches 0:5c4d7b2438d3 3 * @brief Registers, Bit Masks and Bit Positions for the SPI Master module.
switches 0:5c4d7b2438d3 4 */
switches 0:5c4d7b2438d3 5 /* ****************************************************************************
switches 0:5c4d7b2438d3 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
switches 0:5c4d7b2438d3 7 *
switches 0:5c4d7b2438d3 8 * Permission is hereby granted, free of charge, to any person obtaining a
switches 0:5c4d7b2438d3 9 * copy of this software and associated documentation files (the "Software"),
switches 0:5c4d7b2438d3 10 * to deal in the Software without restriction, including without limitation
switches 0:5c4d7b2438d3 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
switches 0:5c4d7b2438d3 12 * and/or sell copies of the Software, and to permit persons to whom the
switches 0:5c4d7b2438d3 13 * Software is furnished to do so, subject to the following conditions:
switches 0:5c4d7b2438d3 14 *
switches 0:5c4d7b2438d3 15 * The above copyright notice and this permission notice shall be included
switches 0:5c4d7b2438d3 16 * in all copies or substantial portions of the Software.
switches 0:5c4d7b2438d3 17 *
switches 0:5c4d7b2438d3 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
switches 0:5c4d7b2438d3 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
switches 0:5c4d7b2438d3 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
switches 0:5c4d7b2438d3 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
switches 0:5c4d7b2438d3 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
switches 0:5c4d7b2438d3 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
switches 0:5c4d7b2438d3 24 * OTHER DEALINGS IN THE SOFTWARE.
switches 0:5c4d7b2438d3 25 *
switches 0:5c4d7b2438d3 26 * Except as contained in this notice, the name of Maxim Integrated
switches 0:5c4d7b2438d3 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
switches 0:5c4d7b2438d3 28 * Products, Inc. Branding Policy.
switches 0:5c4d7b2438d3 29 *
switches 0:5c4d7b2438d3 30 * The mere transfer of this software does not imply any licenses
switches 0:5c4d7b2438d3 31 * of trade secrets, proprietary technology, copyrights, patents,
switches 0:5c4d7b2438d3 32 * trademarks, maskwork rights, or any other form of intellectual
switches 0:5c4d7b2438d3 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
switches 0:5c4d7b2438d3 34 * ownership rights.
switches 0:5c4d7b2438d3 35 *
switches 0:5c4d7b2438d3 36 * $Date: 2016-10-10 19:42:44 -0500 (Mon, 10 Oct 2016) $
switches 0:5c4d7b2438d3 37 * $Revision: 24672 $
switches 0:5c4d7b2438d3 38 *
switches 0:5c4d7b2438d3 39 **************************************************************************** */
switches 0:5c4d7b2438d3 40
switches 0:5c4d7b2438d3 41 /* **** Includes **** */
switches 0:5c4d7b2438d3 42 #include "mxc_config.h"
switches 0:5c4d7b2438d3 43 #include "mxc_sys.h"
switches 0:5c4d7b2438d3 44 #include "spim_regs.h"
switches 0:5c4d7b2438d3 45
switches 0:5c4d7b2438d3 46 /* Define to prevent redundant inclusion */
switches 0:5c4d7b2438d3 47 #ifndef _SPIM_H_
switches 0:5c4d7b2438d3 48 #define _SPIM_H_
switches 0:5c4d7b2438d3 49
switches 0:5c4d7b2438d3 50 #ifdef __cplusplus
switches 0:5c4d7b2438d3 51 extern "C" {
switches 0:5c4d7b2438d3 52 #endif
switches 0:5c4d7b2438d3 53 /**
switches 0:5c4d7b2438d3 54 * @ingroup commperipherals
switches 0:5c4d7b2438d3 55 * @defgroup spi_comm SPI
switches 0:5c4d7b2438d3 56 * @brief SPI Master and Slave Communication Peripherals
switches 0:5c4d7b2438d3 57 */
switches 0:5c4d7b2438d3 58
switches 0:5c4d7b2438d3 59 /**
switches 0:5c4d7b2438d3 60 * @ingroup spi_comm
switches 0:5c4d7b2438d3 61 * @defgroup spim SPI Master
switches 0:5c4d7b2438d3 62 * @brief Serial Peripheral Interface Master (SPIM) Communications
switches 0:5c4d7b2438d3 63 * Interface.
switches 0:5c4d7b2438d3 64 * @{
switches 0:5c4d7b2438d3 65 */
switches 0:5c4d7b2438d3 66
switches 0:5c4d7b2438d3 67 /* **** Definitions **** */
switches 0:5c4d7b2438d3 68
switches 0:5c4d7b2438d3 69 /**
switches 0:5c4d7b2438d3 70 * Enumeration type for selecting the active levels for the SPI Master Slave Select (SS) lines.
switches 0:5c4d7b2438d3 71 */
switches 0:5c4d7b2438d3 72 typedef enum {
switches 0:5c4d7b2438d3 73 SPIM_SSEL0_HIGH = (0x1 << 0), /**< Slave Select 0 High. */
switches 0:5c4d7b2438d3 74 SPIM_SSEL0_LOW = 0, /**< Slave Select 0 Low. */
switches 0:5c4d7b2438d3 75 SPIM_SSEL1_HIGH = (0x1 << 1), /**< Slave Select 1 High. */
switches 0:5c4d7b2438d3 76 SPIM_SSEL1_LOW = 0, /**< Slave Select 1 Low. */
switches 0:5c4d7b2438d3 77 SPIM_SSEL2_HIGH = (0x1 << 2), /**< Slave Select 2 High. */
switches 0:5c4d7b2438d3 78 SPIM_SSEL2_LOW = 0, /**< Slave Select 2 Low. */
switches 0:5c4d7b2438d3 79 SPIM_SSEL3_HIGH = (0x1 << 3), /**< Slave Select 3 High. */
switches 0:5c4d7b2438d3 80 SPIM_SSEL3_LOW = 0, /**< Slave Select 3 Low. */
switches 0:5c4d7b2438d3 81 SPIM_SSEL4_HIGH = (0x1 << 4), /**< Slave Select 4 High. */
switches 0:5c4d7b2438d3 82 SPIM_SSEL4_LOW = 0 /**< Slave Select 4 Low. */
switches 0:5c4d7b2438d3 83 }
switches 0:5c4d7b2438d3 84 spim_ssel_t;
switches 0:5c4d7b2438d3 85
switches 0:5c4d7b2438d3 86 /**
switches 0:5c4d7b2438d3 87 * Enumeration type for setting the number data lines to use for communication.
switches 0:5c4d7b2438d3 88 */
switches 0:5c4d7b2438d3 89 typedef enum {
switches 0:5c4d7b2438d3 90 SPIM_WIDTH_1 = 0, /**< 1 Data Line. */
switches 0:5c4d7b2438d3 91 SPIM_WIDTH_2 = 1, /**< 2 Data Lines (x2). */
switches 0:5c4d7b2438d3 92 SPIM_WIDTH_4 = 2 /**< 4 Data Lines (x4). */
switches 0:5c4d7b2438d3 93 } spim_width_t;
switches 0:5c4d7b2438d3 94
switches 0:5c4d7b2438d3 95 /**
switches 0:5c4d7b2438d3 96 * Structure type for configuring a SPIM port.
switches 0:5c4d7b2438d3 97 */
switches 0:5c4d7b2438d3 98 typedef struct {
switches 0:5c4d7b2438d3 99 uint8_t mode; /**< SPIM mode selection, 0 to 3. */
switches 0:5c4d7b2438d3 100 uint32_t ssel_pol; /**< Mask of active levels for the slave select signals, see #spim_ssel_t. */
switches 0:5c4d7b2438d3 101 uint32_t baud; /**< Baud rate in Hz. */
switches 0:5c4d7b2438d3 102 } spim_cfg_t;
switches 0:5c4d7b2438d3 103
switches 0:5c4d7b2438d3 104 /**
switches 0:5c4d7b2438d3 105 * Structure type representing a SPI Master Transaction request.
switches 0:5c4d7b2438d3 106 */
switches 0:5c4d7b2438d3 107 typedef struct spim_req spim_req_t;
switches 0:5c4d7b2438d3 108
switches 0:5c4d7b2438d3 109 /**
switches 0:5c4d7b2438d3 110 * @brief Callback function type used in asynchromous SPIM communications requests.
switches 0:5c4d7b2438d3 111 * @details The function declaration for the SPIM callback is:
switches 0:5c4d7b2438d3 112 * @code
switches 0:5c4d7b2438d3 113 * void callback(spim_req_t * req, int error_code);
switches 0:5c4d7b2438d3 114 * @endcode
switches 0:5c4d7b2438d3 115 * | | |
switches 0:5c4d7b2438d3 116 * | -----: | :----------------------------------------- |
switches 0:5c4d7b2438d3 117 * | \p req | Pointer to a #spim_req object representing the active SPIM active transaction. |
switches 0:5c4d7b2438d3 118 * | \p error_code | An error code if the active transaction had a failure or #E_NO_ERROR if successful. |
switches 0:5c4d7b2438d3 119 * @addtogroup spim_async
switches 0:5c4d7b2438d3 120 */
switches 0:5c4d7b2438d3 121 typedef void (*spim_callback_fn)(spim_req_t * req, int error_code);
switches 0:5c4d7b2438d3 122
switches 0:5c4d7b2438d3 123 /**
switches 0:5c4d7b2438d3 124 * @brief Structure definition for an SPI Master Transaction request.
switches 0:5c4d7b2438d3 125 * @note When using this structure for an asynchronous operation, the
switches 0:5c4d7b2438d3 126 * structure must remain allocated until the callback is completed.
switches 0:5c4d7b2438d3 127 * @addtogroup spim_async
switches 0:5c4d7b2438d3 128 */
switches 0:5c4d7b2438d3 129 struct spim_req {
switches 0:5c4d7b2438d3 130 uint8_t ssel; /**< Number of the Slave Select to use. */
switches 0:5c4d7b2438d3 131 uint8_t deass; /**< Set to de-assert slave select at the completions of the transaction.*/
switches 0:5c4d7b2438d3 132 const uint8_t *tx_data; /**< Pointer to a buffer to transmit data from. */
switches 0:5c4d7b2438d3 133 uint8_t *rx_data; /**< Pointer to a buffer to store data received. */
switches 0:5c4d7b2438d3 134 spim_width_t width; /**< Number of data lines to use, see #spim_width_t. */
switches 0:5c4d7b2438d3 135 unsigned len; /**< Number of bytes to send from the \p tx_data buffer. */
switches 0:5c4d7b2438d3 136 unsigned read_num; /**< Number of bytes read and stored in \p rx_data buffer. */
switches 0:5c4d7b2438d3 137 unsigned write_num; /**< Number of bytes sent from the \p tx_data buffer, this will be filled by the driver after up to \p len bytes have been transmitted. */
switches 0:5c4d7b2438d3 138 spim_callback_fn callback; /**< Function pointer to a callback function if desired, NULL otherwise */
switches 0:5c4d7b2438d3 139 };
switches 0:5c4d7b2438d3 140
switches 0:5c4d7b2438d3 141 /* **** Globals **** */
switches 0:5c4d7b2438d3 142
switches 0:5c4d7b2438d3 143 /* **** Function Prototypes **** */
switches 0:5c4d7b2438d3 144
switches 0:5c4d7b2438d3 145 /**
switches 0:5c4d7b2438d3 146 * @brief Initialize the SPIM peripheral module.
switches 0:5c4d7b2438d3 147 *
switches 0:5c4d7b2438d3 148 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 149 * @param cfg Pointer to an SPIM configuration object.
switches 0:5c4d7b2438d3 150 * @param sys_cfg Pointer to a system configuration object to select the
switches 0:5c4d7b2438d3 151 * peripheral clock rate and assign the requested GPIO.
switches 0:5c4d7b2438d3 152 *
switches 0:5c4d7b2438d3 153 * @return #E_NO_ERROR if the SPIM port is initialized successfully, @ref MXC_Error_Codes
switches 0:5c4d7b2438d3 154 * "error" if unsuccessful.
switches 0:5c4d7b2438d3 155 */
switches 0:5c4d7b2438d3 156 int SPIM_Init(mxc_spim_regs_t *spim, const spim_cfg_t *cfg, const sys_cfg_spim_t *sys_cfg);
switches 0:5c4d7b2438d3 157
switches 0:5c4d7b2438d3 158 /**
switches 0:5c4d7b2438d3 159 * @brief Shutdown the SPIM peripheral module instance represented by the
switches 0:5c4d7b2438d3 160 * @p spim parameter.
switches 0:5c4d7b2438d3 161 *
switches 0:5c4d7b2438d3 162 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 163 *
switches 0:5c4d7b2438d3 164 * @return #E_NO_ERROR if the SPIM is shutdown successfully, @ref
switches 0:5c4d7b2438d3 165 * MXC_Error_Codes "error" if unsuccessful.
switches 0:5c4d7b2438d3 166 */
switches 0:5c4d7b2438d3 167 int SPIM_Shutdown(mxc_spim_regs_t *spim);
switches 0:5c4d7b2438d3 168
switches 0:5c4d7b2438d3 169 /**
switches 0:5c4d7b2438d3 170 * @brief Send Clock cycles on SCK without reading or writing.
switches 0:5c4d7b2438d3 171 *
switches 0:5c4d7b2438d3 172 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 173 * @param len Number of clock cycles to send.
switches 0:5c4d7b2438d3 174 * @param ssel Slave select number.
switches 0:5c4d7b2438d3 175 * @param deass De-assert slave select at the end of the transaction.
switches 0:5c4d7b2438d3 176 *
switches 0:5c4d7b2438d3 177 * @return Cycles transacted if everything is successful, @ref
switches 0:5c4d7b2438d3 178 * MXC_Error_Codes "error" if unsuccessful.
switches 0:5c4d7b2438d3 179 */
switches 0:5c4d7b2438d3 180 int SPIM_Clocks(mxc_spim_regs_t *spim, uint32_t len, uint8_t ssel, uint8_t deass);
switches 0:5c4d7b2438d3 181
switches 0:5c4d7b2438d3 182 /**
switches 0:5c4d7b2438d3 183 * @brief Read/write SPIM data. This function will block until the
switches 0:5c4d7b2438d3 184 * transaction is complete.
switches 0:5c4d7b2438d3 185 *
switches 0:5c4d7b2438d3 186 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 187 * @param req Request for a SPIM transaction.
switches 0:5c4d7b2438d3 188 * @note If a callback function is registered it will not be called when using a blocking function.
switches 0:5c4d7b2438d3 189 *
switches 0:5c4d7b2438d3 190 * @return Bytes transacted if everything is successful, error if
switches 0:5c4d7b2438d3 191 * unsuccessful.
switches 0:5c4d7b2438d3 192 */
switches 0:5c4d7b2438d3 193 int SPIM_Trans(mxc_spim_regs_t *spim, spim_req_t *req);
switches 0:5c4d7b2438d3 194 /**
switches 0:5c4d7b2438d3 195 * @defgroup spim_async SPIM Asynchrous Functions
switches 0:5c4d7b2438d3 196 * @{
switches 0:5c4d7b2438d3 197 */
switches 0:5c4d7b2438d3 198 /**
switches 0:5c4d7b2438d3 199 * @brief Asynchronously read/write SPIM data.
switches 0:5c4d7b2438d3 200 *
switches 0:5c4d7b2438d3 201 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 202 * @param req Request for a SPIM transaction.
switches 0:5c4d7b2438d3 203 * @note Request struct must remain allocated until callback.
switches 0:5c4d7b2438d3 204 *
switches 0:5c4d7b2438d3 205 * @return #E_NO_ERROR if everything is successful, @ref MXC_Error_Codes
switches 0:5c4d7b2438d3 206 * "error" if unsuccessful.
switches 0:5c4d7b2438d3 207 */
switches 0:5c4d7b2438d3 208 int SPIM_TransAsync(mxc_spim_regs_t *spim, spim_req_t *req);
switches 0:5c4d7b2438d3 209
switches 0:5c4d7b2438d3 210 /**
switches 0:5c4d7b2438d3 211 * @brief Abort asynchronous request.
switches 0:5c4d7b2438d3 212 *
switches 0:5c4d7b2438d3 213 * @param req Pointer to a request structure for a SPIM transaction.
switches 0:5c4d7b2438d3 214 *
switches 0:5c4d7b2438d3 215 * @return #E_NO_ERROR if request aborted, , @ref MXC_Error_Codes "error" if
switches 0:5c4d7b2438d3 216 * unsuccessful.
switches 0:5c4d7b2438d3 217 */
switches 0:5c4d7b2438d3 218 int SPIM_AbortAsync(spim_req_t *req);
switches 0:5c4d7b2438d3 219
switches 0:5c4d7b2438d3 220 /**
switches 0:5c4d7b2438d3 221 * @brief SPIM interrupt handler.
switches 0:5c4d7b2438d3 222 * @details This function should be called by the application from the
switches 0:5c4d7b2438d3 223 * interrupt handler if SPIM interrupts are enabled. Alternately,
switches 0:5c4d7b2438d3 224 * this function can be periodically polled by the application if
switches 0:5c4d7b2438d3 225 * SPIM interrupts are disabled.
switches 0:5c4d7b2438d3 226 *
switches 0:5c4d7b2438d3 227 * @param spim Base address of the SPIM module.
switches 0:5c4d7b2438d3 228 */
switches 0:5c4d7b2438d3 229 void SPIM_Handler(mxc_spim_regs_t *spim);
switches 0:5c4d7b2438d3 230
switches 0:5c4d7b2438d3 231 /**
switches 0:5c4d7b2438d3 232 * @brief Check the SPIM to see if it's busy.
switches 0:5c4d7b2438d3 233 *
switches 0:5c4d7b2438d3 234 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 235 *
switches 0:5c4d7b2438d3 236 * @retval #E_NO_ERROR if idle.
switches 0:5c4d7b2438d3 237 * @retval #E_BUSY if in use.
switches 0:5c4d7b2438d3 238 */
switches 0:5c4d7b2438d3 239 int SPIM_Busy(mxc_spim_regs_t *spim);
switches 0:5c4d7b2438d3 240 /**@} end of spim_async define group */
switches 0:5c4d7b2438d3 241
switches 0:5c4d7b2438d3 242 /**
switches 0:5c4d7b2438d3 243 * @brief Attempts to prepare the SPIM for Low Power Sleep Modes.
switches 0:5c4d7b2438d3 244 * @details Checks for any ongoing transactions. Disables interrupts if the
switches 0:5c4d7b2438d3 245 * SPIM is idle.
switches 0:5c4d7b2438d3 246 *
switches 0:5c4d7b2438d3 247 * @param spim The spim
switches 0:5c4d7b2438d3 248 *
switches 0:5c4d7b2438d3 249 * @return #E_NO_ERROR if ready to sleep.
switches 0:5c4d7b2438d3 250 * @return #E_BUSY if not able to sleep at this time.
switches 0:5c4d7b2438d3 251 */
switches 0:5c4d7b2438d3 252 int SPIM_PrepForSleep(mxc_spim_regs_t *spim);
switches 0:5c4d7b2438d3 253
switches 0:5c4d7b2438d3 254 /**
switches 0:5c4d7b2438d3 255 * @brief Enables the SPIM without overwriting the existing configuration.
switches 0:5c4d7b2438d3 256 *
switches 0:5c4d7b2438d3 257 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 258 */
switches 0:5c4d7b2438d3 259 __STATIC_INLINE void SPIM_Enable(mxc_spim_regs_t *spim)
switches 0:5c4d7b2438d3 260 {
switches 0:5c4d7b2438d3 261 spim->gen_ctrl |= (MXC_F_SPIM_GEN_CTRL_SPI_MSTR_EN |
switches 0:5c4d7b2438d3 262 MXC_F_SPIM_GEN_CTRL_TX_FIFO_EN | MXC_F_SPIM_GEN_CTRL_RX_FIFO_EN);
switches 0:5c4d7b2438d3 263 }
switches 0:5c4d7b2438d3 264
switches 0:5c4d7b2438d3 265 /**
switches 0:5c4d7b2438d3 266 * @brief Drains/empties the data in the RX FIFO.
switches 0:5c4d7b2438d3 267 *
switches 0:5c4d7b2438d3 268 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 269 */
switches 0:5c4d7b2438d3 270 __STATIC_INLINE void SPIM_DrainRX(mxc_spim_regs_t *spim)
switches 0:5c4d7b2438d3 271 {
switches 0:5c4d7b2438d3 272 uint32_t ctrl_save = spim->gen_ctrl;
switches 0:5c4d7b2438d3 273 spim->gen_ctrl = (ctrl_save & ~MXC_F_SPIM_GEN_CTRL_RX_FIFO_EN);
switches 0:5c4d7b2438d3 274 spim->gen_ctrl = ctrl_save;
switches 0:5c4d7b2438d3 275 }
switches 0:5c4d7b2438d3 276
switches 0:5c4d7b2438d3 277 /**
switches 0:5c4d7b2438d3 278 * @brief Drains/empties the data in the TX FIFO.
switches 0:5c4d7b2438d3 279 *
switches 0:5c4d7b2438d3 280 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 281 */
switches 0:5c4d7b2438d3 282 __STATIC_INLINE void SPIM_DrainTX(mxc_spim_regs_t *spim)
switches 0:5c4d7b2438d3 283 {
switches 0:5c4d7b2438d3 284 uint32_t ctrl_save = spim->gen_ctrl;
switches 0:5c4d7b2438d3 285 spim->gen_ctrl = (ctrl_save & ~MXC_F_SPIM_GEN_CTRL_TX_FIFO_EN);
switches 0:5c4d7b2438d3 286 spim->gen_ctrl = ctrl_save;
switches 0:5c4d7b2438d3 287 }
switches 0:5c4d7b2438d3 288
switches 0:5c4d7b2438d3 289 /**
switches 0:5c4d7b2438d3 290 * @brief Returns the number of bytes free in the TX FIFO.
switches 0:5c4d7b2438d3 291 *
switches 0:5c4d7b2438d3 292 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 293 *
switches 0:5c4d7b2438d3 294 * @return Number of bytes free in Transmit FIFO.
switches 0:5c4d7b2438d3 295 */
switches 0:5c4d7b2438d3 296 __STATIC_INLINE unsigned SPIM_NumWriteAvail(mxc_spim_regs_t *spim)
switches 0:5c4d7b2438d3 297 {
switches 0:5c4d7b2438d3 298 return (MXC_CFG_SPIM_FIFO_DEPTH - ((spim->fifo_ctrl &
switches 0:5c4d7b2438d3 299 MXC_F_SPIM_FIFO_CTRL_TX_FIFO_USED) >> MXC_F_SPIM_FIFO_CTRL_TX_FIFO_USED_POS));
switches 0:5c4d7b2438d3 300 }
switches 0:5c4d7b2438d3 301
switches 0:5c4d7b2438d3 302 /**
switches 0:5c4d7b2438d3 303 * @brief Returns the number of bytes available to read in the RX FIFO.
switches 0:5c4d7b2438d3 304 *
switches 0:5c4d7b2438d3 305 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 306 *
switches 0:5c4d7b2438d3 307 * @return Number of bytes in RX FIFO.
switches 0:5c4d7b2438d3 308 */
switches 0:5c4d7b2438d3 309 __STATIC_INLINE unsigned SPIM_NumReadAvail(mxc_spim_regs_t *spim)
switches 0:5c4d7b2438d3 310 {
switches 0:5c4d7b2438d3 311 return ((spim->fifo_ctrl & MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED) >>
switches 0:5c4d7b2438d3 312 MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED_POS);
switches 0:5c4d7b2438d3 313 }
switches 0:5c4d7b2438d3 314
switches 0:5c4d7b2438d3 315 /**
switches 0:5c4d7b2438d3 316 * @brief Clear the SPIM interrupt flags.
switches 0:5c4d7b2438d3 317 *
switches 0:5c4d7b2438d3 318 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 319 * @param mask Mask of the SPIM interrupt flags to clear, see @ref
switches 0:5c4d7b2438d3 320 * SPIM_INTFL_Register Register for the SPIM interrupt flag
switches 0:5c4d7b2438d3 321 * bit masks.
switches 0:5c4d7b2438d3 322 */
switches 0:5c4d7b2438d3 323 __STATIC_INLINE void SPIM_ClearFlags(mxc_spim_regs_t *spim, uint32_t mask)
switches 0:5c4d7b2438d3 324 {
switches 0:5c4d7b2438d3 325 spim->intfl = mask;
switches 0:5c4d7b2438d3 326 }
switches 0:5c4d7b2438d3 327
switches 0:5c4d7b2438d3 328 /**
switches 0:5c4d7b2438d3 329 * @brief Read the current SPIM interrupt flags.
switches 0:5c4d7b2438d3 330 *
switches 0:5c4d7b2438d3 331 * @param spim Pointer to the SPIM register structure.
switches 0:5c4d7b2438d3 332 *
switches 0:5c4d7b2438d3 333 * @return Mask of currently set SPIM interrupt flags, see @ref
switches 0:5c4d7b2438d3 334 * SPIM_INTFL_Register Register for the SPIM interrupt flag bit
switches 0:5c4d7b2438d3 335 * masks.
switches 0:5c4d7b2438d3 336 */
switches 0:5c4d7b2438d3 337 __STATIC_INLINE unsigned SPIM_GetFlags(mxc_spim_regs_t *spim)
switches 0:5c4d7b2438d3 338 {
switches 0:5c4d7b2438d3 339 return (spim->intfl);
switches 0:5c4d7b2438d3 340 }
switches 0:5c4d7b2438d3 341
switches 0:5c4d7b2438d3 342 /**@} end of group spim_comm */
switches 0:5c4d7b2438d3 343 #ifdef __cplusplus
switches 0:5c4d7b2438d3 344 }
switches 0:5c4d7b2438d3 345 #endif
switches 0:5c4d7b2438d3 346
switches 0:5c4d7b2438d3 347 #endif /* _SPIM_H_ */