Greg Steiert / pegasus_dev

Dependents:   blinky_max32630fthr

Committer:
switches
Date:
Fri Dec 16 16:27:57 2016 +0000
Revision:
3:1198227e6421
Parent:
0:5c4d7b2438d3
Changed ADC scale for MAX32625 platforms to 1.2V full scale to match MAX32630 platforms

Who changed what in which revision?

UserRevisionLine numberNew contents of line
switches 0:5c4d7b2438d3 1 /*******************************************************************************
switches 0:5c4d7b2438d3 2 * Copyright (c) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
switches 0:5c4d7b2438d3 3 *
switches 0:5c4d7b2438d3 4 * Permission is hereby granted, free of charge, to any person obtaining a
switches 0:5c4d7b2438d3 5 * copy of this software and associated documentation files (the "Software"),
switches 0:5c4d7b2438d3 6 * to deal in the Software without restriction, including without limitation
switches 0:5c4d7b2438d3 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
switches 0:5c4d7b2438d3 8 * and/or sell copies of the Software, and to permit persons to whom the
switches 0:5c4d7b2438d3 9 * Software is furnished to do so, subject to the following conditions:
switches 0:5c4d7b2438d3 10 *
switches 0:5c4d7b2438d3 11 * The above copyright notice and this permission notice shall be included
switches 0:5c4d7b2438d3 12 * in all copies or substantial portions of the Software.
switches 0:5c4d7b2438d3 13 *
switches 0:5c4d7b2438d3 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
switches 0:5c4d7b2438d3 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
switches 0:5c4d7b2438d3 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
switches 0:5c4d7b2438d3 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
switches 0:5c4d7b2438d3 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
switches 0:5c4d7b2438d3 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
switches 0:5c4d7b2438d3 20 * OTHER DEALINGS IN THE SOFTWARE.
switches 0:5c4d7b2438d3 21 *
switches 0:5c4d7b2438d3 22 * Except as contained in this notice, the name of Maxim Integrated
switches 0:5c4d7b2438d3 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
switches 0:5c4d7b2438d3 24 * Products, Inc. Branding Policy.
switches 0:5c4d7b2438d3 25 *
switches 0:5c4d7b2438d3 26 * The mere transfer of this software does not imply any licenses
switches 0:5c4d7b2438d3 27 * of trade secrets, proprietary technology, copyrights, patents,
switches 0:5c4d7b2438d3 28 * trademarks, maskwork rights, or any other form of intellectual
switches 0:5c4d7b2438d3 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
switches 0:5c4d7b2438d3 30 * ownership rights.
switches 0:5c4d7b2438d3 31 *******************************************************************************
switches 0:5c4d7b2438d3 32 */
switches 0:5c4d7b2438d3 33
switches 0:5c4d7b2438d3 34 #include "mbed_assert.h"
switches 0:5c4d7b2438d3 35 #include "spi_api.h" // mbed HAL
switches 0:5c4d7b2438d3 36 #include "spim_regs.h" // bare metal
switches 0:5c4d7b2438d3 37 #include "spim.h" // Maxim CMSIS driver
switches 0:5c4d7b2438d3 38 #include "pinmap.h"
switches 0:5c4d7b2438d3 39 #include "PeripheralPins.h"
switches 0:5c4d7b2438d3 40
switches 0:5c4d7b2438d3 41 //******************************************************************************
switches 0:5c4d7b2438d3 42 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
switches 0:5c4d7b2438d3 43 {
switches 0:5c4d7b2438d3 44 // Make sure pins are pointing to the same SPI instance
switches 0:5c4d7b2438d3 45 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
switches 0:5c4d7b2438d3 46 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
switches 0:5c4d7b2438d3 47 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
switches 0:5c4d7b2438d3 48 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
switches 0:5c4d7b2438d3 49
switches 0:5c4d7b2438d3 50 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
switches 0:5c4d7b2438d3 51 SPIName spi_cntl;
switches 0:5c4d7b2438d3 52
switches 0:5c4d7b2438d3 53 // Control is SCK and optionaly SS
switches 0:5c4d7b2438d3 54 if ((SPIName)spi_ssel != (SPIName)NC) {
switches 0:5c4d7b2438d3 55 spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
switches 0:5c4d7b2438d3 56 } else {
switches 0:5c4d7b2438d3 57 spi_cntl = spi_sclk;
switches 0:5c4d7b2438d3 58 }
switches 0:5c4d7b2438d3 59
switches 0:5c4d7b2438d3 60 SPIName spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
switches 0:5c4d7b2438d3 61
switches 0:5c4d7b2438d3 62 MBED_ASSERT((SPIName)spi != (SPIName)NC);
switches 0:5c4d7b2438d3 63
switches 0:5c4d7b2438d3 64 obj->spi = (mxc_spim_regs_t *)spi;
switches 0:5c4d7b2438d3 65
switches 0:5c4d7b2438d3 66 // Merge pin function requests for use with CMSIS init func
switches 0:5c4d7b2438d3 67 ioman_req_t io_req;
switches 0:5c4d7b2438d3 68 pin_function_t *pin_func;
switches 0:5c4d7b2438d3 69 pin_func = (pin_function_t *)pinmap_find_function(mosi, PinMap_SPI_MOSI);
switches 0:5c4d7b2438d3 70 io_req.value = pin_func->req_val;
switches 0:5c4d7b2438d3 71 pin_func = (pin_function_t *)pinmap_find_function(miso, PinMap_SPI_MISO);
switches 0:5c4d7b2438d3 72 io_req.value |= pin_func->req_val;
switches 0:5c4d7b2438d3 73 pin_func = (pin_function_t *)pinmap_find_function(sclk, PinMap_SPI_SCLK);
switches 0:5c4d7b2438d3 74 io_req.value |= pin_func->req_val;
switches 0:5c4d7b2438d3 75 if ((SPIName)spi_ssel != (SPIName)NC) {
switches 0:5c4d7b2438d3 76 pin_func = (pin_function_t *)pinmap_find_function(ssel, PinMap_SPI_SSEL);
switches 0:5c4d7b2438d3 77 io_req.value |= pin_func->req_val;
switches 0:5c4d7b2438d3 78 }
switches 0:5c4d7b2438d3 79
switches 0:5c4d7b2438d3 80 // Using req and ack pointers of last pin function lookup
switches 0:5c4d7b2438d3 81 sys_cfg_spim_t sys_cfg;
switches 0:5c4d7b2438d3 82 sys_cfg.io_cfg.req_reg = pin_func->reg_req;
switches 0:5c4d7b2438d3 83 sys_cfg.io_cfg.ack_reg = pin_func->reg_ack;
switches 0:5c4d7b2438d3 84 sys_cfg.io_cfg.req_val = io_req;
switches 0:5c4d7b2438d3 85 sys_cfg.clk_scale = CLKMAN_SCALE_AUTO;
switches 0:5c4d7b2438d3 86
switches 0:5c4d7b2438d3 87 // Defaults
switches 0:5c4d7b2438d3 88 spim_cfg_t spim_cfg;
switches 0:5c4d7b2438d3 89 spim_cfg.mode = 0;
switches 0:5c4d7b2438d3 90 spim_cfg.ssel_pol = 0;
switches 0:5c4d7b2438d3 91 spim_cfg.baud = 1000000;
switches 0:5c4d7b2438d3 92
switches 0:5c4d7b2438d3 93 SPIM_Init(obj->spi, &spim_cfg, &sys_cfg);
switches 0:5c4d7b2438d3 94
switches 0:5c4d7b2438d3 95 obj->index = MXC_SPIM_GET_IDX(obj->spi);
switches 0:5c4d7b2438d3 96 }
switches 0:5c4d7b2438d3 97
switches 0:5c4d7b2438d3 98 //******************************************************************************
switches 0:5c4d7b2438d3 99 void spi_format(spi_t *obj, int bits, int mode, int slave)
switches 0:5c4d7b2438d3 100 {
switches 0:5c4d7b2438d3 101 // Check the validity of the inputs
switches 0:5c4d7b2438d3 102 MBED_ASSERT(bits == 8);
switches 0:5c4d7b2438d3 103
switches 0:5c4d7b2438d3 104 // Only supports master mode
switches 0:5c4d7b2438d3 105 MBED_ASSERT(!slave);
switches 0:5c4d7b2438d3 106
switches 0:5c4d7b2438d3 107 // Set the mode
switches 0:5c4d7b2438d3 108 obj->spi->mstr_cfg &= ~(MXC_F_SPIM_MSTR_CFG_SPI_MODE);
switches 0:5c4d7b2438d3 109 obj->spi->mstr_cfg |= (mode << MXC_F_SPIM_MSTR_CFG_SPI_MODE_POS);
switches 0:5c4d7b2438d3 110 }
switches 0:5c4d7b2438d3 111
switches 0:5c4d7b2438d3 112 //******************************************************************************
switches 0:5c4d7b2438d3 113 void spi_frequency(spi_t *obj, int hz)
switches 0:5c4d7b2438d3 114 {
switches 0:5c4d7b2438d3 115 // Maximum frequency is half the system frequency
switches 0:5c4d7b2438d3 116 MBED_ASSERT((unsigned int)hz <= (SystemCoreClock / 2));
switches 0:5c4d7b2438d3 117 unsigned clocks = ((SystemCoreClock / 2) / hz);
switches 0:5c4d7b2438d3 118
switches 0:5c4d7b2438d3 119 // Figure out the divider ratio
switches 0:5c4d7b2438d3 120 int clk_div = 1;
switches 0:5c4d7b2438d3 121 while(clk_div < 10) {
switches 0:5c4d7b2438d3 122 if(clocks < 0x10) {
switches 0:5c4d7b2438d3 123 break;
switches 0:5c4d7b2438d3 124 }
switches 0:5c4d7b2438d3 125 clk_div++;
switches 0:5c4d7b2438d3 126 clocks = clocks >> 1;
switches 0:5c4d7b2438d3 127 }
switches 0:5c4d7b2438d3 128
switches 0:5c4d7b2438d3 129 // Turn on the SPI clock
switches 0:5c4d7b2438d3 130 if(obj->index == 0) {
switches 0:5c4d7b2438d3 131 MXC_CLKMAN->sys_clk_ctrl_11_spi0 = clk_div;
switches 0:5c4d7b2438d3 132 } else if(obj->index == 1) {
switches 0:5c4d7b2438d3 133 MXC_CLKMAN->sys_clk_ctrl_12_spi1 = clk_div;
switches 0:5c4d7b2438d3 134 } else if(obj->index == 2) {
switches 0:5c4d7b2438d3 135 MXC_CLKMAN->sys_clk_ctrl_13_spi2 = clk_div;
switches 0:5c4d7b2438d3 136 } else {
switches 0:5c4d7b2438d3 137 MBED_ASSERT(0);
switches 0:5c4d7b2438d3 138 }
switches 0:5c4d7b2438d3 139
switches 0:5c4d7b2438d3 140 // Set the number of clocks to hold sclk high and low
switches 0:5c4d7b2438d3 141 MXC_SET_FIELD(&obj->spi->mstr_cfg,
switches 0:5c4d7b2438d3 142 (MXC_F_SPIM_MSTR_CFG_SCK_HI_CLK | MXC_F_SPIM_MSTR_CFG_SCK_LO_CLK),
switches 0:5c4d7b2438d3 143 ((clocks << MXC_F_SPIM_MSTR_CFG_SCK_HI_CLK_POS) | (clocks << MXC_F_SPIM_MSTR_CFG_SCK_LO_CLK_POS)));
switches 0:5c4d7b2438d3 144 }
switches 0:5c4d7b2438d3 145
switches 0:5c4d7b2438d3 146 //******************************************************************************
switches 0:5c4d7b2438d3 147 int spi_master_write(spi_t *obj, int value)
switches 0:5c4d7b2438d3 148 {
switches 0:5c4d7b2438d3 149 spim_req_t req;
switches 0:5c4d7b2438d3 150 uint8_t out;
switches 0:5c4d7b2438d3 151 uint8_t in;
switches 0:5c4d7b2438d3 152
switches 0:5c4d7b2438d3 153 out = value;
switches 0:5c4d7b2438d3 154
switches 0:5c4d7b2438d3 155 req.ssel = 0;
switches 0:5c4d7b2438d3 156 req.deass = 0;
switches 0:5c4d7b2438d3 157 req.tx_data = &out;
switches 0:5c4d7b2438d3 158 req.rx_data = &in;
switches 0:5c4d7b2438d3 159 req.width = SPIM_WIDTH_1;
switches 0:5c4d7b2438d3 160 req.len = 1;
switches 0:5c4d7b2438d3 161 req.ssel = 0;
switches 0:5c4d7b2438d3 162 req.deass = 1;
switches 0:5c4d7b2438d3 163 req.callback = NULL;
switches 0:5c4d7b2438d3 164
switches 0:5c4d7b2438d3 165 SPIM_Trans(obj->spi, &req);
switches 0:5c4d7b2438d3 166
switches 0:5c4d7b2438d3 167 return *req.rx_data;
switches 0:5c4d7b2438d3 168 }
switches 0:5c4d7b2438d3 169
switches 0:5c4d7b2438d3 170 //******************************************************************************
switches 0:5c4d7b2438d3 171 int spi_busy(spi_t *obj)
switches 0:5c4d7b2438d3 172 {
switches 0:5c4d7b2438d3 173 return SPIM_Busy(obj->spi);
switches 0:5c4d7b2438d3 174 }
switches 0:5c4d7b2438d3 175
switches 0:5c4d7b2438d3 176 //******************************************************************************
switches 0:5c4d7b2438d3 177 uint8_t spi_get_module(spi_t *obj)
switches 0:5c4d7b2438d3 178 {
switches 0:5c4d7b2438d3 179 return obj->index;
switches 0:5c4d7b2438d3 180 }
switches 0:5c4d7b2438d3 181